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cacheops_machdep.h revision 1.1 
      1 /*	$NetBSD: cacheops_machdep.h,v 1.1 2002/11/02 20:03:05 chs Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1994, 1995 Gordon W. Ross
      5  * Copyright (c) 1988 University of Utah.
      6  * Copyright (c) 1980, 1990, 1993
      7  *	The Regents of the University of California.  All rights reserved.
      8  *
      9  * This code is derived from software contributed to Berkeley by
     10  * the Systems Programming Group of the University of Utah Computer
     11  * Science Department.
     12  *
     13  * Redistribution and use in source and binary forms, with or without
     14  * modification, are permitted provided that the following conditions
     15  * are met:
     16  * 1. Redistributions of source code must retain the above copyright
     17  *    notice, this list of conditions and the following disclaimer.
     18  * 2. Redistributions in binary form must reproduce the above copyright
     19  *    notice, this list of conditions and the following disclaimer in the
     20  *    documentation and/or other materials provided with the distribution.
     21  * 3. All advertising materials mentioning features or use of this software
     22  *    must display the following acknowledgement:
     23  *	This product includes software developed by the University of
     24  *	California, Berkeley and its contributors.
     25  * 4. Neither the name of the University nor the names of its contributors
     26  *    may be used to endorse or promote products derived from this software
     27  *    without specific prior written permission.
     28  *
     29  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     30  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     31  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     32  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     33  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     34  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     35  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     36  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     37  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     38  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     39  * SUCH DAMAGE.
     40  */
     41 
     42 #ifndef _HP300_CACHEOPS_MACHDEP_H_
     43 #define	_HP300_CACHEOPS_MACHDEP_H_
     44 
     45 extern vaddr_t MMUbase;
     46 
     47 int DCIA_md(void);
     48 extern __inline int
     49 DCIA_md(void)
     50 {
     51 	volatile int *ip = (void *)(MMUbase + MMUCMD);
     52 
     53 	if (ectype != EC_VIRT) {
     54 		return 0;
     55 	}
     56 
     57 	*ip &= ~MMU_CEN;
     58 	*ip |= MMU_CEN;
     59 	return 1;
     60 }
     61 
     62 int DCIS_md(void);
     63 extern __inline int
     64 DCIS_md(void)
     65 {
     66 	volatile int *ip = (void *)(MMUbase + MMUSSTP);
     67 
     68 	if (ectype != EC_VIRT) {
     69 		return 0;
     70 	}
     71 
     72 	*ip = *ip;
     73 	return 1;
     74 }
     75 
     76 int DCIU_md(void);
     77 extern __inline int
     78 DCIU_md(void)
     79 {
     80 	volatile int *ip = (void *)(MMUbase + MMUUSTP);
     81 
     82 	if (ectype != EC_VIRT) {
     83 		return 0;
     84 	}
     85 
     86 	*ip = *ip;
     87 	return 1;
     88 }
     89 
     90 int PCIA_md(void);
     91 extern __inline int
     92 PCIA_md(void)
     93 {
     94 	volatile int *ip = (void *)(MMUbase + MMUCMD);
     95 
     96 	if (ectype != EC_PHYS || cputype != CPU_68030) {
     97 		return 0;
     98 	}
     99 
    100 	*ip &= ~MMU_CEN;
    101 	*ip |= MMU_CEN;
    102 
    103 	/*
    104 	 * only some '030 models (345/370/375/400) have external PAC,
    105 	 * so we need to do the standard flushing as well.
    106 	 */
    107 
    108 	return 0;
    109 }
    110 
    111 int TBIA_md(void);
    112 extern __inline int
    113 TBIA_md(void)
    114 {
    115 	volatile int *ip = (void *)(MMUbase + MMUTBINVAL);
    116 
    117 	if (mmutype != MMU_HP) {
    118 		return 0;
    119 	}
    120 
    121 	(void) *ip;
    122 	return 1;
    123 }
    124 
    125 int TBIS_md(vaddr_t);
    126 extern __inline int
    127 TBIS_md(vaddr_t va)
    128 {
    129 	vaddr_t r_va __asm("%a0") = va;
    130 	int s;
    131 
    132 	if (mmutype != MMU_HP) {
    133 		return 0;
    134 	}
    135 
    136 	s = splhigh();
    137 	__asm __volatile (" movc   %0, %%dfc;"	/* select purge space */
    138 			  " movsl  %3, %1@;"	/* purge it */
    139 			  " movc   %2, %%dfc;"
    140 			  : : "r" (FC_PURGE), "a" (r_va), "r" (FC_USERD),
    141 			  "r" (0));
    142 	splx(s);
    143 	return 1;
    144 }
    145 
    146 int TBIAS_md(void);
    147 extern __inline int
    148 TBIAS_md(void)
    149 {
    150 	volatile int *ip = (void *)(MMUbase + MMUTBINVAL);
    151 
    152 	if (mmutype != MMU_HP) {
    153 		return 0;
    154 	}
    155 
    156 	*ip = 0x8000;
    157 	return 1;
    158 }
    159 
    160 int TBIAU_md(void);
    161 extern __inline int
    162 TBIAU_md(void)
    163 {
    164 	volatile int *ip = (void *)(MMUbase + MMUTBINVAL);
    165 
    166 	if (mmutype != MMU_HP) {
    167 		return 0;
    168 	}
    169 
    170 	*ip = 0;
    171 	return 1;
    172 }
    173 #endif /* _HP300_CACHEOPS_MACHDEP_H_ */
    174