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cacheops_machdep.h revision 1.2.2.2 
      1 /*	$NetBSD: cacheops_machdep.h,v 1.2.2.2 2002/11/11 21:58:31 nathanw Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1994, 1995 Gordon W. Ross
      5  * Copyright (c) 1988 University of Utah.
      6  * Copyright (c) 1980, 1990, 1993
      7  *	The Regents of the University of California.  All rights reserved.
      8  *
      9  * This code is derived from software contributed to Berkeley by
     10  * the Systems Programming Group of the University of Utah Computer
     11  * Science Department.
     12  *
     13  * Redistribution and use in source and binary forms, with or without
     14  * modification, are permitted provided that the following conditions
     15  * are met:
     16  * 1. Redistributions of source code must retain the above copyright
     17  *    notice, this list of conditions and the following disclaimer.
     18  * 2. Redistributions in binary form must reproduce the above copyright
     19  *    notice, this list of conditions and the following disclaimer in the
     20  *    documentation and/or other materials provided with the distribution.
     21  * 3. All advertising materials mentioning features or use of this software
     22  *    must display the following acknowledgement:
     23  *	This product includes software developed by the University of
     24  *	California, Berkeley and its contributors.
     25  * 4. Neither the name of the University nor the names of its contributors
     26  *    may be used to endorse or promote products derived from this software
     27  *    without specific prior written permission.
     28  *
     29  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     30  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     31  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     32  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     33  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     34  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     35  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     36  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     37  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     38  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     39  * SUCH DAMAGE.
     40  */
     41 
     42 #ifndef _HP300_CACHEOPS_MACHDEP_H_
     43 #define	_HP300_CACHEOPS_MACHDEP_H_
     44 
     45 extern vaddr_t MMUbase;
     46 
     47 static __inline int __attribute__((__unused__))
     48 DCIA_md(void)
     49 {
     50 	volatile int *ip = (void *)(MMUbase + MMUCMD);
     51 
     52 	if (ectype != EC_VIRT) {
     53 		return 0;
     54 	}
     55 
     56 	*ip &= ~MMU_CEN;
     57 	*ip |= MMU_CEN;
     58 	return 1;
     59 }
     60 
     61 static __inline int __attribute__((__unused__))
     62 DCIS_md(void)
     63 {
     64 	volatile int *ip = (void *)(MMUbase + MMUSSTP);
     65 
     66 	if (ectype != EC_VIRT) {
     67 		return 0;
     68 	}
     69 
     70 	*ip = *ip;
     71 	return 1;
     72 }
     73 
     74 static __inline int __attribute__((__unused__))
     75 DCIU_md(void)
     76 {
     77 	volatile int *ip = (void *)(MMUbase + MMUUSTP);
     78 
     79 	if (ectype != EC_VIRT) {
     80 		return 0;
     81 	}
     82 
     83 	*ip = *ip;
     84 	return 1;
     85 }
     86 
     87 static __inline int __attribute__((__unused__))
     88 PCIA_md(void)
     89 {
     90 	volatile int *ip = (void *)(MMUbase + MMUCMD);
     91 
     92 	if (ectype != EC_PHYS || cputype != CPU_68030) {
     93 		return 0;
     94 	}
     95 
     96 	*ip &= ~MMU_CEN;
     97 	*ip |= MMU_CEN;
     98 
     99 	/*
    100 	 * only some '030 models (345/370/375/400) have external PAC,
    101 	 * so we need to do the standard flushing as well.
    102 	 */
    103 
    104 	return 0;
    105 }
    106 
    107 static __inline int __attribute__((__unused__))
    108 TBIA_md(void)
    109 {
    110 	volatile int *ip = (void *)(MMUbase + MMUTBINVAL);
    111 
    112 	if (mmutype != MMU_HP) {
    113 		return 0;
    114 	}
    115 
    116 	(void) *ip;
    117 	return 1;
    118 }
    119 
    120 static __inline int __attribute__((__unused__))
    121 TBIS_md(vaddr_t va)
    122 {
    123 	vaddr_t r_va __asm("%a0") = va;
    124 	int s;
    125 
    126 	if (mmutype != MMU_HP) {
    127 		return 0;
    128 	}
    129 
    130 	s = splhigh();
    131 	__asm __volatile (" movc   %0, %%dfc;"	/* select purge space */
    132 			  " movsl  %3, %1@;"	/* purge it */
    133 			  " movc   %2, %%dfc;"
    134 			  : : "r" (FC_PURGE), "a" (r_va), "r" (FC_USERD),
    135 			  "r" (0));
    136 	splx(s);
    137 	return 1;
    138 }
    139 
    140 static __inline int __attribute__((__unused__))
    141 TBIAS_md(void)
    142 {
    143 	volatile int *ip = (void *)(MMUbase + MMUTBINVAL);
    144 
    145 	if (mmutype != MMU_HP) {
    146 		return 0;
    147 	}
    148 
    149 	*ip = 0x8000;
    150 	return 1;
    151 }
    152 
    153 static __inline int __attribute__((__unused__))
    154 TBIAU_md(void)
    155 {
    156 	volatile int *ip = (void *)(MMUbase + MMUTBINVAL);
    157 
    158 	if (mmutype != MMU_HP) {
    159 		return 0;
    160 	}
    161 
    162 	*ip = 0;
    163 	return 1;
    164 }
    165 #endif /* _HP300_CACHEOPS_MACHDEP_H_ */
    166