cpu.h revision 1.34 1 1.34 thorpej /* $NetBSD: cpu.h,v 1.34 2000/05/26 21:19:42 thorpej Exp $ */
2 1.9 cgd
3 1.1 cgd /*
4 1.1 cgd * Copyright (c) 1988 University of Utah.
5 1.8 mycroft * Copyright (c) 1982, 1990, 1993
6 1.8 mycroft * The Regents of the University of California. All rights reserved.
7 1.1 cgd *
8 1.1 cgd * This code is derived from software contributed to Berkeley by
9 1.1 cgd * the Systems Programming Group of the University of Utah Computer
10 1.1 cgd * Science Department.
11 1.1 cgd *
12 1.1 cgd * Redistribution and use in source and binary forms, with or without
13 1.1 cgd * modification, are permitted provided that the following conditions
14 1.1 cgd * are met:
15 1.1 cgd * 1. Redistributions of source code must retain the above copyright
16 1.1 cgd * notice, this list of conditions and the following disclaimer.
17 1.1 cgd * 2. Redistributions in binary form must reproduce the above copyright
18 1.1 cgd * notice, this list of conditions and the following disclaimer in the
19 1.1 cgd * documentation and/or other materials provided with the distribution.
20 1.1 cgd * 3. All advertising materials mentioning features or use of this software
21 1.1 cgd * must display the following acknowledgement:
22 1.1 cgd * This product includes software developed by the University of
23 1.1 cgd * California, Berkeley and its contributors.
24 1.1 cgd * 4. Neither the name of the University nor the names of its contributors
25 1.1 cgd * may be used to endorse or promote products derived from this software
26 1.1 cgd * without specific prior written permission.
27 1.1 cgd *
28 1.1 cgd * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
29 1.1 cgd * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30 1.1 cgd * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31 1.1 cgd * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
32 1.1 cgd * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 1.1 cgd * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 1.1 cgd * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 1.1 cgd * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 1.1 cgd * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
37 1.1 cgd * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 1.1 cgd * SUCH DAMAGE.
39 1.1 cgd *
40 1.8 mycroft * from: Utah $Hdr: cpu.h 1.16 91/03/25$
41 1.8 mycroft *
42 1.9 cgd * @(#)cpu.h 8.4 (Berkeley) 1/5/94
43 1.1 cgd */
44 1.1 cgd
45 1.15 thorpej #ifndef _HP300_CPU_H_
46 1.15 thorpej #define _HP300_CPU_H_
47 1.15 thorpej
48 1.34 thorpej #if defined(_KERNEL) && !defined(_LKM)
49 1.34 thorpej #include "opt_lockdebug.h"
50 1.34 thorpej #endif
51 1.34 thorpej
52 1.1 cgd /*
53 1.1 cgd * Exported definitions unique to hp300/68k cpu support.
54 1.1 cgd */
55 1.1 cgd
56 1.1 cgd /*
57 1.20 thorpej * Get common m68k CPU definitions.
58 1.20 thorpej */
59 1.20 thorpej #include <m68k/cpu.h>
60 1.20 thorpej
61 1.20 thorpej /*
62 1.24 thorpej * Get interrupt glue.
63 1.24 thorpej */
64 1.24 thorpej #include <machine/intr.h>
65 1.24 thorpej
66 1.34 thorpej #include <sys/sched.h>
67 1.34 thorpej struct cpu_info {
68 1.34 thorpej struct schedstate_percpu ci_schedstate; /* scheduler state */
69 1.34 thorpej #if defined(DIAGNOSTIC) || defined(LOCKDEBUG)
70 1.34 thorpej u_long ci_spin_locks; /* # of spin locks held */
71 1.34 thorpej u_long ci_simple_locks; /* # of simple locks held */
72 1.34 thorpej #endif
73 1.34 thorpej };
74 1.34 thorpej
75 1.34 thorpej #ifdef _KERNEL
76 1.34 thorpej extern struct cpu_info cpu_info_store
77 1.34 thorpej
78 1.34 thorpej #define curcpu() (&cpu_info_store)
79 1.34 thorpej
80 1.24 thorpej /*
81 1.1 cgd * definitions of cpu-dependent requirements
82 1.1 cgd * referenced in generic code
83 1.1 cgd */
84 1.8 mycroft #define cpu_swapin(p) /* nothing */
85 1.8 mycroft #define cpu_wait(p) /* nothing */
86 1.13 mycroft #define cpu_swapout(p) /* nothing */
87 1.33 thorpej #define cpu_number() 0
88 1.8 mycroft
89 1.1 cgd /*
90 1.8 mycroft * Arguments to hardclock and gatherstats encapsulate the previous
91 1.8 mycroft * machine state in an opaque clockframe. One the hp300, we use
92 1.8 mycroft * what the hardware pushes on an interrupt (frame format 0).
93 1.1 cgd */
94 1.5 mycroft struct clockframe {
95 1.8 mycroft u_short sr; /* sr at time of interrupt */
96 1.8 mycroft u_long pc; /* pc at time of interrupt */
97 1.8 mycroft u_short vo; /* vector offset (4-word frame) */
98 1.5 mycroft };
99 1.1 cgd
100 1.8 mycroft #define CLKF_USERMODE(framep) (((framep)->sr & PSL_S) == 0)
101 1.8 mycroft #define CLKF_BASEPRI(framep) (((framep)->sr & PSL_IPL) == 0)
102 1.8 mycroft #define CLKF_PC(framep) ((framep)->pc)
103 1.8 mycroft #if 0
104 1.8 mycroft /* We would like to do it this way... */
105 1.8 mycroft #define CLKF_INTR(framep) (((framep)->sr & PSL_M) == 0)
106 1.8 mycroft #else
107 1.8 mycroft /* but until we start using PSL_M, we have to do this instead */
108 1.8 mycroft #define CLKF_INTR(framep) (0) /* XXX */
109 1.8 mycroft #endif
110 1.1 cgd
111 1.1 cgd
112 1.1 cgd /*
113 1.1 cgd * Preempt the current process if in interrupt from user mode,
114 1.1 cgd * or after the current trap/syscall if in system mode.
115 1.1 cgd */
116 1.28 scottr extern int want_resched; /* resched() was called */
117 1.1 cgd #define need_resched() { want_resched++; aston(); }
118 1.1 cgd
119 1.1 cgd /*
120 1.8 mycroft * Give a profiling tick to the current process when the user profiling
121 1.8 mycroft * buffer pages are invalid. On the hp300, request an ast to send us
122 1.8 mycroft * through trap, marking the proc as needing a profiling tick.
123 1.1 cgd */
124 1.7 cgd #define need_proftick(p) { (p)->p_flag |= P_OWEUPC; aston(); }
125 1.1 cgd
126 1.1 cgd /*
127 1.1 cgd * Notify the current process (p) that it has a signal pending,
128 1.1 cgd * process as soon as possible.
129 1.1 cgd */
130 1.1 cgd #define signotify(p) aston()
131 1.1 cgd
132 1.28 scottr extern int astpending; /* need to trap before returning to user mode */
133 1.1 cgd #define aston() (astpending++)
134 1.34 thorpej
135 1.34 thorpej #endif /* _KERNEL */
136 1.1 cgd
137 1.6 mycroft /*
138 1.6 mycroft * CTL_MACHDEP definitions.
139 1.6 mycroft */
140 1.6 mycroft #define CPU_CONSDEV 1 /* dev_t: console terminal device */
141 1.6 mycroft #define CPU_MAXID 2 /* number of valid machdep ids */
142 1.1 cgd
143 1.8 mycroft #define CTL_MACHDEP_NAMES { \
144 1.6 mycroft { 0, 0 }, \
145 1.6 mycroft { "console_device", CTLTYPE_STRUCT }, \
146 1.6 mycroft }
147 1.1 cgd
148 1.15 thorpej /*
149 1.25 thorpej * The rest of this should probably be moved to <machine/hp300spu.h>,
150 1.1 cgd * although some of it could probably be put into generic 68k headers.
151 1.1 cgd */
152 1.1 cgd
153 1.19 thorpej #ifdef _KERNEL
154 1.1 cgd extern char *intiobase, *intiolimit;
155 1.19 thorpej extern void (*vectab[]) __P((void));
156 1.17 thorpej
157 1.22 scottr struct frame;
158 1.22 scottr struct fpframe;
159 1.22 scottr struct pcb;
160 1.21 thorpej
161 1.21 thorpej /* locore.s functions */
162 1.22 scottr void m68881_save __P((struct fpframe *));
163 1.22 scottr void m68881_restore __P((struct fpframe *));
164 1.22 scottr void DCIA __P((void));
165 1.22 scottr void DCIS __P((void));
166 1.22 scottr void DCIU __P((void));
167 1.22 scottr void ICIA __P((void));
168 1.22 scottr void ICPA __P((void));
169 1.22 scottr void PCIA __P((void));
170 1.22 scottr void TBIA __P((void));
171 1.29 kleink void TBIS __P((vaddr_t));
172 1.22 scottr void TBIAS __P((void));
173 1.22 scottr void TBIAU __P((void));
174 1.22 scottr #if defined(M68040)
175 1.22 scottr void DCFA __P((void));
176 1.29 kleink void DCFP __P((paddr_t));
177 1.29 kleink void DCFL __P((paddr_t));
178 1.29 kleink void DCPL __P((paddr_t));
179 1.29 kleink void DCPP __P((paddr_t));
180 1.29 kleink void ICPL __P((paddr_t));
181 1.29 kleink void ICPP __P((paddr_t));
182 1.22 scottr #endif
183 1.22 scottr int suline __P((caddr_t, caddr_t));
184 1.22 scottr void savectx __P((struct pcb *));
185 1.22 scottr void switch_exit __P((struct proc *));
186 1.22 scottr void proc_trampoline __P((void));
187 1.22 scottr void loadustp __P((int));
188 1.22 scottr
189 1.18 scottr void doboot __P((void))
190 1.17 thorpej __attribute__((__noreturn__));
191 1.21 thorpej void ecacheon __P((void));
192 1.21 thorpej void ecacheoff __P((void));
193 1.26 thorpej
194 1.26 thorpej /* clock.c functions */
195 1.26 thorpej void hp300_calibrate_delay __P((void));
196 1.21 thorpej
197 1.21 thorpej /* machdep.c functions */
198 1.21 thorpej int badaddr __P((caddr_t));
199 1.21 thorpej int badbaddr __P((caddr_t));
200 1.22 scottr
201 1.22 scottr /* sys_machdep.c functions */
202 1.32 is int cachectl1 __P((unsigned long, vaddr_t, size_t, struct proc *));
203 1.22 scottr
204 1.22 scottr /* vm_machdep.c functions */
205 1.22 scottr void physaccess __P((caddr_t, caddr_t, int, int));
206 1.22 scottr void physunaccess __P((caddr_t, int));
207 1.22 scottr int kvtop __P((caddr_t));
208 1.30 thorpej
209 1.30 thorpej /* trap.c functions */
210 1.30 thorpej void child_return __P((void *));
211 1.8 mycroft
212 1.8 mycroft /* what is this supposed to do? i.e. how is it different than startrtclock? */
213 1.8 mycroft #define enablertclock()
214 1.8 mycroft
215 1.1 cgd #endif
216 1.1 cgd
217 1.1 cgd /* physical memory sections */
218 1.1 cgd #define ROMBASE (0x00000000)
219 1.1 cgd #define INTIOBASE (0x00400000)
220 1.1 cgd #define INTIOTOP (0x00600000)
221 1.1 cgd #define EXTIOBASE (0x00600000)
222 1.1 cgd #define EXTIOTOP (0x20000000)
223 1.1 cgd #define MAXADDR (0xFFFFF000)
224 1.1 cgd
225 1.1 cgd /*
226 1.1 cgd * Internal IO space:
227 1.1 cgd *
228 1.1 cgd * Ranges from 0x400000 to 0x600000 (IIOMAPSIZE).
229 1.1 cgd *
230 1.1 cgd * Internal IO space is mapped in the kernel from ``intiobase'' to
231 1.1 cgd * ``intiolimit'' (defined in locore.s). Since it is always mapped,
232 1.1 cgd * conversion between physical and kernel virtual addresses is easy.
233 1.1 cgd */
234 1.1 cgd #define ISIIOVA(va) \
235 1.1 cgd ((char *)(va) >= intiobase && (char *)(va) < intiolimit)
236 1.1 cgd #define IIOV(pa) ((int)(pa)-INTIOBASE+(int)intiobase)
237 1.1 cgd #define IIOP(va) ((int)(va)-(int)intiobase+INTIOBASE)
238 1.1 cgd #define IIOPOFF(pa) ((int)(pa)-INTIOBASE)
239 1.1 cgd #define IIOMAPSIZE btoc(INTIOTOP-INTIOBASE) /* 2mb */
240 1.1 cgd
241 1.1 cgd /*
242 1.1 cgd * External IO space:
243 1.1 cgd *
244 1.1 cgd * DIO ranges from select codes 0-63 at physical addresses given by:
245 1.1 cgd * 0x600000 + (sc - 32) * 0x10000
246 1.1 cgd * DIO cards are addressed in the range 0-31 [0x600000-0x800000) for
247 1.1 cgd * their control space and the remaining areas, [0x200000-0x400000) and
248 1.1 cgd * [0x800000-0x1000000), are for additional space required by a card;
249 1.1 cgd * e.g. a display framebuffer.
250 1.1 cgd *
251 1.1 cgd * DIO-II ranges from select codes 132-255 at physical addresses given by:
252 1.1 cgd * 0x1000000 + (sc - 132) * 0x400000
253 1.1 cgd * The address range of DIO-II space is thus [0x1000000-0x20000000).
254 1.1 cgd *
255 1.1 cgd * DIO/DIO-II space is too large to map in its entirety, instead devices
256 1.1 cgd * are mapped into kernel virtual address space allocated from a range
257 1.1 cgd * of EIOMAPSIZE pages (vmparam.h) starting at ``extiobase''.
258 1.1 cgd */
259 1.1 cgd #define DIOBASE (0x600000)
260 1.1 cgd #define DIOTOP (0x1000000)
261 1.1 cgd #define DIOCSIZE (0x10000)
262 1.1 cgd #define DIOIIBASE (0x01000000)
263 1.1 cgd #define DIOIITOP (0x20000000)
264 1.1 cgd #define DIOIICSIZE (0x00400000)
265 1.1 cgd
266 1.1 cgd /*
267 1.1 cgd * HP MMU
268 1.1 cgd */
269 1.1 cgd #define MMUBASE IIOPOFF(0x5F4000)
270 1.1 cgd #define MMUSSTP 0x0
271 1.1 cgd #define MMUUSTP 0x4
272 1.1 cgd #define MMUTBINVAL 0x8
273 1.1 cgd #define MMUSTAT 0xC
274 1.1 cgd #define MMUCMD MMUSTAT
275 1.1 cgd
276 1.1 cgd #define MMU_UMEN 0x0001 /* enable user mapping */
277 1.1 cgd #define MMU_SMEN 0x0002 /* enable supervisor mapping */
278 1.1 cgd #define MMU_CEN 0x0004 /* enable data cache */
279 1.1 cgd #define MMU_BERR 0x0008 /* bus error */
280 1.1 cgd #define MMU_IEN 0x0020 /* enable instruction cache */
281 1.1 cgd #define MMU_FPE 0x0040 /* enable 68881 FP coprocessor */
282 1.1 cgd #define MMU_WPF 0x2000 /* write protect fault */
283 1.1 cgd #define MMU_PF 0x4000 /* page fault */
284 1.1 cgd #define MMU_PTF 0x8000 /* page table fault */
285 1.1 cgd
286 1.1 cgd #define MMU_FAULT (MMU_PTF|MMU_PF|MMU_WPF|MMU_BERR)
287 1.1 cgd #define MMU_ENAB (MMU_UMEN|MMU_SMEN|MMU_IEN|MMU_FPE)
288 1.15 thorpej
289 1.15 thorpej #endif /* _HP300_CPU_H_ */
290