cpu.h revision 1.38.8.4 1 1.38.8.4 nathanw /* $NetBSD: cpu.h,v 1.38.8.4 2002/11/11 21:58:32 nathanw Exp $ */
2 1.38.8.2 scw
3 1.38.8.2 scw /*
4 1.38.8.2 scw * Copyright (c) 1988 University of Utah.
5 1.38.8.2 scw * Copyright (c) 1982, 1990, 1993
6 1.38.8.2 scw * The Regents of the University of California. All rights reserved.
7 1.38.8.2 scw *
8 1.38.8.2 scw * This code is derived from software contributed to Berkeley by
9 1.38.8.2 scw * the Systems Programming Group of the University of Utah Computer
10 1.38.8.2 scw * Science Department.
11 1.38.8.2 scw *
12 1.38.8.2 scw * Redistribution and use in source and binary forms, with or without
13 1.38.8.2 scw * modification, are permitted provided that the following conditions
14 1.38.8.2 scw * are met:
15 1.38.8.2 scw * 1. Redistributions of source code must retain the above copyright
16 1.38.8.2 scw * notice, this list of conditions and the following disclaimer.
17 1.38.8.2 scw * 2. Redistributions in binary form must reproduce the above copyright
18 1.38.8.2 scw * notice, this list of conditions and the following disclaimer in the
19 1.38.8.2 scw * documentation and/or other materials provided with the distribution.
20 1.38.8.2 scw * 3. All advertising materials mentioning features or use of this software
21 1.38.8.2 scw * must display the following acknowledgement:
22 1.38.8.2 scw * This product includes software developed by the University of
23 1.38.8.2 scw * California, Berkeley and its contributors.
24 1.38.8.2 scw * 4. Neither the name of the University nor the names of its contributors
25 1.38.8.2 scw * may be used to endorse or promote products derived from this software
26 1.38.8.2 scw * without specific prior written permission.
27 1.38.8.2 scw *
28 1.38.8.2 scw * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
29 1.38.8.2 scw * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30 1.38.8.2 scw * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31 1.38.8.2 scw * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
32 1.38.8.2 scw * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 1.38.8.2 scw * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 1.38.8.2 scw * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 1.38.8.2 scw * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 1.38.8.2 scw * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
37 1.38.8.2 scw * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 1.38.8.2 scw * SUCH DAMAGE.
39 1.38.8.2 scw *
40 1.38.8.2 scw * from: Utah $Hdr: cpu.h 1.16 91/03/25$
41 1.38.8.2 scw *
42 1.38.8.2 scw * @(#)cpu.h 8.4 (Berkeley) 1/5/94
43 1.38.8.2 scw */
44 1.38.8.2 scw
45 1.38.8.2 scw #ifndef _HP300_CPU_H_
46 1.38.8.2 scw #define _HP300_CPU_H_
47 1.38.8.2 scw
48 1.38.8.2 scw #if defined(_KERNEL_OPT)
49 1.38.8.2 scw #include "opt_lockdebug.h"
50 1.38.8.2 scw #endif
51 1.38.8.2 scw
52 1.38.8.2 scw /*
53 1.38.8.2 scw * Exported definitions unique to hp300/68k cpu support.
54 1.38.8.2 scw */
55 1.38.8.2 scw
56 1.38.8.2 scw /*
57 1.38.8.2 scw * Get common m68k CPU definitions.
58 1.38.8.2 scw */
59 1.38.8.2 scw #include <m68k/cpu.h>
60 1.38.8.4 nathanw #include <machine/hp300spu.h>
61 1.38.8.2 scw
62 1.38.8.2 scw /*
63 1.38.8.2 scw * Get interrupt glue.
64 1.38.8.2 scw */
65 1.38.8.2 scw #include <machine/intr.h>
66 1.38.8.2 scw
67 1.38.8.2 scw #include <sys/sched.h>
68 1.38.8.2 scw struct cpu_info {
69 1.38.8.2 scw struct schedstate_percpu ci_schedstate; /* scheduler state */
70 1.38.8.2 scw #if defined(DIAGNOSTIC) || defined(LOCKDEBUG)
71 1.38.8.2 scw u_long ci_spin_locks; /* # of spin locks held */
72 1.38.8.2 scw u_long ci_simple_locks; /* # of simple locks held */
73 1.38.8.2 scw #endif
74 1.38.8.2 scw };
75 1.38.8.2 scw
76 1.38.8.2 scw #ifdef _KERNEL
77 1.38.8.2 scw extern struct cpu_info cpu_info_store;
78 1.38.8.2 scw
79 1.38.8.2 scw #define curcpu() (&cpu_info_store)
80 1.38.8.2 scw
81 1.38.8.2 scw /*
82 1.38.8.2 scw * definitions of cpu-dependent requirements
83 1.38.8.2 scw * referenced in generic code
84 1.38.8.2 scw */
85 1.38.8.2 scw #define cpu_swapin(p) /* nothing */
86 1.38.8.2 scw #define cpu_wait(p) /* nothing */
87 1.38.8.2 scw #define cpu_swapout(p) /* nothing */
88 1.38.8.2 scw #define cpu_number() 0
89 1.38.8.2 scw
90 1.38.8.3 thorpej void cpu_proc_fork(struct proc *, struct proc *);
91 1.38.8.3 thorpej
92 1.38.8.2 scw /*
93 1.38.8.2 scw * Arguments to hardclock and gatherstats encapsulate the previous
94 1.38.8.2 scw * machine state in an opaque clockframe. One the hp300, we use
95 1.38.8.2 scw * what the hardware pushes on an interrupt (frame format 0).
96 1.38.8.2 scw */
97 1.38.8.2 scw struct clockframe {
98 1.38.8.2 scw u_short sr; /* sr at time of interrupt */
99 1.38.8.2 scw u_long pc; /* pc at time of interrupt */
100 1.38.8.2 scw u_short vo; /* vector offset (4-word frame) */
101 1.38.8.2 scw };
102 1.38.8.2 scw
103 1.38.8.2 scw #define CLKF_USERMODE(framep) (((framep)->sr & PSL_S) == 0)
104 1.38.8.2 scw #define CLKF_BASEPRI(framep) (((framep)->sr & PSL_IPL) == 0)
105 1.38.8.2 scw #define CLKF_PC(framep) ((framep)->pc)
106 1.38.8.2 scw #if 0
107 1.38.8.2 scw /* We would like to do it this way... */
108 1.38.8.2 scw #define CLKF_INTR(framep) (((framep)->sr & PSL_M) == 0)
109 1.38.8.2 scw #else
110 1.38.8.2 scw /* but until we start using PSL_M, we have to do this instead */
111 1.38.8.2 scw #define CLKF_INTR(framep) (0) /* XXX */
112 1.38.8.2 scw #endif
113 1.38.8.2 scw
114 1.38.8.2 scw
115 1.38.8.2 scw /*
116 1.38.8.2 scw * Preempt the current process if in interrupt from user mode,
117 1.38.8.2 scw * or after the current trap/syscall if in system mode.
118 1.38.8.2 scw */
119 1.38.8.2 scw extern int want_resched; /* resched() was called */
120 1.38.8.2 scw #define need_resched(ci) { want_resched++; aston(); }
121 1.38.8.2 scw
122 1.38.8.2 scw /*
123 1.38.8.2 scw * Give a profiling tick to the current process when the user profiling
124 1.38.8.2 scw * buffer pages are invalid. On the hp300, request an ast to send us
125 1.38.8.2 scw * through trap, marking the proc as needing a profiling tick.
126 1.38.8.2 scw */
127 1.38.8.2 scw #define need_proftick(p) { (p)->p_flag |= P_OWEUPC; aston(); }
128 1.38.8.2 scw
129 1.38.8.2 scw /*
130 1.38.8.2 scw * Notify the current process (p) that it has a signal pending,
131 1.38.8.2 scw * process as soon as possible.
132 1.38.8.2 scw */
133 1.38.8.2 scw #define signotify(p) aston()
134 1.38.8.2 scw
135 1.38.8.2 scw extern int astpending; /* need to trap before returning to user mode */
136 1.38.8.2 scw #define aston() (astpending++)
137 1.38.8.2 scw
138 1.38.8.2 scw #endif /* _KERNEL */
139 1.38.8.2 scw
140 1.38.8.2 scw /*
141 1.38.8.2 scw * CTL_MACHDEP definitions.
142 1.38.8.2 scw */
143 1.38.8.2 scw #define CPU_CONSDEV 1 /* dev_t: console terminal device */
144 1.38.8.2 scw #define CPU_MAXID 2 /* number of valid machdep ids */
145 1.38.8.2 scw
146 1.38.8.2 scw #define CTL_MACHDEP_NAMES { \
147 1.38.8.2 scw { 0, 0 }, \
148 1.38.8.2 scw { "console_device", CTLTYPE_STRUCT }, \
149 1.38.8.2 scw }
150 1.38.8.2 scw
151 1.38.8.2 scw /*
152 1.38.8.2 scw * The rest of this should probably be moved to <machine/hp300spu.h>,
153 1.38.8.2 scw * although some of it could probably be put into generic 68k headers.
154 1.38.8.2 scw */
155 1.38.8.2 scw
156 1.38.8.2 scw #ifdef _KERNEL
157 1.38.8.2 scw extern char *intiobase, *intiolimit;
158 1.38.8.2 scw extern void (*vectab[]) __P((void));
159 1.38.8.2 scw
160 1.38.8.2 scw struct frame;
161 1.38.8.2 scw struct fpframe;
162 1.38.8.2 scw struct pcb;
163 1.38.8.2 scw
164 1.38.8.2 scw /* locore.s functions */
165 1.38.8.2 scw void m68881_save __P((struct fpframe *));
166 1.38.8.2 scw void m68881_restore __P((struct fpframe *));
167 1.38.8.2 scw int suline __P((caddr_t, caddr_t));
168 1.38.8.2 scw void savectx __P((struct pcb *));
169 1.38.8.2 scw void switch_exit __P((struct lwp *));
170 1.38.8.2 scw void switch_lwp_exit __P((struct lwp *));
171 1.38.8.2 scw void proc_trampoline __P((void));
172 1.38.8.2 scw void loadustp __P((int));
173 1.38.8.2 scw
174 1.38.8.2 scw void doboot __P((void))
175 1.38.8.2 scw __attribute__((__noreturn__));
176 1.38.8.2 scw void ecacheon __P((void));
177 1.38.8.2 scw void ecacheoff __P((void));
178 1.38.8.2 scw
179 1.38.8.2 scw /* clock.c functions */
180 1.38.8.2 scw void hp300_calibrate_delay __P((void));
181 1.38.8.2 scw
182 1.38.8.2 scw /* machdep.c functions */
183 1.38.8.2 scw int badaddr __P((caddr_t));
184 1.38.8.2 scw int badbaddr __P((caddr_t));
185 1.38.8.2 scw
186 1.38.8.2 scw /* sys_machdep.c functions */
187 1.38.8.2 scw int cachectl1 __P((unsigned long, vaddr_t, size_t, struct proc *));
188 1.38.8.2 scw
189 1.38.8.2 scw /* vm_machdep.c functions */
190 1.38.8.2 scw void physaccess __P((caddr_t, caddr_t, int, int));
191 1.38.8.2 scw void physunaccess __P((caddr_t, int));
192 1.38.8.2 scw int kvtop __P((caddr_t));
193 1.38.8.2 scw
194 1.38.8.2 scw /* what is this supposed to do? i.e. how is it different than startrtclock? */
195 1.38.8.2 scw #define enablertclock()
196 1.38.8.2 scw
197 1.38.8.2 scw #endif
198 1.38.8.2 scw
199 1.38.8.2 scw /* physical memory sections */
200 1.38.8.2 scw #define ROMBASE (0x00000000)
201 1.38.8.2 scw #define INTIOBASE (0x00400000)
202 1.38.8.2 scw #define INTIOTOP (0x00600000)
203 1.38.8.2 scw #define EXTIOBASE (0x00600000)
204 1.38.8.2 scw #define EXTIOTOP (0x20000000)
205 1.38.8.2 scw #define MAXADDR (0xFFFFF000)
206 1.38.8.2 scw
207 1.38.8.2 scw /*
208 1.38.8.2 scw * Internal IO space:
209 1.38.8.2 scw *
210 1.38.8.2 scw * Ranges from 0x400000 to 0x600000 (IIOMAPSIZE).
211 1.38.8.2 scw *
212 1.38.8.2 scw * Internal IO space is mapped in the kernel from ``intiobase'' to
213 1.38.8.2 scw * ``intiolimit'' (defined in locore.s). Since it is always mapped,
214 1.38.8.2 scw * conversion between physical and kernel virtual addresses is easy.
215 1.38.8.2 scw */
216 1.38.8.2 scw #define ISIIOVA(va) \
217 1.38.8.2 scw ((char *)(va) >= intiobase && (char *)(va) < intiolimit)
218 1.38.8.2 scw #define IIOV(pa) ((int)(pa)-INTIOBASE+(int)intiobase)
219 1.38.8.2 scw #define IIOP(va) ((int)(va)-(int)intiobase+INTIOBASE)
220 1.38.8.2 scw #define IIOPOFF(pa) ((int)(pa)-INTIOBASE)
221 1.38.8.2 scw #define IIOMAPSIZE btoc(INTIOTOP-INTIOBASE) /* 2mb */
222 1.38.8.2 scw
223 1.38.8.2 scw /*
224 1.38.8.2 scw * External IO space:
225 1.38.8.2 scw *
226 1.38.8.2 scw * DIO ranges from select codes 0-63 at physical addresses given by:
227 1.38.8.2 scw * 0x600000 + (sc - 32) * 0x10000
228 1.38.8.2 scw * DIO cards are addressed in the range 0-31 [0x600000-0x800000) for
229 1.38.8.2 scw * their control space and the remaining areas, [0x200000-0x400000) and
230 1.38.8.2 scw * [0x800000-0x1000000), are for additional space required by a card;
231 1.38.8.2 scw * e.g. a display framebuffer.
232 1.38.8.2 scw *
233 1.38.8.2 scw * DIO-II ranges from select codes 132-255 at physical addresses given by:
234 1.38.8.2 scw * 0x1000000 + (sc - 132) * 0x400000
235 1.38.8.2 scw * The address range of DIO-II space is thus [0x1000000-0x20000000).
236 1.38.8.2 scw *
237 1.38.8.2 scw * DIO/DIO-II space is too large to map in its entirety, instead devices
238 1.38.8.2 scw * are mapped into kernel virtual address space allocated from a range
239 1.38.8.2 scw * of EIOMAPSIZE pages (vmparam.h) starting at ``extiobase''.
240 1.38.8.2 scw */
241 1.38.8.2 scw #define DIOBASE (0x600000)
242 1.38.8.2 scw #define DIOTOP (0x1000000)
243 1.38.8.2 scw #define DIOCSIZE (0x10000)
244 1.38.8.2 scw #define DIOIIBASE (0x01000000)
245 1.38.8.2 scw #define DIOIITOP (0x20000000)
246 1.38.8.2 scw #define DIOIICSIZE (0x00400000)
247 1.38.8.2 scw
248 1.38.8.2 scw /*
249 1.38.8.2 scw * HP MMU
250 1.38.8.2 scw */
251 1.38.8.2 scw #define MMUBASE IIOPOFF(0x5F4000)
252 1.38.8.2 scw #define MMUSSTP 0x0
253 1.38.8.2 scw #define MMUUSTP 0x4
254 1.38.8.2 scw #define MMUTBINVAL 0x8
255 1.38.8.2 scw #define MMUSTAT 0xC
256 1.38.8.2 scw #define MMUCMD MMUSTAT
257 1.38.8.2 scw
258 1.38.8.2 scw #define MMU_UMEN 0x0001 /* enable user mapping */
259 1.38.8.2 scw #define MMU_SMEN 0x0002 /* enable supervisor mapping */
260 1.38.8.2 scw #define MMU_CEN 0x0004 /* enable data cache */
261 1.38.8.2 scw #define MMU_BERR 0x0008 /* bus error */
262 1.38.8.2 scw #define MMU_IEN 0x0020 /* enable instruction cache */
263 1.38.8.2 scw #define MMU_FPE 0x0040 /* enable 68881 FP coprocessor */
264 1.38.8.2 scw #define MMU_WPF 0x2000 /* write protect fault */
265 1.38.8.2 scw #define MMU_PF 0x4000 /* page fault */
266 1.38.8.2 scw #define MMU_PTF 0x8000 /* page table fault */
267 1.38.8.2 scw
268 1.38.8.2 scw #define MMU_FAULT (MMU_PTF|MMU_PF|MMU_WPF|MMU_BERR)
269 1.38.8.2 scw #define MMU_ENAB (MMU_UMEN|MMU_SMEN|MMU_IEN|MMU_FPE)
270 1.38.8.2 scw
271 1.38.8.4 nathanw #if defined(CACHE_HAVE_PAC) || defined(CACHE_HAVE_VAC)
272 1.38.8.4 nathanw #define M68K_CACHEOPS_MACHDEP
273 1.38.8.4 nathanw #endif
274 1.38.8.4 nathanw
275 1.38.8.4 nathanw #ifdef CACHE_HAVE_PAC
276 1.38.8.4 nathanw #define M68K_CACHEOPS_MACHDEP_PCIA
277 1.38.8.4 nathanw #endif
278 1.38.8.4 nathanw
279 1.38.8.4 nathanw #ifdef CACHE_HAVE_VAC
280 1.38.8.4 nathanw #define M68K_CACHEOPS_MACHDEP_DCIA
281 1.38.8.4 nathanw #define M68K_CACHEOPS_MACHDEP_DCIS
282 1.38.8.4 nathanw #define M68K_CACHEOPS_MACHDEP_DCIU
283 1.38.8.4 nathanw #define M68K_CACHEOPS_MACHDEP_TBIA
284 1.38.8.4 nathanw #define M68K_CACHEOPS_MACHDEP_TBIS
285 1.38.8.4 nathanw #define M68K_CACHEOPS_MACHDEP_TBIAS
286 1.38.8.4 nathanw #define M68K_CACHEOPS_MACHDEP_TBIAU
287 1.38.8.4 nathanw #endif
288 1.38.8.4 nathanw
289 1.38.8.2 scw #endif /* _HP300_CPU_H_ */
290