cpu.h revision 1.68.6.1 1 1.68.6.1 skrll /* $NetBSD: cpu.h,v 1.68.6.1 2017/02/05 13:40:11 skrll Exp $ */
2 1.9 cgd
3 1.1 cgd /*
4 1.65 rmind * Copyright (c) 1988 University of Utah.
5 1.8 mycroft * Copyright (c) 1982, 1990, 1993
6 1.8 mycroft * The Regents of the University of California. All rights reserved.
7 1.42 agc *
8 1.42 agc * This code is derived from software contributed to Berkeley by
9 1.42 agc * the Systems Programming Group of the University of Utah Computer
10 1.42 agc * Science Department.
11 1.42 agc *
12 1.42 agc * Redistribution and use in source and binary forms, with or without
13 1.42 agc * modification, are permitted provided that the following conditions
14 1.42 agc * are met:
15 1.42 agc * 1. Redistributions of source code must retain the above copyright
16 1.42 agc * notice, this list of conditions and the following disclaimer.
17 1.42 agc * 2. Redistributions in binary form must reproduce the above copyright
18 1.42 agc * notice, this list of conditions and the following disclaimer in the
19 1.42 agc * documentation and/or other materials provided with the distribution.
20 1.42 agc * 3. Neither the name of the University nor the names of its contributors
21 1.42 agc * may be used to endorse or promote products derived from this software
22 1.42 agc * without specific prior written permission.
23 1.42 agc *
24 1.42 agc * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25 1.42 agc * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 1.42 agc * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 1.42 agc * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28 1.42 agc * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 1.42 agc * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 1.42 agc * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 1.42 agc * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 1.42 agc * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 1.42 agc * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 1.42 agc * SUCH DAMAGE.
35 1.42 agc *
36 1.42 agc * from: Utah $Hdr: cpu.h 1.16 91/03/25$
37 1.42 agc *
38 1.42 agc * @(#)cpu.h 8.4 (Berkeley) 1/5/94
39 1.42 agc */
40 1.1 cgd
41 1.15 thorpej #ifndef _HP300_CPU_H_
42 1.15 thorpej #define _HP300_CPU_H_
43 1.15 thorpej
44 1.38 mrg #if defined(_KERNEL_OPT)
45 1.34 thorpej #include "opt_lockdebug.h"
46 1.34 thorpej #endif
47 1.34 thorpej
48 1.1 cgd /*
49 1.67 tsutsui * Get common m68k CPU definitions.
50 1.1 cgd */
51 1.67 tsutsui #include <m68k/cpu.h>
52 1.1 cgd
53 1.67 tsutsui #if defined(_KERNEL)
54 1.1 cgd /*
55 1.67 tsutsui * Exported definitions unique to hp300/68k cpu support.
56 1.20 thorpej */
57 1.39 chs #include <machine/hp300spu.h>
58 1.20 thorpej
59 1.20 thorpej /*
60 1.24 thorpej * Get interrupt glue.
61 1.24 thorpej */
62 1.24 thorpej #include <machine/intr.h>
63 1.24 thorpej
64 1.1 cgd /*
65 1.8 mycroft * Arguments to hardclock and gatherstats encapsulate the previous
66 1.68.6.1 skrll * machine state in an opaque clockframe. On the hp300, we use
67 1.8 mycroft * what the hardware pushes on an interrupt (frame format 0).
68 1.1 cgd */
69 1.5 mycroft struct clockframe {
70 1.8 mycroft u_short sr; /* sr at time of interrupt */
71 1.8 mycroft u_long pc; /* pc at time of interrupt */
72 1.8 mycroft u_short vo; /* vector offset (4-word frame) */
73 1.5 mycroft };
74 1.1 cgd
75 1.8 mycroft #define CLKF_USERMODE(framep) (((framep)->sr & PSL_S) == 0)
76 1.8 mycroft #define CLKF_PC(framep) ((framep)->pc)
77 1.8 mycroft #if 0
78 1.8 mycroft /* We would like to do it this way... */
79 1.8 mycroft #define CLKF_INTR(framep) (((framep)->sr & PSL_M) == 0)
80 1.8 mycroft #else
81 1.8 mycroft /* but until we start using PSL_M, we have to do this instead */
82 1.58 tsutsui #include <machine/intr.h>
83 1.58 tsutsui #define CLKF_INTR(framep) (idepth > 1) /* XXX */
84 1.8 mycroft #endif
85 1.1 cgd
86 1.1 cgd
87 1.1 cgd /*
88 1.1 cgd * Preempt the current process if in interrupt from user mode,
89 1.1 cgd * or after the current trap/syscall if in system mode.
90 1.1 cgd */
91 1.68 christos #define cpu_need_resched(ci,flags) do { \
92 1.68 christos __USE(flags); \
93 1.68 christos ci->ci_want_resched = 1; \
94 1.68 christos aston(); \
95 1.68 christos } while (/*CONSTCOND*/0)
96 1.1 cgd
97 1.1 cgd /*
98 1.8 mycroft * Give a profiling tick to the current process when the user profiling
99 1.8 mycroft * buffer pages are invalid. On the hp300, request an ast to send us
100 1.8 mycroft * through trap, marking the proc as needing a profiling tick.
101 1.1 cgd */
102 1.52 tsutsui #define cpu_need_proftick(l) \
103 1.60 rmind do { (l)->l_pflag |= LP_OWEUPC; aston(); } while (/* CONSTCOND */0)
104 1.1 cgd
105 1.1 cgd /*
106 1.1 cgd * Notify the current process (p) that it has a signal pending,
107 1.1 cgd * process as soon as possible.
108 1.1 cgd */
109 1.48 tsutsui #define cpu_signotify(l) aston()
110 1.1 cgd
111 1.28 scottr extern int astpending; /* need to trap before returning to user mode */
112 1.1 cgd #define aston() (astpending++)
113 1.34 thorpej
114 1.34 thorpej #endif /* _KERNEL */
115 1.1 cgd
116 1.6 mycroft /*
117 1.6 mycroft * CTL_MACHDEP definitions.
118 1.6 mycroft */
119 1.6 mycroft #define CPU_CONSDEV 1 /* dev_t: console terminal device */
120 1.6 mycroft #define CPU_MAXID 2 /* number of valid machdep ids */
121 1.1 cgd
122 1.15 thorpej /*
123 1.25 thorpej * The rest of this should probably be moved to <machine/hp300spu.h>,
124 1.1 cgd * although some of it could probably be put into generic 68k headers.
125 1.1 cgd */
126 1.1 cgd
127 1.19 thorpej #ifdef _KERNEL
128 1.56 tsutsui extern uint8_t *intiobase, *intiolimit, *extiobase;
129 1.44 thorpej extern void (*vectab[])(void);
130 1.17 thorpej
131 1.21 thorpej /* locore.s functions */
132 1.50 christos int suline(void *, void *);
133 1.44 thorpej void loadustp(int);
134 1.44 thorpej
135 1.44 thorpej void doboot(void) __attribute__((__noreturn__));
136 1.44 thorpej void ecacheon(void);
137 1.44 thorpej void ecacheoff(void);
138 1.26 thorpej
139 1.26 thorpej /* clock.c functions */
140 1.44 thorpej void hp300_calibrate_delay(void);
141 1.21 thorpej
142 1.21 thorpej /* machdep.c functions */
143 1.50 christos int badaddr(void *);
144 1.50 christos int badbaddr(void *);
145 1.22 scottr
146 1.8 mycroft /* what is this supposed to do? i.e. how is it different than startrtclock? */
147 1.8 mycroft #define enablertclock()
148 1.8 mycroft
149 1.1 cgd #endif
150 1.1 cgd
151 1.1 cgd /* physical memory sections */
152 1.1 cgd #define ROMBASE (0x00000000)
153 1.1 cgd #define INTIOBASE (0x00400000)
154 1.1 cgd #define INTIOTOP (0x00600000)
155 1.1 cgd #define EXTIOBASE (0x00600000)
156 1.1 cgd #define EXTIOTOP (0x20000000)
157 1.64 tsutsui #define MAXADDR ((paddr_t)(0 - NBPG))
158 1.1 cgd
159 1.1 cgd /*
160 1.1 cgd * Internal IO space:
161 1.1 cgd *
162 1.1 cgd * Ranges from 0x400000 to 0x600000 (IIOMAPSIZE).
163 1.1 cgd *
164 1.1 cgd * Internal IO space is mapped in the kernel from ``intiobase'' to
165 1.1 cgd * ``intiolimit'' (defined in locore.s). Since it is always mapped,
166 1.1 cgd * conversion between physical and kernel virtual addresses is easy.
167 1.1 cgd */
168 1.1 cgd #define ISIIOVA(va) \
169 1.56 tsutsui ((uint8_t *)(va) >= intiobase && (uint8_t *)(va) < intiolimit)
170 1.56 tsutsui #define IIOV(pa) ((paddr_t)(pa)-INTIOBASE+(vaddr_t)intiobase)
171 1.56 tsutsui #define IIOP(va) ((vaddr_t)(va)-(vaddr_t)intiobase+INTIOBASE)
172 1.56 tsutsui #define IIOPOFF(pa) ((paddr_t)(pa)-INTIOBASE)
173 1.1 cgd #define IIOMAPSIZE btoc(INTIOTOP-INTIOBASE) /* 2mb */
174 1.1 cgd
175 1.1 cgd /*
176 1.1 cgd * External IO space:
177 1.1 cgd *
178 1.1 cgd * DIO ranges from select codes 0-63 at physical addresses given by:
179 1.1 cgd * 0x600000 + (sc - 32) * 0x10000
180 1.1 cgd * DIO cards are addressed in the range 0-31 [0x600000-0x800000) for
181 1.1 cgd * their control space and the remaining areas, [0x200000-0x400000) and
182 1.1 cgd * [0x800000-0x1000000), are for additional space required by a card;
183 1.1 cgd * e.g. a display framebuffer.
184 1.1 cgd *
185 1.1 cgd * DIO-II ranges from select codes 132-255 at physical addresses given by:
186 1.1 cgd * 0x1000000 + (sc - 132) * 0x400000
187 1.1 cgd * The address range of DIO-II space is thus [0x1000000-0x20000000).
188 1.1 cgd *
189 1.1 cgd * DIO/DIO-II space is too large to map in its entirety, instead devices
190 1.1 cgd * are mapped into kernel virtual address space allocated from a range
191 1.1 cgd * of EIOMAPSIZE pages (vmparam.h) starting at ``extiobase''.
192 1.1 cgd */
193 1.1 cgd #define DIOBASE (0x600000)
194 1.1 cgd #define DIOTOP (0x1000000)
195 1.1 cgd #define DIOCSIZE (0x10000)
196 1.1 cgd #define DIOIIBASE (0x01000000)
197 1.1 cgd #define DIOIITOP (0x20000000)
198 1.1 cgd #define DIOIICSIZE (0x00400000)
199 1.1 cgd
200 1.1 cgd /*
201 1.1 cgd * HP MMU
202 1.1 cgd */
203 1.1 cgd #define MMUBASE IIOPOFF(0x5F4000)
204 1.1 cgd #define MMUSSTP 0x0
205 1.1 cgd #define MMUUSTP 0x4
206 1.1 cgd #define MMUTBINVAL 0x8
207 1.1 cgd #define MMUSTAT 0xC
208 1.1 cgd #define MMUCMD MMUSTAT
209 1.1 cgd
210 1.1 cgd #define MMU_UMEN 0x0001 /* enable user mapping */
211 1.1 cgd #define MMU_SMEN 0x0002 /* enable supervisor mapping */
212 1.1 cgd #define MMU_CEN 0x0004 /* enable data cache */
213 1.1 cgd #define MMU_BERR 0x0008 /* bus error */
214 1.1 cgd #define MMU_IEN 0x0020 /* enable instruction cache */
215 1.1 cgd #define MMU_FPE 0x0040 /* enable 68881 FP coprocessor */
216 1.1 cgd #define MMU_WPF 0x2000 /* write protect fault */
217 1.1 cgd #define MMU_PF 0x4000 /* page fault */
218 1.1 cgd #define MMU_PTF 0x8000 /* page table fault */
219 1.1 cgd
220 1.1 cgd #define MMU_FAULT (MMU_PTF|MMU_PF|MMU_WPF|MMU_BERR)
221 1.1 cgd #define MMU_ENAB (MMU_UMEN|MMU_SMEN|MMU_IEN|MMU_FPE)
222 1.40 chs
223 1.40 chs #if defined(CACHE_HAVE_PAC) || defined(CACHE_HAVE_VAC)
224 1.40 chs #define M68K_CACHEOPS_MACHDEP
225 1.40 chs #endif
226 1.40 chs
227 1.40 chs #ifdef CACHE_HAVE_PAC
228 1.40 chs #define M68K_CACHEOPS_MACHDEP_PCIA
229 1.40 chs #endif
230 1.40 chs
231 1.40 chs #ifdef CACHE_HAVE_VAC
232 1.40 chs #define M68K_CACHEOPS_MACHDEP_DCIA
233 1.40 chs #define M68K_CACHEOPS_MACHDEP_DCIS
234 1.40 chs #define M68K_CACHEOPS_MACHDEP_DCIU
235 1.40 chs #define M68K_CACHEOPS_MACHDEP_TBIA
236 1.40 chs #define M68K_CACHEOPS_MACHDEP_TBIS
237 1.40 chs #define M68K_CACHEOPS_MACHDEP_TBIAS
238 1.40 chs #define M68K_CACHEOPS_MACHDEP_TBIAU
239 1.40 chs #endif
240 1.15 thorpej
241 1.15 thorpej #endif /* _HP300_CPU_H_ */
242