cpu.h revision 1.78 1 1.78 thorpej /* $NetBSD: cpu.h,v 1.78 2024/01/20 00:15:31 thorpej Exp $ */
2 1.9 cgd
3 1.1 cgd /*
4 1.65 rmind * Copyright (c) 1988 University of Utah.
5 1.8 mycroft * Copyright (c) 1982, 1990, 1993
6 1.8 mycroft * The Regents of the University of California. All rights reserved.
7 1.42 agc *
8 1.42 agc * This code is derived from software contributed to Berkeley by
9 1.42 agc * the Systems Programming Group of the University of Utah Computer
10 1.42 agc * Science Department.
11 1.42 agc *
12 1.42 agc * Redistribution and use in source and binary forms, with or without
13 1.42 agc * modification, are permitted provided that the following conditions
14 1.42 agc * are met:
15 1.42 agc * 1. Redistributions of source code must retain the above copyright
16 1.42 agc * notice, this list of conditions and the following disclaimer.
17 1.42 agc * 2. Redistributions in binary form must reproduce the above copyright
18 1.42 agc * notice, this list of conditions and the following disclaimer in the
19 1.42 agc * documentation and/or other materials provided with the distribution.
20 1.42 agc * 3. Neither the name of the University nor the names of its contributors
21 1.42 agc * may be used to endorse or promote products derived from this software
22 1.42 agc * without specific prior written permission.
23 1.42 agc *
24 1.42 agc * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25 1.42 agc * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 1.42 agc * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 1.42 agc * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28 1.42 agc * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 1.42 agc * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 1.42 agc * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 1.42 agc * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 1.42 agc * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 1.42 agc * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 1.42 agc * SUCH DAMAGE.
35 1.42 agc *
36 1.42 agc * from: Utah $Hdr: cpu.h 1.16 91/03/25$
37 1.42 agc *
38 1.42 agc * @(#)cpu.h 8.4 (Berkeley) 1/5/94
39 1.42 agc */
40 1.1 cgd
41 1.15 thorpej #ifndef _HP300_CPU_H_
42 1.15 thorpej #define _HP300_CPU_H_
43 1.15 thorpej
44 1.38 mrg #if defined(_KERNEL_OPT)
45 1.34 thorpej #include "opt_lockdebug.h"
46 1.34 thorpej #endif
47 1.34 thorpej
48 1.1 cgd /*
49 1.67 tsutsui * Get common m68k CPU definitions.
50 1.1 cgd */
51 1.67 tsutsui #include <m68k/cpu.h>
52 1.1 cgd
53 1.67 tsutsui #if defined(_KERNEL)
54 1.1 cgd /*
55 1.67 tsutsui * Exported definitions unique to hp300/68k cpu support.
56 1.20 thorpej */
57 1.39 chs #include <machine/hp300spu.h>
58 1.20 thorpej
59 1.20 thorpej /*
60 1.25 thorpej * The rest of this should probably be moved to <machine/hp300spu.h>,
61 1.1 cgd * although some of it could probably be put into generic 68k headers.
62 1.1 cgd */
63 1.1 cgd
64 1.56 tsutsui extern uint8_t *intiobase, *intiolimit, *extiobase;
65 1.17 thorpej
66 1.21 thorpej /* locore.s functions */
67 1.44 thorpej void doboot(void) __attribute__((__noreturn__));
68 1.44 thorpej void ecacheon(void);
69 1.44 thorpej void ecacheoff(void);
70 1.26 thorpej
71 1.26 thorpej /* clock.c functions */
72 1.44 thorpej void hp300_calibrate_delay(void);
73 1.21 thorpej
74 1.21 thorpej /* machdep.c functions */
75 1.50 christos int badaddr(void *);
76 1.50 christos int badbaddr(void *);
77 1.22 scottr
78 1.8 mycroft /* what is this supposed to do? i.e. how is it different than startrtclock? */
79 1.8 mycroft #define enablertclock()
80 1.8 mycroft
81 1.78 thorpej #endif /* _KERNEL */
82 1.1 cgd
83 1.1 cgd /* physical memory sections */
84 1.1 cgd #define ROMBASE (0x00000000)
85 1.1 cgd #define INTIOBASE (0x00400000)
86 1.1 cgd #define INTIOTOP (0x00600000)
87 1.1 cgd #define EXTIOBASE (0x00600000)
88 1.1 cgd #define EXTIOTOP (0x20000000)
89 1.64 tsutsui #define MAXADDR ((paddr_t)(0 - NBPG))
90 1.1 cgd
91 1.1 cgd /*
92 1.1 cgd * Internal IO space:
93 1.1 cgd *
94 1.1 cgd * Ranges from 0x400000 to 0x600000 (IIOMAPSIZE).
95 1.1 cgd *
96 1.1 cgd * Internal IO space is mapped in the kernel from ``intiobase'' to
97 1.1 cgd * ``intiolimit'' (defined in locore.s). Since it is always mapped,
98 1.1 cgd * conversion between physical and kernel virtual addresses is easy.
99 1.1 cgd */
100 1.1 cgd #define ISIIOVA(va) \
101 1.56 tsutsui ((uint8_t *)(va) >= intiobase && (uint8_t *)(va) < intiolimit)
102 1.56 tsutsui #define IIOV(pa) ((paddr_t)(pa)-INTIOBASE+(vaddr_t)intiobase)
103 1.56 tsutsui #define IIOP(va) ((vaddr_t)(va)-(vaddr_t)intiobase+INTIOBASE)
104 1.56 tsutsui #define IIOPOFF(pa) ((paddr_t)(pa)-INTIOBASE)
105 1.1 cgd #define IIOMAPSIZE btoc(INTIOTOP-INTIOBASE) /* 2mb */
106 1.1 cgd
107 1.1 cgd /*
108 1.1 cgd * External IO space:
109 1.1 cgd *
110 1.1 cgd * DIO ranges from select codes 0-63 at physical addresses given by:
111 1.1 cgd * 0x600000 + (sc - 32) * 0x10000
112 1.1 cgd * DIO cards are addressed in the range 0-31 [0x600000-0x800000) for
113 1.1 cgd * their control space and the remaining areas, [0x200000-0x400000) and
114 1.1 cgd * [0x800000-0x1000000), are for additional space required by a card;
115 1.1 cgd * e.g. a display framebuffer.
116 1.1 cgd *
117 1.1 cgd * DIO-II ranges from select codes 132-255 at physical addresses given by:
118 1.1 cgd * 0x1000000 + (sc - 132) * 0x400000
119 1.1 cgd * The address range of DIO-II space is thus [0x1000000-0x20000000).
120 1.1 cgd *
121 1.1 cgd * DIO/DIO-II space is too large to map in its entirety, instead devices
122 1.1 cgd * are mapped into kernel virtual address space allocated from a range
123 1.1 cgd * of EIOMAPSIZE pages (vmparam.h) starting at ``extiobase''.
124 1.1 cgd */
125 1.1 cgd #define DIOBASE (0x600000)
126 1.1 cgd #define DIOTOP (0x1000000)
127 1.1 cgd #define DIOCSIZE (0x10000)
128 1.1 cgd #define DIOIIBASE (0x01000000)
129 1.1 cgd #define DIOIITOP (0x20000000)
130 1.1 cgd #define DIOIICSIZE (0x00400000)
131 1.1 cgd
132 1.1 cgd /*
133 1.1 cgd * HP MMU
134 1.1 cgd */
135 1.1 cgd #define MMUBASE IIOPOFF(0x5F4000)
136 1.1 cgd #define MMUSSTP 0x0
137 1.1 cgd #define MMUUSTP 0x4
138 1.1 cgd #define MMUTBINVAL 0x8
139 1.1 cgd #define MMUSTAT 0xC
140 1.1 cgd #define MMUCMD MMUSTAT
141 1.1 cgd
142 1.1 cgd #define MMU_UMEN 0x0001 /* enable user mapping */
143 1.1 cgd #define MMU_SMEN 0x0002 /* enable supervisor mapping */
144 1.1 cgd #define MMU_CEN 0x0004 /* enable data cache */
145 1.1 cgd #define MMU_BERR 0x0008 /* bus error */
146 1.1 cgd #define MMU_IEN 0x0020 /* enable instruction cache */
147 1.1 cgd #define MMU_FPE 0x0040 /* enable 68881 FP coprocessor */
148 1.1 cgd #define MMU_WPF 0x2000 /* write protect fault */
149 1.1 cgd #define MMU_PF 0x4000 /* page fault */
150 1.1 cgd #define MMU_PTF 0x8000 /* page table fault */
151 1.1 cgd
152 1.1 cgd #define MMU_FAULT (MMU_PTF|MMU_PF|MMU_WPF|MMU_BERR)
153 1.1 cgd #define MMU_ENAB (MMU_UMEN|MMU_SMEN|MMU_IEN|MMU_FPE)
154 1.40 chs
155 1.40 chs #if defined(CACHE_HAVE_PAC) || defined(CACHE_HAVE_VAC)
156 1.40 chs #define M68K_CACHEOPS_MACHDEP
157 1.40 chs #endif
158 1.40 chs
159 1.40 chs #ifdef CACHE_HAVE_PAC
160 1.40 chs #define M68K_CACHEOPS_MACHDEP_PCIA
161 1.40 chs #endif
162 1.40 chs
163 1.40 chs #ifdef CACHE_HAVE_VAC
164 1.40 chs #define M68K_CACHEOPS_MACHDEP_DCIA
165 1.40 chs #define M68K_CACHEOPS_MACHDEP_DCIS
166 1.40 chs #define M68K_CACHEOPS_MACHDEP_DCIU
167 1.40 chs #define M68K_CACHEOPS_MACHDEP_TBIA
168 1.40 chs #define M68K_CACHEOPS_MACHDEP_TBIS
169 1.40 chs #define M68K_CACHEOPS_MACHDEP_TBIAS
170 1.40 chs #define M68K_CACHEOPS_MACHDEP_TBIAU
171 1.40 chs #endif
172 1.15 thorpej
173 1.15 thorpej #endif /* _HP300_CPU_H_ */
174