cpu.h revision 1.22 1 /* $NetBSD: cpu.h,v 1.22 1997/04/01 03:03:58 scottr Exp $ */
2
3 /*
4 * Copyright (c) 1988 University of Utah.
5 * Copyright (c) 1982, 1990, 1993
6 * The Regents of the University of California. All rights reserved.
7 *
8 * This code is derived from software contributed to Berkeley by
9 * the Systems Programming Group of the University of Utah Computer
10 * Science Department.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 * 3. All advertising materials mentioning features or use of this software
21 * must display the following acknowledgement:
22 * This product includes software developed by the University of
23 * California, Berkeley and its contributors.
24 * 4. Neither the name of the University nor the names of its contributors
25 * may be used to endorse or promote products derived from this software
26 * without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 * SUCH DAMAGE.
39 *
40 * from: Utah $Hdr: cpu.h 1.16 91/03/25$
41 *
42 * @(#)cpu.h 8.4 (Berkeley) 1/5/94
43 */
44
45 #ifndef _HP300_CPU_H_
46 #define _HP300_CPU_H_
47
48 /*
49 * Exported definitions unique to hp300/68k cpu support.
50 */
51
52 /*
53 * Get common m68k CPU definitions.
54 */
55 #include <m68k/cpu.h>
56
57 /*
58 * definitions of cpu-dependent requirements
59 * referenced in generic code
60 */
61 #define cpu_swapin(p) /* nothing */
62 #define cpu_wait(p) /* nothing */
63 #define cpu_swapout(p) /* nothing */
64
65 /*
66 * Arguments to hardclock and gatherstats encapsulate the previous
67 * machine state in an opaque clockframe. One the hp300, we use
68 * what the hardware pushes on an interrupt (frame format 0).
69 */
70 struct clockframe {
71 u_short sr; /* sr at time of interrupt */
72 u_long pc; /* pc at time of interrupt */
73 u_short vo; /* vector offset (4-word frame) */
74 };
75
76 #define CLKF_USERMODE(framep) (((framep)->sr & PSL_S) == 0)
77 #define CLKF_BASEPRI(framep) (((framep)->sr & PSL_IPL) == 0)
78 #define CLKF_PC(framep) ((framep)->pc)
79 #if 0
80 /* We would like to do it this way... */
81 #define CLKF_INTR(framep) (((framep)->sr & PSL_M) == 0)
82 #else
83 /* but until we start using PSL_M, we have to do this instead */
84 #define CLKF_INTR(framep) (0) /* XXX */
85 #endif
86
87
88 /*
89 * Preempt the current process if in interrupt from user mode,
90 * or after the current trap/syscall if in system mode.
91 */
92 #define need_resched() { want_resched++; aston(); }
93
94 /*
95 * Give a profiling tick to the current process when the user profiling
96 * buffer pages are invalid. On the hp300, request an ast to send us
97 * through trap, marking the proc as needing a profiling tick.
98 */
99 #define need_proftick(p) { (p)->p_flag |= P_OWEUPC; aston(); }
100
101 /*
102 * Notify the current process (p) that it has a signal pending,
103 * process as soon as possible.
104 */
105 #define signotify(p) aston()
106
107 #define aston() (astpending++)
108
109 int astpending; /* need to trap before returning to user mode */
110 int want_resched; /* resched() was called */
111
112
113 /*
114 * simulated software interrupt register
115 */
116 extern unsigned char ssir;
117
118 #define SIR_NET 0x1
119 #define SIR_CLOCK 0x2
120
121 #define siroff(x) ssir &= ~(x)
122 #define setsoftnet() ssir |= SIR_NET
123 #define setsoftclock() ssir |= SIR_CLOCK
124
125 /*
126 * CTL_MACHDEP definitions.
127 */
128 #define CPU_CONSDEV 1 /* dev_t: console terminal device */
129 #define CPU_MAXID 2 /* number of valid machdep ids */
130
131 #define CTL_MACHDEP_NAMES { \
132 { 0, 0 }, \
133 { "console_device", CTLTYPE_STRUCT }, \
134 }
135
136 #ifdef _KERNEL
137 /*
138 * Associate HP 9000/300 models with CPU/MMU combinations.
139 */
140
141 /*
142 * HP 68020-based computers. HP320 and HP350 have an HP MMU.
143 * HP330 has a Motorola MMU.
144 */
145 #if (defined(HP320) || defined(HP330) || defined(HP350))
146 #ifndef M68020
147 #define M68020
148 #endif /* ! M68020 */
149
150 #if defined(HP330) && !defined(M68K_MMU_MOTOROLA)
151 #define M68K_MMU_MOTOROLA
152 #endif /* HP330 && ! M68K_MMU_MOTOROLA */
153
154 #if (defined(HP320) || defined(HP350)) && !defined(M68K_MMU_HP)
155 #define M68K_MMU_HP /* include cheezy VAC support */
156 #endif /* (HP320 || HP350) && ! M68K_MMU_HP */
157 #endif /* HP320 || HP330 || HP350 */
158
159 /*
160 * HP 68030-based computers. HP375 includes support for the
161 * 345, 400t, and 400s.
162 */
163 #if (defined(HP340) || defined(HP360) || defined(HP370) || defined(HP375))
164 #ifndef M68030
165 #define M68030
166 #endif /* ! M68030 */
167
168 #ifndef M68K_MMU_MOTOROLA
169 #define M68K_MMU_MOTOROLA
170 #endif /* ! M68K_MMU_MOTOROLA */
171 #endif /* HP340 || HP360 || HP370 || HP375 */
172
173 /*
174 * HP 68040-based computers. HP380 includes support for the
175 * 425t, 425s, and 433s.
176 */
177 #if defined(HP380)
178 #ifndef M68040
179 #define M68040
180 #endif /* ! M68040 */
181
182 #ifndef M68K_MMU_MOTOROLA
183 #define M68K_MMU_MOTOROLA
184 #endif /* ! M68K_MMU_MOTOROLA */
185 #endif /* HP380 */
186 #endif /* _KERNEL */
187
188 /*
189 * The rest of this should probably be moved to ../hp300/hp300cpu.h,
190 * although some of it could probably be put into generic 68k headers.
191 */
192
193 /* values for machineid */
194 #define HP_320 0 /* 16Mhz 68020+HP MMU+16K external cache */
195 #define HP_330 1 /* 16Mhz 68020+68851 MMU */
196 #define HP_350 2 /* 25Mhz 68020+HP MMU+32K external cache */
197 #define HP_360 3 /* 25Mhz 68030 */
198 #define HP_370 4 /* 33Mhz 68030+64K external cache */
199 #define HP_340 5 /* 16Mhz 68030 */
200 #define HP_375 6 /* 50Mhz 68030+32K external cache */
201 #define HP_380 7 /* 25Mhz 68040 */
202 #define HP_433 8 /* 33Mhz 68040 */
203
204 #ifdef _KERNEL
205 extern int machineid; /* CPU model */
206 extern int cpuspeed; /* CPU speed, in MHz */
207
208 extern char *intiobase, *intiolimit;
209 extern void (*vectab[]) __P((void));
210
211 struct frame;
212 struct fpframe;
213 struct pcb;
214
215 /* locore.s functions */
216 void m68881_save __P((struct fpframe *));
217 void m68881_restore __P((struct fpframe *));
218 u_long getdfc __P((void));
219 u_long getsfc __P((void));
220 void DCIA __P((void));
221 void DCIS __P((void));
222 void DCIU __P((void));
223 void ICIA __P((void));
224 void ICPA __P((void));
225 void PCIA __P((void));
226 void TBIA __P((void));
227 void TBIS __P((vm_offset_t));
228 void TBIAS __P((void));
229 void TBIAU __P((void));
230 #if defined(M68040)
231 void DCFA __P((void));
232 void DCFP __P((vm_offset_t));
233 void DCFL __P((vm_offset_t));
234 void DCPL __P((vm_offset_t));
235 void DCPP __P((vm_offset_t));
236 void ICPL __P((vm_offset_t));
237 void ICPP __P((vm_offset_t));
238 #endif
239 int suline __P((caddr_t, caddr_t));
240 void savectx __P((struct pcb *));
241 void switch_exit __P((struct proc *));
242 void proc_trampoline __P((void));
243 void loadustp __P((int));
244
245 void doboot __P((void))
246 __attribute__((__noreturn__));
247 void ecacheon __P((void));
248 void ecacheoff __P((void));
249
250 /* machdep.c functions */
251 int badaddr __P((caddr_t));
252 int badbaddr __P((caddr_t));
253 void regdump __P((struct frame *, int));
254
255 /* sys_machdep.c functions */
256 int cachectl __P((int, caddr_t, int));
257
258 /* vm_machdep.c functions */
259 void physaccess __P((caddr_t, caddr_t, int, int));
260 void physunaccess __P((caddr_t, int));
261 int kvtop __P((caddr_t));
262
263 /* what is this supposed to do? i.e. how is it different than startrtclock? */
264 #define enablertclock()
265
266 #endif
267
268 /* physical memory sections */
269 #define ROMBASE (0x00000000)
270 #define INTIOBASE (0x00400000)
271 #define INTIOTOP (0x00600000)
272 #define EXTIOBASE (0x00600000)
273 #define EXTIOTOP (0x20000000)
274 #define MAXADDR (0xFFFFF000)
275
276 /*
277 * Internal IO space:
278 *
279 * Ranges from 0x400000 to 0x600000 (IIOMAPSIZE).
280 *
281 * Internal IO space is mapped in the kernel from ``intiobase'' to
282 * ``intiolimit'' (defined in locore.s). Since it is always mapped,
283 * conversion between physical and kernel virtual addresses is easy.
284 */
285 #define ISIIOVA(va) \
286 ((char *)(va) >= intiobase && (char *)(va) < intiolimit)
287 #define IIOV(pa) ((int)(pa)-INTIOBASE+(int)intiobase)
288 #define IIOP(va) ((int)(va)-(int)intiobase+INTIOBASE)
289 #define IIOPOFF(pa) ((int)(pa)-INTIOBASE)
290 #define IIOMAPSIZE btoc(INTIOTOP-INTIOBASE) /* 2mb */
291
292 /*
293 * External IO space:
294 *
295 * DIO ranges from select codes 0-63 at physical addresses given by:
296 * 0x600000 + (sc - 32) * 0x10000
297 * DIO cards are addressed in the range 0-31 [0x600000-0x800000) for
298 * their control space and the remaining areas, [0x200000-0x400000) and
299 * [0x800000-0x1000000), are for additional space required by a card;
300 * e.g. a display framebuffer.
301 *
302 * DIO-II ranges from select codes 132-255 at physical addresses given by:
303 * 0x1000000 + (sc - 132) * 0x400000
304 * The address range of DIO-II space is thus [0x1000000-0x20000000).
305 *
306 * DIO/DIO-II space is too large to map in its entirety, instead devices
307 * are mapped into kernel virtual address space allocated from a range
308 * of EIOMAPSIZE pages (vmparam.h) starting at ``extiobase''.
309 */
310 #define DIOBASE (0x600000)
311 #define DIOTOP (0x1000000)
312 #define DIOCSIZE (0x10000)
313 #define DIOIIBASE (0x01000000)
314 #define DIOIITOP (0x20000000)
315 #define DIOIICSIZE (0x00400000)
316
317 /*
318 * HP MMU
319 */
320 #define MMUBASE IIOPOFF(0x5F4000)
321 #define MMUSSTP 0x0
322 #define MMUUSTP 0x4
323 #define MMUTBINVAL 0x8
324 #define MMUSTAT 0xC
325 #define MMUCMD MMUSTAT
326
327 #define MMU_UMEN 0x0001 /* enable user mapping */
328 #define MMU_SMEN 0x0002 /* enable supervisor mapping */
329 #define MMU_CEN 0x0004 /* enable data cache */
330 #define MMU_BERR 0x0008 /* bus error */
331 #define MMU_IEN 0x0020 /* enable instruction cache */
332 #define MMU_FPE 0x0040 /* enable 68881 FP coprocessor */
333 #define MMU_WPF 0x2000 /* write protect fault */
334 #define MMU_PF 0x4000 /* page fault */
335 #define MMU_PTF 0x8000 /* page table fault */
336
337 #define MMU_FAULT (MMU_PTF|MMU_PF|MMU_WPF|MMU_BERR)
338 #define MMU_ENAB (MMU_UMEN|MMU_SMEN|MMU_IEN|MMU_FPE)
339
340 #endif /* _HP300_CPU_H_ */
341