cpu.h revision 1.24
1 /* $NetBSD: cpu.h,v 1.24 1997/04/14 02:28:50 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1988 University of Utah. 5 * Copyright (c) 1982, 1990, 1993 6 * The Regents of the University of California. All rights reserved. 7 * 8 * This code is derived from software contributed to Berkeley by 9 * the Systems Programming Group of the University of Utah Computer 10 * Science Department. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the University of 23 * California, Berkeley and its contributors. 24 * 4. Neither the name of the University nor the names of its contributors 25 * may be used to endorse or promote products derived from this software 26 * without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 31 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 38 * SUCH DAMAGE. 39 * 40 * from: Utah $Hdr: cpu.h 1.16 91/03/25$ 41 * 42 * @(#)cpu.h 8.4 (Berkeley) 1/5/94 43 */ 44 45 #ifndef _HP300_CPU_H_ 46 #define _HP300_CPU_H_ 47 48 /* 49 * Exported definitions unique to hp300/68k cpu support. 50 */ 51 52 /* 53 * Get common m68k CPU definitions. 54 */ 55 #include <m68k/cpu.h> 56 57 /* 58 * Get interrupt glue. 59 */ 60 #include <machine/intr.h> 61 62 /* 63 * definitions of cpu-dependent requirements 64 * referenced in generic code 65 */ 66 #define cpu_swapin(p) /* nothing */ 67 #define cpu_wait(p) /* nothing */ 68 #define cpu_swapout(p) /* nothing */ 69 70 /* 71 * Arguments to hardclock and gatherstats encapsulate the previous 72 * machine state in an opaque clockframe. One the hp300, we use 73 * what the hardware pushes on an interrupt (frame format 0). 74 */ 75 struct clockframe { 76 u_short sr; /* sr at time of interrupt */ 77 u_long pc; /* pc at time of interrupt */ 78 u_short vo; /* vector offset (4-word frame) */ 79 }; 80 81 #define CLKF_USERMODE(framep) (((framep)->sr & PSL_S) == 0) 82 #define CLKF_BASEPRI(framep) (((framep)->sr & PSL_IPL) == 0) 83 #define CLKF_PC(framep) ((framep)->pc) 84 #if 0 85 /* We would like to do it this way... */ 86 #define CLKF_INTR(framep) (((framep)->sr & PSL_M) == 0) 87 #else 88 /* but until we start using PSL_M, we have to do this instead */ 89 #define CLKF_INTR(framep) (0) /* XXX */ 90 #endif 91 92 93 /* 94 * Preempt the current process if in interrupt from user mode, 95 * or after the current trap/syscall if in system mode. 96 */ 97 #define need_resched() { want_resched++; aston(); } 98 99 /* 100 * Give a profiling tick to the current process when the user profiling 101 * buffer pages are invalid. On the hp300, request an ast to send us 102 * through trap, marking the proc as needing a profiling tick. 103 */ 104 #define need_proftick(p) { (p)->p_flag |= P_OWEUPC; aston(); } 105 106 /* 107 * Notify the current process (p) that it has a signal pending, 108 * process as soon as possible. 109 */ 110 #define signotify(p) aston() 111 112 #define aston() (astpending++) 113 114 int astpending; /* need to trap before returning to user mode */ 115 int want_resched; /* resched() was called */ 116 117 /* 118 * CTL_MACHDEP definitions. 119 */ 120 #define CPU_CONSDEV 1 /* dev_t: console terminal device */ 121 #define CPU_MAXID 2 /* number of valid machdep ids */ 122 123 #define CTL_MACHDEP_NAMES { \ 124 { 0, 0 }, \ 125 { "console_device", CTLTYPE_STRUCT }, \ 126 } 127 128 #ifdef _KERNEL 129 /* 130 * Associate HP 9000/300 models with CPU/MMU combinations. 131 */ 132 133 /* 134 * HP 68020-based computers. HP320 and HP350 have an HP MMU. 135 * HP330 has a Motorola MMU. 136 */ 137 #if (defined(HP320) || defined(HP330) || defined(HP350)) 138 #ifndef M68020 139 #define M68020 140 #endif /* ! M68020 */ 141 142 #if defined(HP330) && !defined(M68K_MMU_MOTOROLA) 143 #define M68K_MMU_MOTOROLA 144 #endif /* HP330 && ! M68K_MMU_MOTOROLA */ 145 146 #if (defined(HP320) || defined(HP350)) && !defined(M68K_MMU_HP) 147 #define M68K_MMU_HP /* include cheezy VAC support */ 148 #endif /* (HP320 || HP350) && ! M68K_MMU_HP */ 149 #endif /* HP320 || HP330 || HP350 */ 150 151 /* 152 * HP 68030-based computers. HP375 includes support for the 153 * 345, 400t, and 400s. 154 */ 155 #if (defined(HP340) || defined(HP360) || defined(HP370) || defined(HP375)) 156 #ifndef M68030 157 #define M68030 158 #endif /* ! M68030 */ 159 160 #ifndef M68K_MMU_MOTOROLA 161 #define M68K_MMU_MOTOROLA 162 #endif /* ! M68K_MMU_MOTOROLA */ 163 #endif /* HP340 || HP360 || HP370 || HP375 */ 164 165 /* 166 * HP 68040-based computers. HP380 includes support for the 167 * 425t, 425s, and 433s. 168 */ 169 #if defined(HP380) 170 #ifndef M68040 171 #define M68040 172 #endif /* ! M68040 */ 173 174 #ifndef M68K_MMU_MOTOROLA 175 #define M68K_MMU_MOTOROLA 176 #endif /* ! M68K_MMU_MOTOROLA */ 177 #endif /* HP380 */ 178 #endif /* _KERNEL */ 179 180 /* 181 * The rest of this should probably be moved to ../hp300/hp300cpu.h, 182 * although some of it could probably be put into generic 68k headers. 183 */ 184 185 /* values for machineid */ 186 #define HP_320 0 /* 16Mhz 68020+HP MMU+16K external cache */ 187 #define HP_330 1 /* 16Mhz 68020+68851 MMU */ 188 #define HP_350 2 /* 25Mhz 68020+HP MMU+32K external cache */ 189 #define HP_360 3 /* 25Mhz 68030 */ 190 #define HP_370 4 /* 33Mhz 68030+64K external cache */ 191 #define HP_340 5 /* 16Mhz 68030 */ 192 #define HP_375 6 /* 50Mhz 68030+32K external cache */ 193 #define HP_380 7 /* 25Mhz 68040 */ 194 #define HP_433 8 /* 33Mhz 68040 */ 195 196 #ifdef _KERNEL 197 extern int machineid; /* CPU model */ 198 extern int cpuspeed; /* CPU speed, in MHz */ 199 200 extern char *intiobase, *intiolimit; 201 extern void (*vectab[]) __P((void)); 202 203 struct frame; 204 struct fpframe; 205 struct pcb; 206 207 /* locore.s functions */ 208 void m68881_save __P((struct fpframe *)); 209 void m68881_restore __P((struct fpframe *)); 210 u_long getdfc __P((void)); 211 u_long getsfc __P((void)); 212 void DCIA __P((void)); 213 void DCIS __P((void)); 214 void DCIU __P((void)); 215 void ICIA __P((void)); 216 void ICPA __P((void)); 217 void PCIA __P((void)); 218 void TBIA __P((void)); 219 void TBIS __P((vm_offset_t)); 220 void TBIAS __P((void)); 221 void TBIAU __P((void)); 222 #if defined(M68040) 223 void DCFA __P((void)); 224 void DCFP __P((vm_offset_t)); 225 void DCFL __P((vm_offset_t)); 226 void DCPL __P((vm_offset_t)); 227 void DCPP __P((vm_offset_t)); 228 void ICPL __P((vm_offset_t)); 229 void ICPP __P((vm_offset_t)); 230 #endif 231 int suline __P((caddr_t, caddr_t)); 232 void savectx __P((struct pcb *)); 233 void switch_exit __P((struct proc *)); 234 void proc_trampoline __P((void)); 235 void loadustp __P((int)); 236 237 void doboot __P((void)) 238 __attribute__((__noreturn__)); 239 void ecacheon __P((void)); 240 void ecacheoff __P((void)); 241 242 /* machdep.c functions */ 243 int badaddr __P((caddr_t)); 244 int badbaddr __P((caddr_t)); 245 246 /* sys_machdep.c functions */ 247 int cachectl __P((int, caddr_t, int)); 248 249 /* vm_machdep.c functions */ 250 void physaccess __P((caddr_t, caddr_t, int, int)); 251 void physunaccess __P((caddr_t, int)); 252 int kvtop __P((caddr_t)); 253 254 /* what is this supposed to do? i.e. how is it different than startrtclock? */ 255 #define enablertclock() 256 257 #endif 258 259 /* physical memory sections */ 260 #define ROMBASE (0x00000000) 261 #define INTIOBASE (0x00400000) 262 #define INTIOTOP (0x00600000) 263 #define EXTIOBASE (0x00600000) 264 #define EXTIOTOP (0x20000000) 265 #define MAXADDR (0xFFFFF000) 266 267 /* 268 * Internal IO space: 269 * 270 * Ranges from 0x400000 to 0x600000 (IIOMAPSIZE). 271 * 272 * Internal IO space is mapped in the kernel from ``intiobase'' to 273 * ``intiolimit'' (defined in locore.s). Since it is always mapped, 274 * conversion between physical and kernel virtual addresses is easy. 275 */ 276 #define ISIIOVA(va) \ 277 ((char *)(va) >= intiobase && (char *)(va) < intiolimit) 278 #define IIOV(pa) ((int)(pa)-INTIOBASE+(int)intiobase) 279 #define IIOP(va) ((int)(va)-(int)intiobase+INTIOBASE) 280 #define IIOPOFF(pa) ((int)(pa)-INTIOBASE) 281 #define IIOMAPSIZE btoc(INTIOTOP-INTIOBASE) /* 2mb */ 282 283 /* 284 * External IO space: 285 * 286 * DIO ranges from select codes 0-63 at physical addresses given by: 287 * 0x600000 + (sc - 32) * 0x10000 288 * DIO cards are addressed in the range 0-31 [0x600000-0x800000) for 289 * their control space and the remaining areas, [0x200000-0x400000) and 290 * [0x800000-0x1000000), are for additional space required by a card; 291 * e.g. a display framebuffer. 292 * 293 * DIO-II ranges from select codes 132-255 at physical addresses given by: 294 * 0x1000000 + (sc - 132) * 0x400000 295 * The address range of DIO-II space is thus [0x1000000-0x20000000). 296 * 297 * DIO/DIO-II space is too large to map in its entirety, instead devices 298 * are mapped into kernel virtual address space allocated from a range 299 * of EIOMAPSIZE pages (vmparam.h) starting at ``extiobase''. 300 */ 301 #define DIOBASE (0x600000) 302 #define DIOTOP (0x1000000) 303 #define DIOCSIZE (0x10000) 304 #define DIOIIBASE (0x01000000) 305 #define DIOIITOP (0x20000000) 306 #define DIOIICSIZE (0x00400000) 307 308 /* 309 * HP MMU 310 */ 311 #define MMUBASE IIOPOFF(0x5F4000) 312 #define MMUSSTP 0x0 313 #define MMUUSTP 0x4 314 #define MMUTBINVAL 0x8 315 #define MMUSTAT 0xC 316 #define MMUCMD MMUSTAT 317 318 #define MMU_UMEN 0x0001 /* enable user mapping */ 319 #define MMU_SMEN 0x0002 /* enable supervisor mapping */ 320 #define MMU_CEN 0x0004 /* enable data cache */ 321 #define MMU_BERR 0x0008 /* bus error */ 322 #define MMU_IEN 0x0020 /* enable instruction cache */ 323 #define MMU_FPE 0x0040 /* enable 68881 FP coprocessor */ 324 #define MMU_WPF 0x2000 /* write protect fault */ 325 #define MMU_PF 0x4000 /* page fault */ 326 #define MMU_PTF 0x8000 /* page table fault */ 327 328 #define MMU_FAULT (MMU_PTF|MMU_PF|MMU_WPF|MMU_BERR) 329 #define MMU_ENAB (MMU_UMEN|MMU_SMEN|MMU_IEN|MMU_FPE) 330 331 #endif /* _HP300_CPU_H_ */ 332
Indexes created Thu Sep 25 02:09:54 GMT 2025