cpu.h revision 1.29 1 /* $NetBSD: cpu.h,v 1.29 1998/08/20 08:33:47 kleink Exp $ */
2
3 /*
4 * Copyright (c) 1988 University of Utah.
5 * Copyright (c) 1982, 1990, 1993
6 * The Regents of the University of California. All rights reserved.
7 *
8 * This code is derived from software contributed to Berkeley by
9 * the Systems Programming Group of the University of Utah Computer
10 * Science Department.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 * 3. All advertising materials mentioning features or use of this software
21 * must display the following acknowledgement:
22 * This product includes software developed by the University of
23 * California, Berkeley and its contributors.
24 * 4. Neither the name of the University nor the names of its contributors
25 * may be used to endorse or promote products derived from this software
26 * without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 * SUCH DAMAGE.
39 *
40 * from: Utah $Hdr: cpu.h 1.16 91/03/25$
41 *
42 * @(#)cpu.h 8.4 (Berkeley) 1/5/94
43 */
44
45 #ifndef _HP300_CPU_H_
46 #define _HP300_CPU_H_
47
48 /*
49 * Exported definitions unique to hp300/68k cpu support.
50 */
51
52 /*
53 * Get common m68k CPU definitions.
54 */
55 #include <m68k/cpu.h>
56
57 /*
58 * Get interrupt glue.
59 */
60 #include <machine/intr.h>
61
62 /*
63 * definitions of cpu-dependent requirements
64 * referenced in generic code
65 */
66 #define cpu_swapin(p) /* nothing */
67 #define cpu_wait(p) /* nothing */
68 #define cpu_swapout(p) /* nothing */
69
70 /*
71 * Arguments to hardclock and gatherstats encapsulate the previous
72 * machine state in an opaque clockframe. One the hp300, we use
73 * what the hardware pushes on an interrupt (frame format 0).
74 */
75 struct clockframe {
76 u_short sr; /* sr at time of interrupt */
77 u_long pc; /* pc at time of interrupt */
78 u_short vo; /* vector offset (4-word frame) */
79 };
80
81 #define CLKF_USERMODE(framep) (((framep)->sr & PSL_S) == 0)
82 #define CLKF_BASEPRI(framep) (((framep)->sr & PSL_IPL) == 0)
83 #define CLKF_PC(framep) ((framep)->pc)
84 #if 0
85 /* We would like to do it this way... */
86 #define CLKF_INTR(framep) (((framep)->sr & PSL_M) == 0)
87 #else
88 /* but until we start using PSL_M, we have to do this instead */
89 #define CLKF_INTR(framep) (0) /* XXX */
90 #endif
91
92
93 /*
94 * Preempt the current process if in interrupt from user mode,
95 * or after the current trap/syscall if in system mode.
96 */
97 extern int want_resched; /* resched() was called */
98 #define need_resched() { want_resched++; aston(); }
99
100 /*
101 * Give a profiling tick to the current process when the user profiling
102 * buffer pages are invalid. On the hp300, request an ast to send us
103 * through trap, marking the proc as needing a profiling tick.
104 */
105 #define need_proftick(p) { (p)->p_flag |= P_OWEUPC; aston(); }
106
107 /*
108 * Notify the current process (p) that it has a signal pending,
109 * process as soon as possible.
110 */
111 #define signotify(p) aston()
112
113 extern int astpending; /* need to trap before returning to user mode */
114 #define aston() (astpending++)
115
116 /*
117 * CTL_MACHDEP definitions.
118 */
119 #define CPU_CONSDEV 1 /* dev_t: console terminal device */
120 #define CPU_MAXID 2 /* number of valid machdep ids */
121
122 #define CTL_MACHDEP_NAMES { \
123 { 0, 0 }, \
124 { "console_device", CTLTYPE_STRUCT }, \
125 }
126
127 /*
128 * The rest of this should probably be moved to <machine/hp300spu.h>,
129 * although some of it could probably be put into generic 68k headers.
130 */
131
132 #ifdef _KERNEL
133 extern char *intiobase, *intiolimit;
134 extern void (*vectab[]) __P((void));
135
136 struct frame;
137 struct fpframe;
138 struct pcb;
139
140 /* locore.s functions */
141 void m68881_save __P((struct fpframe *));
142 void m68881_restore __P((struct fpframe *));
143 void DCIA __P((void));
144 void DCIS __P((void));
145 void DCIU __P((void));
146 void ICIA __P((void));
147 void ICPA __P((void));
148 void PCIA __P((void));
149 void TBIA __P((void));
150 void TBIS __P((vaddr_t));
151 void TBIAS __P((void));
152 void TBIAU __P((void));
153 #if defined(M68040)
154 void DCFA __P((void));
155 void DCFP __P((paddr_t));
156 void DCFL __P((paddr_t));
157 void DCPL __P((paddr_t));
158 void DCPP __P((paddr_t));
159 void ICPL __P((paddr_t));
160 void ICPP __P((paddr_t));
161 #endif
162 int suline __P((caddr_t, caddr_t));
163 void savectx __P((struct pcb *));
164 void switch_exit __P((struct proc *));
165 void proc_trampoline __P((void));
166 void loadustp __P((int));
167
168 void doboot __P((void))
169 __attribute__((__noreturn__));
170 void ecacheon __P((void));
171 void ecacheoff __P((void));
172
173 /* clock.c functions */
174 void hp300_calibrate_delay __P((void));
175
176 /* machdep.c functions */
177 int badaddr __P((caddr_t));
178 int badbaddr __P((caddr_t));
179
180 /* sys_machdep.c functions */
181 int cachectl __P((int, caddr_t, int));
182
183 /* vm_machdep.c functions */
184 void physaccess __P((caddr_t, caddr_t, int, int));
185 void physunaccess __P((caddr_t, int));
186 int kvtop __P((caddr_t));
187
188 /* what is this supposed to do? i.e. how is it different than startrtclock? */
189 #define enablertclock()
190
191 #endif
192
193 /* physical memory sections */
194 #define ROMBASE (0x00000000)
195 #define INTIOBASE (0x00400000)
196 #define INTIOTOP (0x00600000)
197 #define EXTIOBASE (0x00600000)
198 #define EXTIOTOP (0x20000000)
199 #define MAXADDR (0xFFFFF000)
200
201 /*
202 * Internal IO space:
203 *
204 * Ranges from 0x400000 to 0x600000 (IIOMAPSIZE).
205 *
206 * Internal IO space is mapped in the kernel from ``intiobase'' to
207 * ``intiolimit'' (defined in locore.s). Since it is always mapped,
208 * conversion between physical and kernel virtual addresses is easy.
209 */
210 #define ISIIOVA(va) \
211 ((char *)(va) >= intiobase && (char *)(va) < intiolimit)
212 #define IIOV(pa) ((int)(pa)-INTIOBASE+(int)intiobase)
213 #define IIOP(va) ((int)(va)-(int)intiobase+INTIOBASE)
214 #define IIOPOFF(pa) ((int)(pa)-INTIOBASE)
215 #define IIOMAPSIZE btoc(INTIOTOP-INTIOBASE) /* 2mb */
216
217 /*
218 * External IO space:
219 *
220 * DIO ranges from select codes 0-63 at physical addresses given by:
221 * 0x600000 + (sc - 32) * 0x10000
222 * DIO cards are addressed in the range 0-31 [0x600000-0x800000) for
223 * their control space and the remaining areas, [0x200000-0x400000) and
224 * [0x800000-0x1000000), are for additional space required by a card;
225 * e.g. a display framebuffer.
226 *
227 * DIO-II ranges from select codes 132-255 at physical addresses given by:
228 * 0x1000000 + (sc - 132) * 0x400000
229 * The address range of DIO-II space is thus [0x1000000-0x20000000).
230 *
231 * DIO/DIO-II space is too large to map in its entirety, instead devices
232 * are mapped into kernel virtual address space allocated from a range
233 * of EIOMAPSIZE pages (vmparam.h) starting at ``extiobase''.
234 */
235 #define DIOBASE (0x600000)
236 #define DIOTOP (0x1000000)
237 #define DIOCSIZE (0x10000)
238 #define DIOIIBASE (0x01000000)
239 #define DIOIITOP (0x20000000)
240 #define DIOIICSIZE (0x00400000)
241
242 /*
243 * HP MMU
244 */
245 #define MMUBASE IIOPOFF(0x5F4000)
246 #define MMUSSTP 0x0
247 #define MMUUSTP 0x4
248 #define MMUTBINVAL 0x8
249 #define MMUSTAT 0xC
250 #define MMUCMD MMUSTAT
251
252 #define MMU_UMEN 0x0001 /* enable user mapping */
253 #define MMU_SMEN 0x0002 /* enable supervisor mapping */
254 #define MMU_CEN 0x0004 /* enable data cache */
255 #define MMU_BERR 0x0008 /* bus error */
256 #define MMU_IEN 0x0020 /* enable instruction cache */
257 #define MMU_FPE 0x0040 /* enable 68881 FP coprocessor */
258 #define MMU_WPF 0x2000 /* write protect fault */
259 #define MMU_PF 0x4000 /* page fault */
260 #define MMU_PTF 0x8000 /* page table fault */
261
262 #define MMU_FAULT (MMU_PTF|MMU_PF|MMU_WPF|MMU_BERR)
263 #define MMU_ENAB (MMU_UMEN|MMU_SMEN|MMU_IEN|MMU_FPE)
264
265 #endif /* _HP300_CPU_H_ */
266