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cpu.h revision 1.40
      1 /*	$NetBSD: cpu.h,v 1.40 2002/11/02 20:03:06 chs Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1988 University of Utah.
      5  * Copyright (c) 1982, 1990, 1993
      6  *	The Regents of the University of California.  All rights reserved.
      7  *
      8  * This code is derived from software contributed to Berkeley by
      9  * the Systems Programming Group of the University of Utah Computer
     10  * Science Department.
     11  *
     12  * Redistribution and use in source and binary forms, with or without
     13  * modification, are permitted provided that the following conditions
     14  * are met:
     15  * 1. Redistributions of source code must retain the above copyright
     16  *    notice, this list of conditions and the following disclaimer.
     17  * 2. Redistributions in binary form must reproduce the above copyright
     18  *    notice, this list of conditions and the following disclaimer in the
     19  *    documentation and/or other materials provided with the distribution.
     20  * 3. All advertising materials mentioning features or use of this software
     21  *    must display the following acknowledgement:
     22  *	This product includes software developed by the University of
     23  *	California, Berkeley and its contributors.
     24  * 4. Neither the name of the University nor the names of its contributors
     25  *    may be used to endorse or promote products derived from this software
     26  *    without specific prior written permission.
     27  *
     28  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     29  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     30  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     31  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     32  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     33  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     34  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     35  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     36  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     37  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     38  * SUCH DAMAGE.
     39  *
     40  * from: Utah $Hdr: cpu.h 1.16 91/03/25$
     41  *
     42  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
     43  */
     44 
     45 #ifndef _HP300_CPU_H_
     46 #define	_HP300_CPU_H_
     47 
     48 #if defined(_KERNEL_OPT)
     49 #include "opt_lockdebug.h"
     50 #endif
     51 
     52 /*
     53  * Exported definitions unique to hp300/68k cpu support.
     54  */
     55 
     56 /*
     57  * Get common m68k CPU definitions.
     58  */
     59 #include <m68k/cpu.h>
     60 #include <machine/hp300spu.h>
     61 
     62 /*
     63  * Get interrupt glue.
     64  */
     65 #include <machine/intr.h>
     66 
     67 #include <sys/sched.h>
     68 struct cpu_info {
     69 	struct schedstate_percpu ci_schedstate; /* scheduler state */
     70 #if defined(DIAGNOSTIC) || defined(LOCKDEBUG)
     71 	u_long ci_spin_locks;		/* # of spin locks held */
     72 	u_long ci_simple_locks;		/* # of simple locks held */
     73 #endif
     74 };
     75 
     76 #ifdef _KERNEL
     77 extern struct cpu_info cpu_info_store;
     78 
     79 #define	curcpu()	(&cpu_info_store)
     80 
     81 /*
     82  * definitions of cpu-dependent requirements
     83  * referenced in generic code
     84  */
     85 #define	cpu_swapin(p)			/* nothing */
     86 #define	cpu_wait(p)			/* nothing */
     87 #define	cpu_swapout(p)			/* nothing */
     88 #define	cpu_number()			0
     89 
     90 /*
     91  * Arguments to hardclock and gatherstats encapsulate the previous
     92  * machine state in an opaque clockframe.  One the hp300, we use
     93  * what the hardware pushes on an interrupt (frame format 0).
     94  */
     95 struct clockframe {
     96 	u_short	sr;		/* sr at time of interrupt */
     97 	u_long	pc;		/* pc at time of interrupt */
     98 	u_short	vo;		/* vector offset (4-word frame) */
     99 };
    100 
    101 #define	CLKF_USERMODE(framep)	(((framep)->sr & PSL_S) == 0)
    102 #define	CLKF_BASEPRI(framep)	(((framep)->sr & PSL_IPL) == 0)
    103 #define	CLKF_PC(framep)		((framep)->pc)
    104 #if 0
    105 /* We would like to do it this way... */
    106 #define	CLKF_INTR(framep)	(((framep)->sr & PSL_M) == 0)
    107 #else
    108 /* but until we start using PSL_M, we have to do this instead */
    109 #define	CLKF_INTR(framep)	(0)	/* XXX */
    110 #endif
    111 
    112 
    113 /*
    114  * Preempt the current process if in interrupt from user mode,
    115  * or after the current trap/syscall if in system mode.
    116  */
    117 extern int want_resched;	/* resched() was called */
    118 #define	need_resched(ci)	{ want_resched++; aston(); }
    119 
    120 /*
    121  * Give a profiling tick to the current process when the user profiling
    122  * buffer pages are invalid.  On the hp300, request an ast to send us
    123  * through trap, marking the proc as needing a profiling tick.
    124  */
    125 #define	need_proftick(p)	{ (p)->p_flag |= P_OWEUPC; aston(); }
    126 
    127 /*
    128  * Notify the current process (p) that it has a signal pending,
    129  * process as soon as possible.
    130  */
    131 #define	signotify(p)	aston()
    132 
    133 extern int astpending;		/* need to trap before returning to user mode */
    134 #define aston() (astpending++)
    135 
    136 #endif /* _KERNEL */
    137 
    138 /*
    139  * CTL_MACHDEP definitions.
    140  */
    141 #define	CPU_CONSDEV		1	/* dev_t: console terminal device */
    142 #define	CPU_MAXID		2	/* number of valid machdep ids */
    143 
    144 #define CTL_MACHDEP_NAMES { \
    145 	{ 0, 0 }, \
    146 	{ "console_device", CTLTYPE_STRUCT }, \
    147 }
    148 
    149 /*
    150  * The rest of this should probably be moved to <machine/hp300spu.h>,
    151  * although some of it could probably be put into generic 68k headers.
    152  */
    153 
    154 #ifdef _KERNEL
    155 extern	char *intiobase, *intiolimit;
    156 extern	void (*vectab[]) __P((void));
    157 
    158 struct frame;
    159 struct fpframe;
    160 struct pcb;
    161 
    162 /* locore.s functions */
    163 void	m68881_save __P((struct fpframe *));
    164 void	m68881_restore __P((struct fpframe *));
    165 int	suline __P((caddr_t, caddr_t));
    166 void	savectx __P((struct pcb *));
    167 void	switch_exit __P((struct proc *));
    168 void	proc_trampoline __P((void));
    169 void	loadustp __P((int));
    170 
    171 void	doboot __P((void))
    172 	__attribute__((__noreturn__));
    173 void	ecacheon __P((void));
    174 void	ecacheoff __P((void));
    175 
    176 /* clock.c functions */
    177 void	hp300_calibrate_delay __P((void));
    178 
    179 /* machdep.c functions */
    180 int	badaddr __P((caddr_t));
    181 int	badbaddr __P((caddr_t));
    182 
    183 /* sys_machdep.c functions */
    184 int	cachectl1 __P((unsigned long, vaddr_t, size_t, struct proc *));
    185 
    186 /* vm_machdep.c functions */
    187 void	physaccess __P((caddr_t, caddr_t, int, int));
    188 void	physunaccess __P((caddr_t, int));
    189 int	kvtop __P((caddr_t));
    190 
    191 /* what is this supposed to do? i.e. how is it different than startrtclock? */
    192 #define	enablertclock()
    193 
    194 #endif
    195 
    196 /* physical memory sections */
    197 #define	ROMBASE		(0x00000000)
    198 #define	INTIOBASE	(0x00400000)
    199 #define	INTIOTOP	(0x00600000)
    200 #define	EXTIOBASE	(0x00600000)
    201 #define	EXTIOTOP	(0x20000000)
    202 #define	MAXADDR		(0xFFFFF000)
    203 
    204 /*
    205  * Internal IO space:
    206  *
    207  * Ranges from 0x400000 to 0x600000 (IIOMAPSIZE).
    208  *
    209  * Internal IO space is mapped in the kernel from ``intiobase'' to
    210  * ``intiolimit'' (defined in locore.s).  Since it is always mapped,
    211  * conversion between physical and kernel virtual addresses is easy.
    212  */
    213 #define	ISIIOVA(va) \
    214 	((char *)(va) >= intiobase && (char *)(va) < intiolimit)
    215 #define	IIOV(pa)	((int)(pa)-INTIOBASE+(int)intiobase)
    216 #define	IIOP(va)	((int)(va)-(int)intiobase+INTIOBASE)
    217 #define	IIOPOFF(pa)	((int)(pa)-INTIOBASE)
    218 #define	IIOMAPSIZE	btoc(INTIOTOP-INTIOBASE)	/* 2mb */
    219 
    220 /*
    221  * External IO space:
    222  *
    223  * DIO ranges from select codes 0-63 at physical addresses given by:
    224  *	0x600000 + (sc - 32) * 0x10000
    225  * DIO cards are addressed in the range 0-31 [0x600000-0x800000) for
    226  * their control space and the remaining areas, [0x200000-0x400000) and
    227  * [0x800000-0x1000000), are for additional space required by a card;
    228  * e.g. a display framebuffer.
    229  *
    230  * DIO-II ranges from select codes 132-255 at physical addresses given by:
    231  *	0x1000000 + (sc - 132) * 0x400000
    232  * The address range of DIO-II space is thus [0x1000000-0x20000000).
    233  *
    234  * DIO/DIO-II space is too large to map in its entirety, instead devices
    235  * are mapped into kernel virtual address space allocated from a range
    236  * of EIOMAPSIZE pages (vmparam.h) starting at ``extiobase''.
    237  */
    238 #define	DIOBASE		(0x600000)
    239 #define	DIOTOP		(0x1000000)
    240 #define	DIOCSIZE	(0x10000)
    241 #define	DIOIIBASE	(0x01000000)
    242 #define	DIOIITOP	(0x20000000)
    243 #define	DIOIICSIZE	(0x00400000)
    244 
    245 /*
    246  * HP MMU
    247  */
    248 #define	MMUBASE		IIOPOFF(0x5F4000)
    249 #define	MMUSSTP		0x0
    250 #define	MMUUSTP		0x4
    251 #define	MMUTBINVAL	0x8
    252 #define	MMUSTAT		0xC
    253 #define	MMUCMD		MMUSTAT
    254 
    255 #define	MMU_UMEN	0x0001	/* enable user mapping */
    256 #define	MMU_SMEN	0x0002	/* enable supervisor mapping */
    257 #define	MMU_CEN		0x0004	/* enable data cache */
    258 #define	MMU_BERR	0x0008	/* bus error */
    259 #define	MMU_IEN		0x0020	/* enable instruction cache */
    260 #define	MMU_FPE		0x0040	/* enable 68881 FP coprocessor */
    261 #define	MMU_WPF		0x2000	/* write protect fault */
    262 #define	MMU_PF		0x4000	/* page fault */
    263 #define	MMU_PTF		0x8000	/* page table fault */
    264 
    265 #define	MMU_FAULT	(MMU_PTF|MMU_PF|MMU_WPF|MMU_BERR)
    266 #define	MMU_ENAB	(MMU_UMEN|MMU_SMEN|MMU_IEN|MMU_FPE)
    267 
    268 #if defined(CACHE_HAVE_PAC) || defined(CACHE_HAVE_VAC)
    269 #define M68K_CACHEOPS_MACHDEP
    270 #endif
    271 
    272 #ifdef CACHE_HAVE_PAC
    273 #define M68K_CACHEOPS_MACHDEP_PCIA
    274 #endif
    275 
    276 #ifdef CACHE_HAVE_VAC
    277 #define M68K_CACHEOPS_MACHDEP_DCIA
    278 #define M68K_CACHEOPS_MACHDEP_DCIS
    279 #define M68K_CACHEOPS_MACHDEP_DCIU
    280 #define M68K_CACHEOPS_MACHDEP_TBIA
    281 #define M68K_CACHEOPS_MACHDEP_TBIS
    282 #define M68K_CACHEOPS_MACHDEP_TBIAS
    283 #define M68K_CACHEOPS_MACHDEP_TBIAU
    284 #endif
    285 
    286 #endif /* _HP300_CPU_H_ */
    287