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cpu.h revision 1.42
      1 /*	$NetBSD: cpu.h,v 1.42 2003/08/07 16:27:39 agc Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1982, 1990, 1993
      5  *	The Regents of the University of California.  All rights reserved.
      6  *
      7  * This code is derived from software contributed to Berkeley by
      8  * the Systems Programming Group of the University of Utah Computer
      9  * Science Department.
     10  *
     11  * Redistribution and use in source and binary forms, with or without
     12  * modification, are permitted provided that the following conditions
     13  * are met:
     14  * 1. Redistributions of source code must retain the above copyright
     15  *    notice, this list of conditions and the following disclaimer.
     16  * 2. Redistributions in binary form must reproduce the above copyright
     17  *    notice, this list of conditions and the following disclaimer in the
     18  *    documentation and/or other materials provided with the distribution.
     19  * 3. Neither the name of the University nor the names of its contributors
     20  *    may be used to endorse or promote products derived from this software
     21  *    without specific prior written permission.
     22  *
     23  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     24  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     25  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     26  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     27  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     28  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     29  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     33  * SUCH DAMAGE.
     34  *
     35  * from: Utah $Hdr: cpu.h 1.16 91/03/25$
     36  *
     37  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
     38  */
     39 /*
     40  * Copyright (c) 1988 University of Utah.
     41  *
     42  * This code is derived from software contributed to Berkeley by
     43  * the Systems Programming Group of the University of Utah Computer
     44  * Science Department.
     45  *
     46  * Redistribution and use in source and binary forms, with or without
     47  * modification, are permitted provided that the following conditions
     48  * are met:
     49  * 1. Redistributions of source code must retain the above copyright
     50  *    notice, this list of conditions and the following disclaimer.
     51  * 2. Redistributions in binary form must reproduce the above copyright
     52  *    notice, this list of conditions and the following disclaimer in the
     53  *    documentation and/or other materials provided with the distribution.
     54  * 3. All advertising materials mentioning features or use of this software
     55  *    must display the following acknowledgement:
     56  *	This product includes software developed by the University of
     57  *	California, Berkeley and its contributors.
     58  * 4. Neither the name of the University nor the names of its contributors
     59  *    may be used to endorse or promote products derived from this software
     60  *    without specific prior written permission.
     61  *
     62  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     63  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     64  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     65  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     66  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     67  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     68  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     69  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     70  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     71  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     72  * SUCH DAMAGE.
     73  *
     74  * from: Utah $Hdr: cpu.h 1.16 91/03/25$
     75  *
     76  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
     77  */
     78 
     79 #ifndef _HP300_CPU_H_
     80 #define	_HP300_CPU_H_
     81 
     82 #if defined(_KERNEL_OPT)
     83 #include "opt_lockdebug.h"
     84 #endif
     85 
     86 /*
     87  * Exported definitions unique to hp300/68k cpu support.
     88  */
     89 
     90 /*
     91  * Get common m68k CPU definitions.
     92  */
     93 #include <m68k/cpu.h>
     94 #include <machine/hp300spu.h>
     95 
     96 /*
     97  * Get interrupt glue.
     98  */
     99 #include <machine/intr.h>
    100 
    101 #include <sys/sched.h>
    102 struct cpu_info {
    103 	struct schedstate_percpu ci_schedstate; /* scheduler state */
    104 #if defined(DIAGNOSTIC) || defined(LOCKDEBUG)
    105 	u_long ci_spin_locks;		/* # of spin locks held */
    106 	u_long ci_simple_locks;		/* # of simple locks held */
    107 #endif
    108 };
    109 
    110 #ifdef _KERNEL
    111 extern struct cpu_info cpu_info_store;
    112 
    113 #define	curcpu()	(&cpu_info_store)
    114 
    115 /*
    116  * definitions of cpu-dependent requirements
    117  * referenced in generic code
    118  */
    119 #define	cpu_swapin(p)			/* nothing */
    120 #define	cpu_wait(p)			/* nothing */
    121 #define	cpu_swapout(p)			/* nothing */
    122 #define	cpu_number()			0
    123 
    124 void	cpu_proc_fork(struct proc *, struct proc *);
    125 
    126 /*
    127  * Arguments to hardclock and gatherstats encapsulate the previous
    128  * machine state in an opaque clockframe.  One the hp300, we use
    129  * what the hardware pushes on an interrupt (frame format 0).
    130  */
    131 struct clockframe {
    132 	u_short	sr;		/* sr at time of interrupt */
    133 	u_long	pc;		/* pc at time of interrupt */
    134 	u_short	vo;		/* vector offset (4-word frame) */
    135 };
    136 
    137 #define	CLKF_USERMODE(framep)	(((framep)->sr & PSL_S) == 0)
    138 #define	CLKF_BASEPRI(framep)	(((framep)->sr & PSL_IPL) == 0)
    139 #define	CLKF_PC(framep)		((framep)->pc)
    140 #if 0
    141 /* We would like to do it this way... */
    142 #define	CLKF_INTR(framep)	(((framep)->sr & PSL_M) == 0)
    143 #else
    144 /* but until we start using PSL_M, we have to do this instead */
    145 #define	CLKF_INTR(framep)	(0)	/* XXX */
    146 #endif
    147 
    148 
    149 /*
    150  * Preempt the current process if in interrupt from user mode,
    151  * or after the current trap/syscall if in system mode.
    152  */
    153 extern int want_resched;	/* resched() was called */
    154 #define	need_resched(ci)	{ want_resched++; aston(); }
    155 
    156 /*
    157  * Give a profiling tick to the current process when the user profiling
    158  * buffer pages are invalid.  On the hp300, request an ast to send us
    159  * through trap, marking the proc as needing a profiling tick.
    160  */
    161 #define	need_proftick(p)	{ (p)->p_flag |= P_OWEUPC; aston(); }
    162 
    163 /*
    164  * Notify the current process (p) that it has a signal pending,
    165  * process as soon as possible.
    166  */
    167 #define	signotify(p)	aston()
    168 
    169 extern int astpending;		/* need to trap before returning to user mode */
    170 #define aston() (astpending++)
    171 
    172 #endif /* _KERNEL */
    173 
    174 /*
    175  * CTL_MACHDEP definitions.
    176  */
    177 #define	CPU_CONSDEV		1	/* dev_t: console terminal device */
    178 #define	CPU_MAXID		2	/* number of valid machdep ids */
    179 
    180 #define CTL_MACHDEP_NAMES { \
    181 	{ 0, 0 }, \
    182 	{ "console_device", CTLTYPE_STRUCT }, \
    183 }
    184 
    185 /*
    186  * The rest of this should probably be moved to <machine/hp300spu.h>,
    187  * although some of it could probably be put into generic 68k headers.
    188  */
    189 
    190 #ifdef _KERNEL
    191 extern	char *intiobase, *intiolimit;
    192 extern	void (*vectab[]) __P((void));
    193 
    194 struct frame;
    195 struct fpframe;
    196 struct pcb;
    197 
    198 /* locore.s functions */
    199 void	m68881_save __P((struct fpframe *));
    200 void	m68881_restore __P((struct fpframe *));
    201 int	suline __P((caddr_t, caddr_t));
    202 void	savectx __P((struct pcb *));
    203 void	switch_exit __P((struct lwp *));
    204 void	switch_lwp_exit __P((struct lwp *));
    205 void	proc_trampoline __P((void));
    206 void	loadustp __P((int));
    207 
    208 void	doboot __P((void))
    209 	__attribute__((__noreturn__));
    210 void	ecacheon __P((void));
    211 void	ecacheoff __P((void));
    212 
    213 /* clock.c functions */
    214 void	hp300_calibrate_delay __P((void));
    215 
    216 /* machdep.c functions */
    217 int	badaddr __P((caddr_t));
    218 int	badbaddr __P((caddr_t));
    219 
    220 /* sys_machdep.c functions */
    221 int	cachectl1 __P((unsigned long, vaddr_t, size_t, struct proc *));
    222 
    223 /* vm_machdep.c functions */
    224 void	physaccess __P((caddr_t, caddr_t, int, int));
    225 void	physunaccess __P((caddr_t, int));
    226 int	kvtop __P((caddr_t));
    227 
    228 /* what is this supposed to do? i.e. how is it different than startrtclock? */
    229 #define	enablertclock()
    230 
    231 #endif
    232 
    233 /* physical memory sections */
    234 #define	ROMBASE		(0x00000000)
    235 #define	INTIOBASE	(0x00400000)
    236 #define	INTIOTOP	(0x00600000)
    237 #define	EXTIOBASE	(0x00600000)
    238 #define	EXTIOTOP	(0x20000000)
    239 #define	MAXADDR		(0xFFFFF000)
    240 
    241 /*
    242  * Internal IO space:
    243  *
    244  * Ranges from 0x400000 to 0x600000 (IIOMAPSIZE).
    245  *
    246  * Internal IO space is mapped in the kernel from ``intiobase'' to
    247  * ``intiolimit'' (defined in locore.s).  Since it is always mapped,
    248  * conversion between physical and kernel virtual addresses is easy.
    249  */
    250 #define	ISIIOVA(va) \
    251 	((char *)(va) >= intiobase && (char *)(va) < intiolimit)
    252 #define	IIOV(pa)	((int)(pa)-INTIOBASE+(int)intiobase)
    253 #define	IIOP(va)	((int)(va)-(int)intiobase+INTIOBASE)
    254 #define	IIOPOFF(pa)	((int)(pa)-INTIOBASE)
    255 #define	IIOMAPSIZE	btoc(INTIOTOP-INTIOBASE)	/* 2mb */
    256 
    257 /*
    258  * External IO space:
    259  *
    260  * DIO ranges from select codes 0-63 at physical addresses given by:
    261  *	0x600000 + (sc - 32) * 0x10000
    262  * DIO cards are addressed in the range 0-31 [0x600000-0x800000) for
    263  * their control space and the remaining areas, [0x200000-0x400000) and
    264  * [0x800000-0x1000000), are for additional space required by a card;
    265  * e.g. a display framebuffer.
    266  *
    267  * DIO-II ranges from select codes 132-255 at physical addresses given by:
    268  *	0x1000000 + (sc - 132) * 0x400000
    269  * The address range of DIO-II space is thus [0x1000000-0x20000000).
    270  *
    271  * DIO/DIO-II space is too large to map in its entirety, instead devices
    272  * are mapped into kernel virtual address space allocated from a range
    273  * of EIOMAPSIZE pages (vmparam.h) starting at ``extiobase''.
    274  */
    275 #define	DIOBASE		(0x600000)
    276 #define	DIOTOP		(0x1000000)
    277 #define	DIOCSIZE	(0x10000)
    278 #define	DIOIIBASE	(0x01000000)
    279 #define	DIOIITOP	(0x20000000)
    280 #define	DIOIICSIZE	(0x00400000)
    281 
    282 /*
    283  * HP MMU
    284  */
    285 #define	MMUBASE		IIOPOFF(0x5F4000)
    286 #define	MMUSSTP		0x0
    287 #define	MMUUSTP		0x4
    288 #define	MMUTBINVAL	0x8
    289 #define	MMUSTAT		0xC
    290 #define	MMUCMD		MMUSTAT
    291 
    292 #define	MMU_UMEN	0x0001	/* enable user mapping */
    293 #define	MMU_SMEN	0x0002	/* enable supervisor mapping */
    294 #define	MMU_CEN		0x0004	/* enable data cache */
    295 #define	MMU_BERR	0x0008	/* bus error */
    296 #define	MMU_IEN		0x0020	/* enable instruction cache */
    297 #define	MMU_FPE		0x0040	/* enable 68881 FP coprocessor */
    298 #define	MMU_WPF		0x2000	/* write protect fault */
    299 #define	MMU_PF		0x4000	/* page fault */
    300 #define	MMU_PTF		0x8000	/* page table fault */
    301 
    302 #define	MMU_FAULT	(MMU_PTF|MMU_PF|MMU_WPF|MMU_BERR)
    303 #define	MMU_ENAB	(MMU_UMEN|MMU_SMEN|MMU_IEN|MMU_FPE)
    304 
    305 #if defined(CACHE_HAVE_PAC) || defined(CACHE_HAVE_VAC)
    306 #define M68K_CACHEOPS_MACHDEP
    307 #endif
    308 
    309 #ifdef CACHE_HAVE_PAC
    310 #define M68K_CACHEOPS_MACHDEP_PCIA
    311 #endif
    312 
    313 #ifdef CACHE_HAVE_VAC
    314 #define M68K_CACHEOPS_MACHDEP_DCIA
    315 #define M68K_CACHEOPS_MACHDEP_DCIS
    316 #define M68K_CACHEOPS_MACHDEP_DCIU
    317 #define M68K_CACHEOPS_MACHDEP_TBIA
    318 #define M68K_CACHEOPS_MACHDEP_TBIS
    319 #define M68K_CACHEOPS_MACHDEP_TBIAS
    320 #define M68K_CACHEOPS_MACHDEP_TBIAU
    321 #endif
    322 
    323 #endif /* _HP300_CPU_H_ */
    324