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cpu.h revision 1.67.6.2 
      1 /*	$NetBSD: cpu.h,v 1.67.6.2 2017/12/03 11:36:13 jdolecek Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1988 University of Utah.
      5  * Copyright (c) 1982, 1990, 1993
      6  *	The Regents of the University of California.  All rights reserved.
      7  *
      8  * This code is derived from software contributed to Berkeley by
      9  * the Systems Programming Group of the University of Utah Computer
     10  * Science Department.
     11  *
     12  * Redistribution and use in source and binary forms, with or without
     13  * modification, are permitted provided that the following conditions
     14  * are met:
     15  * 1. Redistributions of source code must retain the above copyright
     16  *    notice, this list of conditions and the following disclaimer.
     17  * 2. Redistributions in binary form must reproduce the above copyright
     18  *    notice, this list of conditions and the following disclaimer in the
     19  *    documentation and/or other materials provided with the distribution.
     20  * 3. Neither the name of the University nor the names of its contributors
     21  *    may be used to endorse or promote products derived from this software
     22  *    without specific prior written permission.
     23  *
     24  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     25  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     26  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     27  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     28  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     29  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     30  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     31  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     32  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     33  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     34  * SUCH DAMAGE.
     35  *
     36  * from: Utah $Hdr: cpu.h 1.16 91/03/25$
     37  *
     38  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
     39  */
     40 
     41 #ifndef _HP300_CPU_H_
     42 #define	_HP300_CPU_H_
     43 
     44 #if defined(_KERNEL_OPT)
     45 #include "opt_lockdebug.h"
     46 #endif
     47 
     48 /*
     49  * Get common m68k CPU definitions.
     50  */
     51 #include <m68k/cpu.h>
     52 
     53 #if defined(_KERNEL)
     54 /*
     55  * Exported definitions unique to hp300/68k cpu support.
     56  */
     57 #include <machine/hp300spu.h>
     58 
     59 /*
     60  * Get interrupt glue.
     61  */
     62 #include <machine/intr.h>
     63 
     64 /*
     65  * Arguments to hardclock and gatherstats encapsulate the previous
     66  * machine state in an opaque clockframe.  On the hp300, we use
     67  * what the hardware pushes on an interrupt (frame format 0).
     68  */
     69 struct clockframe {
     70 	u_short	sr;		/* sr at time of interrupt */
     71 	u_long	pc;		/* pc at time of interrupt */
     72 	u_short	vo;		/* vector offset (4-word frame) */
     73 };
     74 
     75 #define	CLKF_USERMODE(framep)	(((framep)->sr & PSL_S) == 0)
     76 #define	CLKF_PC(framep)		((framep)->pc)
     77 #if 0
     78 /* We would like to do it this way... */
     79 #define	CLKF_INTR(framep)	(((framep)->sr & PSL_M) == 0)
     80 #else
     81 /* but until we start using PSL_M, we have to do this instead */
     82 #include <machine/intr.h>
     83 #define	CLKF_INTR(framep)	(idepth > 1)	/* XXX */
     84 #endif
     85 
     86 
     87 /*
     88  * Preempt the current process if in interrupt from user mode,
     89  * or after the current trap/syscall if in system mode.
     90  */
     91 #define	cpu_need_resched(ci,flags)	do {	\
     92 	__USE(flags); 				\
     93 	ci->ci_want_resched = 1;		\
     94 	aston();				\
     95 } while (/*CONSTCOND*/0)
     96 
     97 /*
     98  * Give a profiling tick to the current process when the user profiling
     99  * buffer pages are invalid.  On the hp300, request an ast to send us
    100  * through trap, marking the proc as needing a profiling tick.
    101  */
    102 #define	cpu_need_proftick(l)	\
    103 	do { (l)->l_pflag |= LP_OWEUPC; aston(); } while (/* CONSTCOND */0)
    104 
    105 /*
    106  * Notify the current process (p) that it has a signal pending,
    107  * process as soon as possible.
    108  */
    109 #define	cpu_signotify(l)	aston()
    110 
    111 extern int astpending;		/* need to trap before returning to user mode */
    112 #define aston() (astpending++)
    113 
    114 #endif /* _KERNEL */
    115 
    116 /*
    117  * CTL_MACHDEP definitions.
    118  */
    119 #define	CPU_CONSDEV		1	/* dev_t: console terminal device */
    120 #define	CPU_MAXID		2	/* number of valid machdep ids */
    121 
    122 /*
    123  * The rest of this should probably be moved to <machine/hp300spu.h>,
    124  * although some of it could probably be put into generic 68k headers.
    125  */
    126 
    127 #ifdef _KERNEL
    128 extern	uint8_t *intiobase, *intiolimit, *extiobase;
    129 extern	void (*vectab[])(void);
    130 
    131 /* locore.s functions */
    132 int	suline(void *, void *);
    133 void	loadustp(int);
    134 
    135 void	doboot(void) __attribute__((__noreturn__));
    136 void	ecacheon(void);
    137 void	ecacheoff(void);
    138 
    139 /* clock.c functions */
    140 void	hp300_calibrate_delay(void);
    141 
    142 /* machdep.c functions */
    143 int	badaddr(void *);
    144 int	badbaddr(void *);
    145 
    146 /* what is this supposed to do? i.e. how is it different than startrtclock? */
    147 #define	enablertclock()
    148 
    149 #endif
    150 
    151 /* physical memory sections */
    152 #define	ROMBASE		(0x00000000)
    153 #define	INTIOBASE	(0x00400000)
    154 #define	INTIOTOP	(0x00600000)
    155 #define	EXTIOBASE	(0x00600000)
    156 #define	EXTIOTOP	(0x20000000)
    157 #define	MAXADDR		((paddr_t)(0 - NBPG))
    158 
    159 /*
    160  * Internal IO space:
    161  *
    162  * Ranges from 0x400000 to 0x600000 (IIOMAPSIZE).
    163  *
    164  * Internal IO space is mapped in the kernel from ``intiobase'' to
    165  * ``intiolimit'' (defined in locore.s).  Since it is always mapped,
    166  * conversion between physical and kernel virtual addresses is easy.
    167  */
    168 #define	ISIIOVA(va) \
    169 	((uint8_t *)(va) >= intiobase && (uint8_t *)(va) < intiolimit)
    170 #define	IIOV(pa)	((paddr_t)(pa)-INTIOBASE+(vaddr_t)intiobase)
    171 #define	IIOP(va)	((vaddr_t)(va)-(vaddr_t)intiobase+INTIOBASE)
    172 #define	IIOPOFF(pa)	((paddr_t)(pa)-INTIOBASE)
    173 #define	IIOMAPSIZE	btoc(INTIOTOP-INTIOBASE)	/* 2mb */
    174 
    175 /*
    176  * External IO space:
    177  *
    178  * DIO ranges from select codes 0-63 at physical addresses given by:
    179  *	0x600000 + (sc - 32) * 0x10000
    180  * DIO cards are addressed in the range 0-31 [0x600000-0x800000) for
    181  * their control space and the remaining areas, [0x200000-0x400000) and
    182  * [0x800000-0x1000000), are for additional space required by a card;
    183  * e.g. a display framebuffer.
    184  *
    185  * DIO-II ranges from select codes 132-255 at physical addresses given by:
    186  *	0x1000000 + (sc - 132) * 0x400000
    187  * The address range of DIO-II space is thus [0x1000000-0x20000000).
    188  *
    189  * DIO/DIO-II space is too large to map in its entirety, instead devices
    190  * are mapped into kernel virtual address space allocated from a range
    191  * of EIOMAPSIZE pages (vmparam.h) starting at ``extiobase''.
    192  */
    193 #define	DIOBASE		(0x600000)
    194 #define	DIOTOP		(0x1000000)
    195 #define	DIOCSIZE	(0x10000)
    196 #define	DIOIIBASE	(0x01000000)
    197 #define	DIOIITOP	(0x20000000)
    198 #define	DIOIICSIZE	(0x00400000)
    199 
    200 /*
    201  * HP MMU
    202  */
    203 #define	MMUBASE		IIOPOFF(0x5F4000)
    204 #define	MMUSSTP		0x0
    205 #define	MMUUSTP		0x4
    206 #define	MMUTBINVAL	0x8
    207 #define	MMUSTAT		0xC
    208 #define	MMUCMD		MMUSTAT
    209 
    210 #define	MMU_UMEN	0x0001	/* enable user mapping */
    211 #define	MMU_SMEN	0x0002	/* enable supervisor mapping */
    212 #define	MMU_CEN		0x0004	/* enable data cache */
    213 #define	MMU_BERR	0x0008	/* bus error */
    214 #define	MMU_IEN		0x0020	/* enable instruction cache */
    215 #define	MMU_FPE		0x0040	/* enable 68881 FP coprocessor */
    216 #define	MMU_WPF		0x2000	/* write protect fault */
    217 #define	MMU_PF		0x4000	/* page fault */
    218 #define	MMU_PTF		0x8000	/* page table fault */
    219 
    220 #define	MMU_FAULT	(MMU_PTF|MMU_PF|MMU_WPF|MMU_BERR)
    221 #define	MMU_ENAB	(MMU_UMEN|MMU_SMEN|MMU_IEN|MMU_FPE)
    222 
    223 #if defined(CACHE_HAVE_PAC) || defined(CACHE_HAVE_VAC)
    224 #define M68K_CACHEOPS_MACHDEP
    225 #endif
    226 
    227 #ifdef CACHE_HAVE_PAC
    228 #define M68K_CACHEOPS_MACHDEP_PCIA
    229 #endif
    230 
    231 #ifdef CACHE_HAVE_VAC
    232 #define M68K_CACHEOPS_MACHDEP_DCIA
    233 #define M68K_CACHEOPS_MACHDEP_DCIS
    234 #define M68K_CACHEOPS_MACHDEP_DCIU
    235 #define M68K_CACHEOPS_MACHDEP_TBIA
    236 #define M68K_CACHEOPS_MACHDEP_TBIS
    237 #define M68K_CACHEOPS_MACHDEP_TBIAS
    238 #define M68K_CACHEOPS_MACHDEP_TBIAU
    239 #endif
    240 
    241 #endif /* _HP300_CPU_H_ */
    242