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cpu.h revision 1.69.16.2
      1 /*	$NetBSD: cpu.h,v 1.69.16.2 2020/04/08 14:07:38 martin Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1988 University of Utah.
      5  * Copyright (c) 1982, 1990, 1993
      6  *	The Regents of the University of California.  All rights reserved.
      7  *
      8  * This code is derived from software contributed to Berkeley by
      9  * the Systems Programming Group of the University of Utah Computer
     10  * Science Department.
     11  *
     12  * Redistribution and use in source and binary forms, with or without
     13  * modification, are permitted provided that the following conditions
     14  * are met:
     15  * 1. Redistributions of source code must retain the above copyright
     16  *    notice, this list of conditions and the following disclaimer.
     17  * 2. Redistributions in binary form must reproduce the above copyright
     18  *    notice, this list of conditions and the following disclaimer in the
     19  *    documentation and/or other materials provided with the distribution.
     20  * 3. Neither the name of the University nor the names of its contributors
     21  *    may be used to endorse or promote products derived from this software
     22  *    without specific prior written permission.
     23  *
     24  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     25  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     26  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     27  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     28  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     29  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     30  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     31  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     32  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     33  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     34  * SUCH DAMAGE.
     35  *
     36  * from: Utah $Hdr: cpu.h 1.16 91/03/25$
     37  *
     38  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
     39  */
     40 
     41 #ifndef _HP300_CPU_H_
     42 #define	_HP300_CPU_H_
     43 
     44 #if defined(_KERNEL_OPT)
     45 #include "opt_lockdebug.h"
     46 #endif
     47 
     48 /*
     49  * Get common m68k CPU definitions.
     50  */
     51 #include <m68k/cpu.h>
     52 
     53 #if defined(_KERNEL)
     54 /*
     55  * Exported definitions unique to hp300/68k cpu support.
     56  */
     57 #include <machine/hp300spu.h>
     58 
     59 /*
     60  * Get interrupt glue.
     61  */
     62 #include <machine/intr.h>
     63 
     64 /*
     65  * Arguments to hardclock and gatherstats encapsulate the previous
     66  * machine state in an opaque clockframe.  On the hp300, we use
     67  * what the hardware pushes on an interrupt (frame format 0).
     68  */
     69 struct clockframe {
     70 	u_short	sr;		/* sr at time of interrupt */
     71 	u_long	pc;		/* pc at time of interrupt */
     72 	u_short	vo;		/* vector offset (4-word frame) */
     73 };
     74 
     75 #define	CLKF_USERMODE(framep)	(((framep)->sr & PSL_S) == 0)
     76 #define	CLKF_PC(framep)		((framep)->pc)
     77 #if 0
     78 /* We would like to do it this way... */
     79 #define	CLKF_INTR(framep)	(((framep)->sr & PSL_M) == 0)
     80 #else
     81 /* but until we start using PSL_M, we have to do this instead */
     82 #include <machine/intr.h>
     83 #define	CLKF_INTR(framep)	(idepth > 1)	/* XXX */
     84 #endif
     85 
     86 
     87 /*
     88  * Preempt the current process if in interrupt from user mode,
     89  * or after the current trap/syscall if in system mode.
     90  */
     91 #define	cpu_need_resched(ci,l,flags)	do {	\
     92 	__USE(flags); 				\
     93 	aston();				\
     94 } while (/*CONSTCOND*/0)
     95 
     96 /*
     97  * Give a profiling tick to the current process when the user profiling
     98  * buffer pages are invalid.  On the hp300, request an ast to send us
     99  * through trap, marking the proc as needing a profiling tick.
    100  */
    101 #define	cpu_need_proftick(l)	\
    102 	do { (l)->l_pflag |= LP_OWEUPC; aston(); } while (/* CONSTCOND */0)
    103 
    104 /*
    105  * Notify the current process (p) that it has a signal pending,
    106  * process as soon as possible.
    107  */
    108 #define	cpu_signotify(l)	aston()
    109 
    110 extern int astpending;		/* need to trap before returning to user mode */
    111 #define aston() (astpending++)
    112 
    113 /*
    114  * The rest of this should probably be moved to <machine/hp300spu.h>,
    115  * although some of it could probably be put into generic 68k headers.
    116  */
    117 
    118 extern	uint8_t *intiobase, *intiolimit, *extiobase;
    119 extern	void (*vectab[])(void);
    120 
    121 /* locore.s functions */
    122 void	loadustp(int);
    123 
    124 void	doboot(void) __attribute__((__noreturn__));
    125 void	ecacheon(void);
    126 void	ecacheoff(void);
    127 
    128 /* clock.c functions */
    129 void	hp300_calibrate_delay(void);
    130 
    131 /* machdep.c functions */
    132 int	badaddr(void *);
    133 int	badbaddr(void *);
    134 
    135 /* what is this supposed to do? i.e. how is it different than startrtclock? */
    136 #define	enablertclock()
    137 
    138 #endif
    139 
    140 /* physical memory sections */
    141 #define	ROMBASE		(0x00000000)
    142 #define	INTIOBASE	(0x00400000)
    143 #define	INTIOTOP	(0x00600000)
    144 #define	EXTIOBASE	(0x00600000)
    145 #define	EXTIOTOP	(0x20000000)
    146 #define	MAXADDR		((paddr_t)(0 - NBPG))
    147 
    148 /*
    149  * Internal IO space:
    150  *
    151  * Ranges from 0x400000 to 0x600000 (IIOMAPSIZE).
    152  *
    153  * Internal IO space is mapped in the kernel from ``intiobase'' to
    154  * ``intiolimit'' (defined in locore.s).  Since it is always mapped,
    155  * conversion between physical and kernel virtual addresses is easy.
    156  */
    157 #define	ISIIOVA(va) \
    158 	((uint8_t *)(va) >= intiobase && (uint8_t *)(va) < intiolimit)
    159 #define	IIOV(pa)	((paddr_t)(pa)-INTIOBASE+(vaddr_t)intiobase)
    160 #define	IIOP(va)	((vaddr_t)(va)-(vaddr_t)intiobase+INTIOBASE)
    161 #define	IIOPOFF(pa)	((paddr_t)(pa)-INTIOBASE)
    162 #define	IIOMAPSIZE	btoc(INTIOTOP-INTIOBASE)	/* 2mb */
    163 
    164 /*
    165  * External IO space:
    166  *
    167  * DIO ranges from select codes 0-63 at physical addresses given by:
    168  *	0x600000 + (sc - 32) * 0x10000
    169  * DIO cards are addressed in the range 0-31 [0x600000-0x800000) for
    170  * their control space and the remaining areas, [0x200000-0x400000) and
    171  * [0x800000-0x1000000), are for additional space required by a card;
    172  * e.g. a display framebuffer.
    173  *
    174  * DIO-II ranges from select codes 132-255 at physical addresses given by:
    175  *	0x1000000 + (sc - 132) * 0x400000
    176  * The address range of DIO-II space is thus [0x1000000-0x20000000).
    177  *
    178  * DIO/DIO-II space is too large to map in its entirety, instead devices
    179  * are mapped into kernel virtual address space allocated from a range
    180  * of EIOMAPSIZE pages (vmparam.h) starting at ``extiobase''.
    181  */
    182 #define	DIOBASE		(0x600000)
    183 #define	DIOTOP		(0x1000000)
    184 #define	DIOCSIZE	(0x10000)
    185 #define	DIOIIBASE	(0x01000000)
    186 #define	DIOIITOP	(0x20000000)
    187 #define	DIOIICSIZE	(0x00400000)
    188 
    189 /*
    190  * HP MMU
    191  */
    192 #define	MMUBASE		IIOPOFF(0x5F4000)
    193 #define	MMUSSTP		0x0
    194 #define	MMUUSTP		0x4
    195 #define	MMUTBINVAL	0x8
    196 #define	MMUSTAT		0xC
    197 #define	MMUCMD		MMUSTAT
    198 
    199 #define	MMU_UMEN	0x0001	/* enable user mapping */
    200 #define	MMU_SMEN	0x0002	/* enable supervisor mapping */
    201 #define	MMU_CEN		0x0004	/* enable data cache */
    202 #define	MMU_BERR	0x0008	/* bus error */
    203 #define	MMU_IEN		0x0020	/* enable instruction cache */
    204 #define	MMU_FPE		0x0040	/* enable 68881 FP coprocessor */
    205 #define	MMU_WPF		0x2000	/* write protect fault */
    206 #define	MMU_PF		0x4000	/* page fault */
    207 #define	MMU_PTF		0x8000	/* page table fault */
    208 
    209 #define	MMU_FAULT	(MMU_PTF|MMU_PF|MMU_WPF|MMU_BERR)
    210 #define	MMU_ENAB	(MMU_UMEN|MMU_SMEN|MMU_IEN|MMU_FPE)
    211 
    212 #if defined(CACHE_HAVE_PAC) || defined(CACHE_HAVE_VAC)
    213 #define M68K_CACHEOPS_MACHDEP
    214 #endif
    215 
    216 #ifdef CACHE_HAVE_PAC
    217 #define M68K_CACHEOPS_MACHDEP_PCIA
    218 #endif
    219 
    220 #ifdef CACHE_HAVE_VAC
    221 #define M68K_CACHEOPS_MACHDEP_DCIA
    222 #define M68K_CACHEOPS_MACHDEP_DCIS
    223 #define M68K_CACHEOPS_MACHDEP_DCIU
    224 #define M68K_CACHEOPS_MACHDEP_TBIA
    225 #define M68K_CACHEOPS_MACHDEP_TBIS
    226 #define M68K_CACHEOPS_MACHDEP_TBIAS
    227 #define M68K_CACHEOPS_MACHDEP_TBIAU
    228 #endif
    229 
    230 #endif /* _HP300_CPU_H_ */
    231