intr.h revision 1.8 1 /* $NetBSD: intr.h,v 1.8 2000/08/21 02:06:32 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 1996, 1997, 1999 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 #ifndef _HP300_INTR_H_
40 #define _HP300_INTR_H_
41
42 #include <machine/psl.h>
43
44 #ifdef _HP300_INTR_H_PRIVATE
45 #include <sys/queue.h>
46
47 /*
48 * The location and size of the autovectored interrupt portion
49 * of the vector table.
50 */
51 #define ISRLOC 0x18
52 #define NISR 8
53
54 struct isr {
55 LIST_ENTRY(isr) isr_link;
56 int (*isr_func) __P((void *));
57 void *isr_arg;
58 int isr_ipl;
59 int isr_priority;
60 };
61 #endif /* _HP300_INTR_H_PRIVATE */
62
63 /*
64 * Interrupt "levels". These are a more abstract representation
65 * of interrupt levels, and do not have the same meaning as m68k
66 * CPU interrupt levels. They serve two purposes:
67 *
68 * - properly order ISRs in the list for that CPU ipl
69 * - compute CPU PSL values for the spl*() calls.
70 */
71 #define IPL_NONE 0 /* disable only this interrupt */
72 #define IPL_BIO 1 /* disable block I/O interrupts */
73 #define IPL_NET 2 /* disable network interrupts */
74 #define IPL_TTY 3 /* disable terminal interrupts */
75 #define IPL_TTYNOBUF 4 /* IPL_TTY + higher ISR priority */
76 #define IPL_CLOCK 5 /* disable clock interrupts */
77 #define IPL_HIGH 6 /* disable all interrupts */
78
79 /*
80 * Convert PSL values to CPU IPLs and vice-versa.
81 */
82 #define PSLTOIPL(x) (((x) >> 8) & 0xf)
83 #define IPLTOPSL(x) ((((x) & 0xf) << 8) | PSL_S)
84
85 #ifdef _KERNEL
86 /* spl0 requires checking for software interrupts */
87
88 /*
89 * This array contains the appropriate PSL_S|PSL_IPL? values
90 * to raise interrupt priority to the requested level.
91 */
92 extern unsigned short hp300_ipls[];
93
94 #define HP300_IPL_SOFT 0
95 #define HP300_IPL_BIO 1
96 #define HP300_IPL_NET 2
97 #define HP300_IPL_TTY 3
98 #define HP300_IPL_IMP 4
99 #define HP300_IPL_CLOCK 5
100 #define HP300_IPL_HIGH 6
101 #define HP300_NIPLS 7
102
103 /* These spl calls are _not_ to be used by machine-independent code. */
104 #define splhil() splraise1()
105 #define splkbd() splhil()
106
107 /* These spl calls are used by machine-independent code. */
108 #define spllowersoftclock() spl1()
109 #define splsoft() splraise1()
110 #define splsoftclock() splsoft()
111 #define splsoftnet() splsoft()
112 #define splbio() _splraise(hp300_ipls[HP300_IPL_BIO])
113 #define splnet() _splraise(hp300_ipls[HP300_IPL_NET])
114 #define spltty() _splraise(hp300_ipls[HP300_IPL_TTY])
115 #define splimp() _splraise(hp300_ipls[HP300_IPL_IMP])
116 #define splclock() spl6()
117 #define splstatclock() splclock()
118 #define splhigh() spl7()
119 #define splsched() spl7()
120
121 /* watch out for side effects */
122 #define splx(s) ((s) & PSL_IPL ? _spl((s)) : spl0())
123
124 /*
125 * Simulated software interrupt register.
126 */
127 extern volatile u_int8_t ssir;
128
129 #define SIR_NET 0x01
130 #define SIR_CLOCK 0x02
131
132 #define siron(mask) \
133 __asm __volatile ( "orb %1,%0" : "=m" (ssir) : "i" ((mask)))
134 #define siroff(mask) \
135 __asm __volatile ( "andb %1,%0" : "=m" (ssir) : "ir" (~(mask)));
136
137 #define setsoftnet() siron(SIR_NET)
138 #define setsoftclock() siron(SIR_CLOCK)
139
140 /* locore.s */
141 int spl0 __P((void));
142
143 /* intr.c */
144 void intr_init __P((void));
145 void *intr_establish __P((int (*)(void *), void *, int, int));
146 void intr_disestablish __P((void *));
147 void intr_dispatch __P((int));
148 void intr_printlevels __P((void));
149 #endif /* _KERNEL */
150
151 #endif /* _HP300_INTR_H_ */
152