pte.h revision 1.2
1 /* 2 * Copyright (c) 1988 University of Utah. 3 * Copyright (c) 1982, 1986, 1990, 1993 4 * The Regents of the University of California. All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * the Systems Programming Group of the University of Utah Computer 8 * Science Department. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the University of 21 * California, Berkeley and its contributors. 22 * 4. Neither the name of the University nor the names of its contributors 23 * may be used to endorse or promote products derived from this software 24 * without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36 * SUCH DAMAGE. 37 * 38 * from: Utah $Hdr: pte.h 1.13 92/01/20$ 39 * 40 * from: @(#)pte.h 8.1 (Berkeley) 6/10/93 41 * $Id: pte.h,v 1.2 1994/05/23 06:21:54 mycroft Exp $ 42 */ 43 44 /* 45 * HP300 hardware segment/page table entries 46 */ 47 48 struct ste { 49 unsigned int sg_pfnum:20; /* page table frame number */ 50 unsigned int :8; /* reserved at 0 */ 51 unsigned int :1; /* reserved at 1 */ 52 unsigned int sg_prot:1; /* write protect bit */ 53 unsigned int sg_v:2; /* valid bits */ 54 }; 55 56 struct ste40 { 57 unsigned int sg_ptaddr:24; /* page table page addr */ 58 unsigned int :4; /* reserved at 0 */ 59 unsigned int sg_u; /* hardware modified (dirty) bit */ 60 unsigned int sg_prot:1; /* write protect bit */ 61 unsigned int sg_v:2; /* valid bits */ 62 }; 63 64 struct pte { 65 unsigned int pg_pfnum:20; /* page frame number or 0 */ 66 unsigned int :3; 67 unsigned int pg_w:1; /* is wired */ 68 unsigned int :1; /* reserved at zero */ 69 unsigned int pg_ci:1; /* cache inhibit bit */ 70 unsigned int :1; /* reserved at zero */ 71 unsigned int pg_m:1; /* hardware modified (dirty) bit */ 72 unsigned int pg_u:1; /* hardware used (reference) bit */ 73 unsigned int pg_prot:1; /* write protect bit */ 74 unsigned int pg_v:2; /* valid bit */ 75 }; 76 77 typedef struct ste st_entry_t; /* segment table entry */ 78 typedef struct pte pt_entry_t; /* Mach page table entry */ 79 80 #define PT_ENTRY_NULL ((pt_entry_t *) 0) 81 #define ST_ENTRY_NULL ((st_entry_t *) 0) 82 83 #define SG_V 0x00000002 /* segment is valid */ 84 #define SG_NV 0x00000000 85 #define SG_PROT 0x00000004 /* access protection mask */ 86 #define SG_RO 0x00000004 87 #define SG_RW 0x00000000 88 #define SG_U 0x00000008 /* modified bit (68040) */ 89 #define SG_FRAME 0xfffff000 90 #define SG_IMASK 0xffc00000 91 #define SG_ISHIFT 22 92 #define SG_PMASK 0x003ff000 93 #define SG_PSHIFT 12 94 95 /* 68040 additions */ 96 #define SG4_MASK1 0xfe000000 97 #define SG4_SHIFT1 25 98 #define SG4_MASK2 0x01fc0000 99 #define SG4_SHIFT2 18 100 #define SG4_MASK3 0x0003f000 101 #define SG4_SHIFT3 12 102 #define SG4_ADDR1 0xfffffe00 103 #define SG4_ADDR2 0xffffff00 104 #define SG4_LEV1SIZE 128 105 #define SG4_LEV2SIZE 128 106 #define SG4_LEV3SIZE 64 107 108 #define PG_V 0x00000001 109 #define PG_NV 0x00000000 110 #define PG_PROT 0x00000004 111 #define PG_U 0x00000008 112 #define PG_M 0x00000010 113 #define PG_W 0x00000100 114 #define PG_RO 0x00000004 115 #define PG_RW 0x00000000 116 #define PG_FRAME 0xfffff000 117 #define PG_CI 0x00000040 118 #define PG_SHIFT 12 119 #define PG_PFNUM(x) (((x) & PG_FRAME) >> PG_SHIFT) 120 121 /* 68040 additions */ 122 #define PG_CMASK 0x00000060 /* cache mode mask */ 123 #define PG_CWT 0x00000000 /* writethrough caching */ 124 #define PG_CCB 0x00000020 /* copyback caching */ 125 #define PG_CIS 0x00000040 /* cache inhibited serialized */ 126 #define PG_CIN 0x00000060 /* cache inhibited nonserialized */ 127 #define PG_SO 0x00000080 /* supervisor only */ 128 129 #define HP_STSIZE (MAXUL2SIZE*SG4_LEV2SIZE*sizeof(st_entry_t)) 130 /* user process segment table size */ 131 #define HP_MAX_PTSIZE 0x400000 /* max size of UPT */ 132 #define HP_MAX_KPTSIZE 0x100000 /* max memory to allocate to KPT */ 133 #define HP_PTBASE 0x10000000 /* UPT map base address */ 134 #define HP_PTMAXSIZE 0x70000000 /* UPT map maximum size */ 135 136 /* 137 * Kernel virtual address to page table entry and to physical address. 138 */ 139 #define kvtopte(va) \ 140 (&Sysmap[((unsigned)(va) - VM_MIN_KERNEL_ADDRESS) >> PGSHIFT]) 141 #define ptetokv(pt) \ 142 ((((pt_entry_t *)(pt) - Sysmap) << PGSHIFT) + VM_MIN_KERNEL_ADDRESS) 143 #define kvtophys(va) \ 144 ((kvtopte(va)->pg_pfnum << PGSHIFT) | ((int)(va) & PGOFSET)) 145 146
Indexes created Mon Sep 29 21:09:56 GMT 2025