hilreg.h revision 1.2.2.2
1 1.2.2.2 rmind /* $NetBSD: hilreg.h,v 1.2.2.2 2011/03/05 20:50:25 rmind Exp $ */ 2 1.2.2.2 rmind 3 1.2.2.2 rmind /* 4 1.2.2.2 rmind * Copyright (c) 1988 University of Utah. 5 1.2.2.2 rmind * Copyright (c) 1990, 1993 6 1.2.2.2 rmind * The Regents of the University of California. All rights reserved. 7 1.2.2.2 rmind * 8 1.2.2.2 rmind * This code is derived from software contributed to Berkeley by 9 1.2.2.2 rmind * the Systems Programming Group of the University of Utah Computer 10 1.2.2.2 rmind * Science Department. 11 1.2.2.2 rmind * 12 1.2.2.2 rmind * Redistribution and use in source and binary forms, with or without 13 1.2.2.2 rmind * modification, are permitted provided that the following conditions 14 1.2.2.2 rmind * are met: 15 1.2.2.2 rmind * 1. Redistributions of source code must retain the above copyright 16 1.2.2.2 rmind * notice, this list of conditions and the following disclaimer. 17 1.2.2.2 rmind * 2. Redistributions in binary form must reproduce the above copyright 18 1.2.2.2 rmind * notice, this list of conditions and the following disclaimer in the 19 1.2.2.2 rmind * documentation and/or other materials provided with the distribution. 20 1.2.2.2 rmind * 3. Neither the name of the University nor the names of its contributors 21 1.2.2.2 rmind * may be used to endorse or promote products derived from this software 22 1.2.2.2 rmind * without specific prior written permission. 23 1.2.2.2 rmind * 24 1.2.2.2 rmind * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 1.2.2.2 rmind * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 1.2.2.2 rmind * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 1.2.2.2 rmind * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 1.2.2.2 rmind * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 1.2.2.2 rmind * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 1.2.2.2 rmind * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 1.2.2.2 rmind * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 1.2.2.2 rmind * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 1.2.2.2 rmind * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 1.2.2.2 rmind * SUCH DAMAGE. 35 1.2.2.2 rmind * 36 1.2.2.2 rmind * from: Utah $Hdr: hilreg.h 1.10 92/01/21$ 37 1.2.2.2 rmind * 38 1.2.2.2 rmind * @(#)hilreg.h 8.1 (Berkeley) 6/10/93 39 1.2.2.2 rmind */ 40 1.2.2.2 rmind 41 1.2.2.2 rmind #include <hp300/dev/iotypes.h> /* XXX */ 42 1.2.2.2 rmind 43 1.2.2.2 rmind #ifdef hp300 44 1.2.2.2 rmind struct hil_dev { 45 1.2.2.2 rmind char hil_pad0; 46 1.2.2.2 rmind vu_char hil_data; 47 1.2.2.2 rmind char hil_pad1; 48 1.2.2.2 rmind vu_char hil_cmd; 49 1.2.2.2 rmind }; 50 1.2.2.2 rmind 51 1.2.2.2 rmind #define HILADDR ((struct hil_dev *)IIOV(0x428000)) 52 1.2.2.2 rmind #define BBCADDR ((struct hil_dev *)IIOV(0x420000)) 53 1.2.2.2 rmind #endif 54 1.2.2.2 rmind 55 1.2.2.2 rmind #ifdef hp800 56 1.2.2.2 rmind #ifdef hp700 57 1.2.2.2 rmind struct hil_dev { 58 1.2.2.2 rmind vu_char hil_rsthold; /* (WO) reset hold (and Serial #3) */ 59 1.2.2.2 rmind vu_char hil_resv1[2047]; 60 1.2.2.2 rmind vu_char hil_data; /* send/receive data to/from 8042 */ 61 1.2.2.2 rmind vu_char hil_cmd; /* status/control to/from 8042 */ 62 1.2.2.2 rmind vu_char hil_resv2[1022]; 63 1.2.2.2 rmind vu_char hil_rstrel; /* (WO) reset release (and Serial #3) */ 64 1.2.2.2 rmind 65 1.2.2.2 rmind }; 66 1.2.2.2 rmind #else 67 1.2.2.2 rmind struct hil_dev { 68 1.2.2.2 rmind vu_int hil_data; 69 1.2.2.2 rmind vu_int hil_pad; 70 1.2.2.2 rmind vu_int hil_cmd; 71 1.2.2.2 rmind }; 72 1.2.2.2 rmind #endif 73 1.2.2.2 rmind #endif 74 1.2.2.2 rmind #define hil_stat hil_cmd 75 1.2.2.2 rmind 76 1.2.2.2 rmind #if defined(hp300) || defined(hp700) 77 1.2.2.2 rmind #define READHILDATA(x) ((x)->hil_data) 78 1.2.2.2 rmind #define READHILSTAT(x) ((x)->hil_stat) 79 1.2.2.2 rmind #define READHILCMD(x) ((x)->hil_cmd) 80 1.2.2.2 rmind #define WRITEHILDATA(x, y) ((x)->hil_data = (y)) 81 1.2.2.2 rmind #define WRITEHILSTAT(x, y) ((x)->hil_stat = (y)) 82 1.2.2.2 rmind #define WRITEHILCMD(x, y) ((x)->hil_cmd = (y)) 83 1.2.2.2 rmind #else 84 1.2.2.2 rmind #define READHILDATA(x) ((x)->hil_data >> 24) 85 1.2.2.2 rmind #define READHILSTAT(x) ((x)->hil_stat >> 24) 86 1.2.2.2 rmind #define READHILCMD(x) ((x)->hil_cmd >> 24) 87 1.2.2.2 rmind #define WRITEHILDATA(x, y) ((x)->hil_data = ((y) << 24)) 88 1.2.2.2 rmind #define WRITEHILSTAT(x, y) ((x)->hil_stat = ((y) << 24)) 89 1.2.2.2 rmind #define WRITEHILCMD(x, y) ((x)->hil_cmd = ((y) << 24)) 90 1.2.2.2 rmind #endif 91 1.2.2.2 rmind 92 1.2.2.2 rmind #define HIL_BUSY 0x02 93 1.2.2.2 rmind #define HIL_DATA_RDY 0x01 94 1.2.2.2 rmind 95 1.2.2.2 rmind #define HILWAIT(hil_dev) while ((READHILSTAT(hil_dev) & HIL_BUSY)) 96 1.2.2.2 rmind #define HILDATAWAIT(hil_dev) while (!(READHILSTAT(hil_dev) & HIL_DATA_RDY)) 97 1.2.2.2 rmind 98 1.2.2.2 rmind /* HIL status bits */ 99 1.2.2.2 rmind #define HIL_POLLDATA 0x10 /* HIL poll data follows */ 100 1.2.2.2 rmind #define HIL_COMMAND 0x08 /* Start of original command */ 101 1.2.2.2 rmind #define HIL_ERROR 0x080 /* HIL error */ 102 1.2.2.2 rmind #define HIL_RECONFIG 0x080 /* HIL has reconfigured */ 103 1.2.2.2 rmind #define HIL_STATMASK (HIL_DATA | HIL_COMMAND) 104 1.2.2.2 rmind 105 1.2.2.2 rmind #define HIL_SSHIFT 4 /* Bits to shift status over */ 106 1.2.2.2 rmind #define HIL_SMASK 0xF /* Service request status mask */ 107 1.2.2.2 rmind #define HIL_DEVMASK 0x07 108 1.2.2.2 rmind 109 1.2.2.2 rmind /* HIL status types */ 110 1.2.2.2 rmind #define HIL_STATUS 0x5 /* HIL status in data register */ 111 1.2.2.2 rmind #define HIL_DATA 0x6 /* HIL data in data register */ 112 1.2.2.2 rmind #define HIL_CTRLSHIFT 0x8 /* key + CTRL + SHIFT */ 113 1.2.2.2 rmind #define HIL_CTRL 0x9 /* key + CTRL */ 114 1.2.2.2 rmind #define HIL_SHIFT 0xA /* key + SHIFT */ 115 1.2.2.2 rmind #define HIL_KEY 0xB /* key only */ 116 1.2.2.2 rmind #define HIL_68K 0x4 /* Data from the 68k is ready */ 117 1.2.2.2 rmind 118 1.2.2.2 rmind /* HIL commands */ 119 1.2.2.2 rmind #define HIL_SETARD 0xA0 /* set auto-repeat delay */ 120 1.2.2.2 rmind #define HIL_SETARR 0xA2 /* set auto-repeat rate */ 121 1.2.2.2 rmind #define HIL_SETTONE 0xA3 /* set tone generator */ 122 1.2.2.2 rmind #define HIL_CNMT 0xB2 /* clear nmi */ 123 1.2.2.2 rmind #define HIL_INTON 0x5C /* Turn on interrupts. */ 124 1.2.2.2 rmind #define HIL_INTOFF 0x5D /* Turn off interrupts. */ 125 1.2.2.2 rmind #define HIL_TRIGGER 0xC5 /* trigger command */ 126 1.2.2.2 rmind #define HIL_STARTCMD 0xE0 /* start loop command */ 127 1.2.2.2 rmind #define HIL_TIMEOUT 0xFE /* timeout */ 128 1.2.2.2 rmind #define HIL_READTIME 0x13 /* Read real time register */ 129 1.2.2.2 rmind 130 1.2.2.2 rmind /* Read/write various registers on the 8042. */ 131 1.2.2.2 rmind #define HIL_READBUSY 0x02 /* internal "busy" register */ 132 1.2.2.2 rmind #define HIL_READKBDLANG 0x12 /* read keyboard language code */ 133 1.2.2.2 rmind #define HIL_READKBDSADR 0xF9 134 1.2.2.2 rmind #define HIL_WRITEKBDSADR 0xE9 135 1.2.2.2 rmind #define HIL_READLPSTAT 0xFA 136 1.2.2.2 rmind #define HIL_WRITELPSTAT 0xEA 137 1.2.2.2 rmind #define HIL_READLPCTRL 0xFB 138 1.2.2.2 rmind #define HIL_WRITELPCTRL 0xEB 139 1.2.2.2 rmind 140 1.2.2.2 rmind /* BUSY bits */ 141 1.2.2.2 rmind #define BSY_LOOPBUSY 0x04 142 1.2.2.2 rmind 143 1.2.2.2 rmind /* LPCTRL bits */ 144 1.2.2.2 rmind #define LPC_AUTOPOLL 0x01 /* enable auto-polling */ 145 1.2.2.2 rmind #define LPC_NOERROR 0x02 /* don't report errors */ 146 1.2.2.2 rmind #define LPC_NORECONF 0x04 /* don't report reconfigure */ 147 1.2.2.2 rmind #define LPC_KBDCOOK 0x10 /* cook all keyboards */ 148 1.2.2.2 rmind #define LPC_RECONF 0x80 /* reconfigure the loop */ 149 1.2.2.2 rmind 150 1.2.2.2 rmind /* LPSTAT bits */ 151 1.2.2.2 rmind #define LPS_DEVMASK 0x07 /* number of loop devices */ 152 1.2.2.2 rmind #define LPS_CONFGOOD 0x08 /* reconfiguration worked */ 153 1.2.2.2 rmind #define LPS_CONFFAIL 0x80 /* reconfiguration failed */ 154 1.2.2.2 rmind 155 1.2.2.2 rmind /* HIL packet headers */ 156 1.2.2.2 rmind #define HIL_MOUSEDATA 0x2 157 1.2.2.2 rmind #define HIL_KBDDATA 0x40 158 1.2.2.2 rmind 159 1.2.2.2 rmind #define HIL_MOUSEMOTION 0x02 /* mouse movement event */ 160 1.2.2.2 rmind #define HIL_KBDBUTTON 0x40 /* keyboard button event */ 161 1.2.2.2 rmind #define HIL_MOUSEBUTTON 0x40 /* mouse button event */ 162 1.2.2.2 rmind #define HIL_BUTTONBOX 0x60 /* button box event */ 163 1.2.2.2 rmind #define HIL_TABLET 0x02 /* tablet motion event */ 164 1.2.2.2 rmind #define HIL_KNOBBOX 0x03 /* knob box motion data */ 165 1.2.2.2 rmind 166 1.2.2.2 rmind /* For setting auto repeat on the keyboard */ 167 1.2.2.2 rmind #define ar_format(x) ~((x - 10) / 10) 168 1.2.2.2 rmind #define KBD_ARD 400 /* initial delay in msec (10 - 2560) */ 169 1.2.2.2 rmind #define KBD_ARR 60 /* rate (10 - 2550 msec, 2551 == off) */ 170 1.2.2.2 rmind 171 1.2.2.2 rmind #ifdef hp300 172 1.2.2.2 rmind /* Magic */ 173 1.2.2.2 rmind #define KBDNMISTAT ((volatile char *)IIOV(0x478005)) 174 1.2.2.2 rmind #define KBDNMI 0x04 175 1.2.2.2 rmind #endif 176
Indexes created Thu Oct 23 22:10:10 GMT 2025