11.7Snonaka/* -*-C++-*- $NetBSD: arm_arch.h,v 1.7 2010/04/06 16:20:28 nonaka Exp $ */ 21.1Such 31.1Such/*- 41.1Such * Copyright (c) 2001 The NetBSD Foundation, Inc. 51.1Such * All rights reserved. 61.1Such * 71.1Such * This code is derived from software contributed to The NetBSD Foundation 81.1Such * by UCHIYAMA Yasushi. 91.1Such * 101.1Such * Redistribution and use in source and binary forms, with or without 111.1Such * modification, are permitted provided that the following conditions 121.1Such * are met: 131.1Such * 1. Redistributions of source code must retain the above copyright 141.1Such * notice, this list of conditions and the following disclaimer. 151.1Such * 2. Redistributions in binary form must reproduce the above copyright 161.1Such * notice, this list of conditions and the following disclaimer in the 171.1Such * documentation and/or other materials provided with the distribution. 181.1Such * 191.1Such * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 201.1Such * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 211.1Such * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 221.1Such * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 231.1Such * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 241.1Such * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 251.1Such * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 261.1Such * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 271.1Such * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 281.1Such * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 291.1Such * POSSIBILITY OF SUCH DAMAGE. 301.1Such */ 311.1Such 321.1Such#ifndef _HPCBOOT_ARM_ARCH_H_ 331.2Such#define _HPCBOOT_ARM_ARCH_H_ 341.1Such 351.1Such#include <hpcboot.h> 361.1Such#include <arch.h> 371.1Such 381.1Suchclass Console; 391.1Such 401.1Suchclass ARMArchitecture : public Architecture { 411.5Srafalprotected: 421.1Such int _kmode; 431.7Snonaka // test routine for peripherals. 441.5Srafal virtual void testFramebuffer(void) = 0; 451.5Srafal virtual void testUART(void) = 0; 461.1Such 471.7Snonaka // dump peripheral regs. 481.7Snonaka virtual void dumpPeripheralRegs(void) = 0; 491.7Snonaka 501.1Suchpublic: 511.1Such ARMArchitecture(Console *&, MemoryManager *&); 521.1Such virtual ~ARMArchitecture(void); 531.1Such 541.5Srafal virtual BOOL init(void) = 0; 551.1Such void systemInfo(void); 561.5Srafal 571.5Srafal virtual BOOL setupLoader(void) = 0; 581.5Srafal virtual void jump(paddr_t info, paddr_t pvec) = 0; 591.1Such}; 601.1Such 611.1Such__BEGIN_DECLS 621.1Such// Coprocessor 15 631.4Suweuint32_t GetCop15Reg0(void); 641.4Suweuint32_t GetCop15Reg1(void); void SetCop15Reg1(uint32_t); 651.4Suweuint32_t GetCop15Reg2(void); void SetCop15Reg2(uint32_t); 661.4Suweuint32_t GetCop15Reg3(void); void SetCop15Reg3(uint32_t); 671.4Suweuint32_t GetCop15Reg5(void); 681.4Suweuint32_t GetCop15Reg6(void); 691.4Suweuint32_t GetCop15Reg13(void); void SetCop15Reg13(uint32_t); 701.4Suweuint32_t GetCop15Reg14(void); 711.1Such 721.2Such// Interrupt 731.1Suchvoid EI(void); 741.1Suchvoid DI(void); 751.1Such 761.1Such// Write-Back I/D-separate Cache 771.1Suchvoid InvalidateICache(void); 781.1Suchvoid WritebackDCache(void); 791.1Suchvoid InvalidateDCache(void); 801.1Suchvoid WritebackInvalidateDCache(void); 811.7Snonakavoid WritebufferFlush(void); 821.1Such 831.1Such// MMU TLB access 841.1Suchvoid FlushIDTLB(void); 851.1Suchvoid FlushITLB(void); 861.1Suchvoid FlushDTLB(void); 871.1Suchvoid FlushDTLBS(vaddr_t); 881.1Such 891.4Suweuint32_t GetCPSR(void); 901.4Suwevoid SetCPSR(uint32_t); 911.1Suchvoid SetSVCMode(void); 921.1Suchvoid SetSystemMode(void); 931.1Such 941.7Snonakaextern uint32_t dcachesize; 951.7Snonaka 961.1Such__END_DECLS 971.1Such 981.1Such#endif // _HPCBOOT_ARM_ARCH_H_ 99