arm_mmu.h revision 1.4 1 1.4 martin /* -*-C++-*- $NetBSD: arm_mmu.h,v 1.4 2008/04/28 20:23:20 martin Exp $ */
2 1.1 uch
3 1.1 uch /*-
4 1.1 uch * Copyright (c) 2001 The NetBSD Foundation, Inc.
5 1.1 uch * All rights reserved.
6 1.1 uch *
7 1.1 uch * This code is derived from software contributed to The NetBSD Foundation
8 1.1 uch * by UCHIYAMA Yasushi.
9 1.1 uch *
10 1.1 uch * Redistribution and use in source and binary forms, with or without
11 1.1 uch * modification, are permitted provided that the following conditions
12 1.1 uch * are met:
13 1.1 uch * 1. Redistributions of source code must retain the above copyright
14 1.1 uch * notice, this list of conditions and the following disclaimer.
15 1.1 uch * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 uch * notice, this list of conditions and the following disclaimer in the
17 1.1 uch * documentation and/or other materials provided with the distribution.
18 1.1 uch *
19 1.1 uch * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 uch * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 uch * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 uch * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 uch * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 uch * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 uch * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 uch * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 uch * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 uch * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 uch * POSSIBILITY OF SUCH DAMAGE.
30 1.1 uch */
31 1.1 uch
32 1.1 uch #ifndef _HPCBOOT_ARM_MMU_H_
33 1.2 uch #define _HPCBOOT_ARM_MMU_H_
34 1.1 uch
35 1.1 uch #include <arm/arm_arch.h>
36 1.1 uch #include <memory.h>
37 1.1 uch
38 1.2 uch #define ARM_MMU_TABLEBASE_MASK 0xffffc000
39 1.2 uch #define ARM_MMU_TABLEINDEX_MASK 0x00003ffc
40 1.2 uch #define ARM_MMU_VADDR_TABLE_INDEX_MASK 0xfff00000
41 1.2 uch #define ARM_MMU_TABLEINDEX_SHIFT 18
42 1.2 uch #define ARM_MMU_TABLEINDEX(x) \
43 1.1 uch ((((x) & ARM_MMU_VADDR_TABLE_INDEX_MASK) >> \
44 1.1 uch ARM_MMU_TABLEINDEX_SHIFT) & ARM_MMU_TABLEINDEX_MASK)
45 1.1 uch
46 1.1 uch /*
47 1.1 uch * 1st level descriptor
48 1.1 uch */
49 1.2 uch #define ARM_MMU_LEVEL1DESC_TRANSLATE_TYPE_MASK 0x3
50 1.2 uch #define ARM_MMU_LEVEL1DESC_TRANSLATE_TYPE(x) \
51 1.1 uch ((x) & ARM_MMU_LEVEL1DESC_TRANSLATE_TYPE_MASK)
52 1.2 uch #define ARM_MMU_LEVEL1DESC_TRANSLATE_SECTION 0x2
53 1.2 uch #define ARM_MMU_LEVEL1DESC_TRANSLATE_PAGE 0x1
54 1.1 uch
55 1.1 uch /*
56 1.1 uch * Section translation
57 1.1 uch */
58 1.2 uch #define ARM_MMU_SECTION_BASE_MASK 0xfff00000
59 1.2 uch #define ARM_MMU_SECTION_BASE(x) \
60 1.1 uch ((x) & ARM_MMU_SECTION_BASE_MASK)
61 1.2 uch #define ARM_MMU_VADDR_SECTION_INDEX_MASK 0x000fffff
62 1.2 uch #define ARM_MMU_VADDR_SECTION_INDEX(x) \
63 1.1 uch ((x) & ARM_MMU_VADDR_SECTION_INDEX_MASK)
64 1.1 uch /*
65 1.1 uch * Page translation
66 1.1 uch */
67 1.2 uch #define ARM_MMU_PTE_BASE_MASK 0xfffffc00
68 1.2 uch #define ARM_MMU_PTE_BASE(x) ((x) & ARM_MMU_PTE_BASE_MASK)
69 1.2 uch #define ARM_MMU_VADDR_PTE_INDEX_MASK 0x000003fc
70 1.2 uch #define ARM_MMU_VADDR_PTE_INDEX_SHIFT 10
71 1.2 uch #define ARM_MMU_VADDR_PTE_INDEX(x) \
72 1.1 uch (((x) >> ARM_MMU_VADDR_PTE_INDEX_SHIFT) & \
73 1.1 uch ARM_MMU_VADDR_PTE_INDEX_MASK)
74 1.1 uch
75 1.1 uch class MemoryManager_ArmMMU : public MemoryManager {
76 1.1 uch private:
77 1.1 uch BOOL _kmode;
78 1.1 uch paddr_t _table_base;
79 1.1 uch
80 1.1 uch public:
81 1.1 uch MemoryManager_ArmMMU(Console *&, size_t);
82 1.1 uch virtual ~MemoryManager_ArmMMU();
83 1.1 uch BOOL init(void);
84 1.1 uch paddr_t searchPage(vaddr_t vaddr);
85 1.1 uch };
86 1.1 uch
87 1.1 uch #endif // _HPCBOOT_ARM_MMU_H_
88