arm_mmu.h revision 1.2 1 /* -*-C++-*- $NetBSD: arm_mmu.h,v 1.2 2004/08/06 18:33:09 uch Exp $ */
2
3 /*-
4 * Copyright (c) 2001 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by UCHIYAMA Yasushi.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 #ifndef _HPCBOOT_ARM_MMU_H_
40 #define _HPCBOOT_ARM_MMU_H_
41
42 #include <arm/arm_arch.h>
43 #include <memory.h>
44
45 #define ARM_MMU_TABLEBASE_MASK 0xffffc000
46 #define ARM_MMU_TABLEINDEX_MASK 0x00003ffc
47 #define ARM_MMU_VADDR_TABLE_INDEX_MASK 0xfff00000
48 #define ARM_MMU_TABLEINDEX_SHIFT 18
49 #define ARM_MMU_TABLEINDEX(x) \
50 ((((x) & ARM_MMU_VADDR_TABLE_INDEX_MASK) >> \
51 ARM_MMU_TABLEINDEX_SHIFT) & ARM_MMU_TABLEINDEX_MASK)
52
53 /*
54 * 1st level descriptor
55 */
56 #define ARM_MMU_LEVEL1DESC_TRANSLATE_TYPE_MASK 0x3
57 #define ARM_MMU_LEVEL1DESC_TRANSLATE_TYPE(x) \
58 ((x) & ARM_MMU_LEVEL1DESC_TRANSLATE_TYPE_MASK)
59 #define ARM_MMU_LEVEL1DESC_TRANSLATE_SECTION 0x2
60 #define ARM_MMU_LEVEL1DESC_TRANSLATE_PAGE 0x1
61
62 /*
63 * Section translation
64 */
65 #define ARM_MMU_SECTION_BASE_MASK 0xfff00000
66 #define ARM_MMU_SECTION_BASE(x) \
67 ((x) & ARM_MMU_SECTION_BASE_MASK)
68 #define ARM_MMU_VADDR_SECTION_INDEX_MASK 0x000fffff
69 #define ARM_MMU_VADDR_SECTION_INDEX(x) \
70 ((x) & ARM_MMU_VADDR_SECTION_INDEX_MASK)
71 /*
72 * Page translation
73 */
74 #define ARM_MMU_PTE_BASE_MASK 0xfffffc00
75 #define ARM_MMU_PTE_BASE(x) ((x) & ARM_MMU_PTE_BASE_MASK)
76 #define ARM_MMU_VADDR_PTE_INDEX_MASK 0x000003fc
77 #define ARM_MMU_VADDR_PTE_INDEX_SHIFT 10
78 #define ARM_MMU_VADDR_PTE_INDEX(x) \
79 (((x) >> ARM_MMU_VADDR_PTE_INDEX_SHIFT) & \
80 ARM_MMU_VADDR_PTE_INDEX_MASK)
81
82 class MemoryManager_ArmMMU : public MemoryManager {
83 private:
84 BOOL _kmode;
85 paddr_t _table_base;
86
87 public:
88 MemoryManager_ArmMMU(Console *&, size_t);
89 virtual ~MemoryManager_ArmMMU();
90 BOOL init(void);
91 paddr_t searchPage(vaddr_t vaddr);
92 };
93
94 #endif // _HPCBOOT_ARM_MMU_H_
95