arm_sa1100.cpp revision 1.1.6.2
1 /* $NetBSD: arm_sa1100.cpp,v 1.1.6.2 2008/03/24 07:14:57 keiichi Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by UCHIYAMA Yasushi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <arm/arm_arch.h> 40 #include <console.h> 41 #include <memory.h> 42 #include <arm/arm_sa1100.h> 43 44 /* 45 * Strong-ARM SA-1100 (e.g. HP-820 JORNADA) 46 */ 47 48 #define PAGE_SIZE 0x1000 49 #define DRAM_BANK_NUM 4 /* total 512MByte */ 50 #define DRAM_BANK_SIZE 0x08000000 /* 128Mbyte */ 51 52 #define DRAM_BANK0_START 0xc0000000 53 #define DRAM_BANK0_SIZE DRAM_BANK_SIZE 54 #define DRAM_BANK1_START 0xc8000000 55 #define DRAM_BANK1_SIZE DRAM_BANK_SIZE 56 #define DRAM_BANK2_START 0xd0000000 57 #define DRAM_BANK2_SIZE DRAM_BANK_SIZE 58 #define DRAM_BANK3_START 0xd8000000 59 #define DRAM_BANK3_SIZE DRAM_BANK_SIZE 60 #define ZERO_BANK_START 0xe0000000 61 #define ZERO_BANK_SIZE DRAM_BANK_SIZE 62 63 __BEGIN_DECLS 64 65 // 2nd bootloader 66 void boot_func(kaddr_t, kaddr_t, kaddr_t, kaddr_t); 67 extern char boot_func_end[]; 68 #define BOOT_FUNC_START reinterpret_cast <vaddr_t>(boot_func) 69 #define BOOT_FUNC_END reinterpret_cast <vaddr_t>(boot_func_end) 70 71 /* jump to 2nd loader */ 72 void FlatJump(kaddr_t, kaddr_t, kaddr_t, kaddr_t); 73 74 __END_DECLS 75 76 SA1100Architecture::SA1100Architecture(Console *&cons, MemoryManager *&mem) 77 : ARMArchitecture(cons, mem) 78 { 79 DPRINTF((TEXT("SA-11x0 CPU.\n"))); 80 } 81 82 SA1100Architecture::~SA1100Architecture(void) 83 { 84 } 85 86 BOOL 87 SA1100Architecture::init(void) 88 { 89 if (!_mem->init()) { 90 DPRINTF((TEXT("can't initialize memory manager.\n"))); 91 return FALSE; 92 } 93 // set D-RAM information 94 _mem->loadBank(DRAM_BANK0_START, DRAM_BANK_SIZE); 95 _mem->loadBank(DRAM_BANK1_START, DRAM_BANK_SIZE); 96 _mem->loadBank(DRAM_BANK2_START, DRAM_BANK_SIZE); 97 _mem->loadBank(DRAM_BANK3_START, DRAM_BANK_SIZE); 98 99 return TRUE; 100 } 101 102 void 103 SA1100Architecture::testFramebuffer(void) 104 { 105 // get frame buffer address from LCD controller register. 106 paddr_t fbaddr_p = _mem->readPhysical4(0xb0100010); // 0xc0002e00 107 // map frame buffer 108 vaddr_t fbaddr_v = _mem->mapPhysicalPage(fbaddr_p, 0x50000, 109 PAGE_READWRITE); 110 111 // test frame buffer 112 int j, k; 113 DI(); 114 for (j = 0; j < 480; j++) 115 for (k = 0; k < 640; k++) 116 VOLATILE_REF8(fbaddr_v + 0x200 + j * 640 + k) 117 = j * k & 0xff; 118 for (j = 120; j < 360; j++) 119 for (k = 120; k < 520; k++) 120 VOLATILE_REF8(fbaddr_v + 0x200 + j * 640 + k) = 0x3; 121 EI(); 122 _mem->unmapPhysicalPage(fbaddr_v); 123 } 124 125 void 126 SA1100Architecture::testUART(void) 127 { 128 #define TBY VOLATILE_REF(uart + 0x20) 129 #define UTDR VOLATILE_REF(uart + 0x14) 130 #define TBY_BUSY while (TBY & 0x1) 131 #define UTDR_PUTCHAR(c) (UTDR =(c)) 132 #define _(c) \ 133 __BEGIN_MACRO \ 134 TBY_BUSY; \ 135 UTDR_PUTCHAR(c); \ 136 __END_MACRO 137 vaddr_t uart = 138 _mem->mapPhysicalPage(0x80050000, 0x100, PAGE_READWRITE); 139 _('H');_('e');_('l');_('l');_('o');_(' '); 140 _('W');_('o');_('r');_('l');_('d');_('\r');_('\n'); 141 _mem->unmapPhysicalPage(uart); 142 } 143 144 BOOL 145 SA1100Architecture::setupLoader(void) 146 { 147 vaddr_t v; 148 vsize_t sz = BOOT_FUNC_END - BOOT_FUNC_START; 149 150 // check 2nd bootloader size. 151 if (sz > _mem->getPageSize()) { 152 DPRINTF((TEXT("2nd bootloader size(%dbyte) is larger than page size(%d).\n"), 153 sz, _mem->getPageSize())); 154 return FALSE; 155 } 156 157 // get physical mapped page and copy loader to there. 158 // don't writeback D-cache here. make sure to writeback before jump. 159 if (!_mem->getPage(v , _loader_addr)) { 160 DPRINTF((TEXT("can't get page for 2nd loader.\n"))); 161 return FALSE; 162 } 163 DPRINTF((TEXT("2nd bootloader vaddr=0x%08x paddr=0x%08x\n"), 164 (unsigned)v,(unsigned)_loader_addr)); 165 166 memcpy(reinterpret_cast <LPVOID>(v), 167 reinterpret_cast <LPVOID>(BOOT_FUNC_START), sz); 168 DPRINTF((TEXT("2nd bootloader copy done.\n"))); 169 170 return TRUE; 171 } 172 173 void 174 SA1100Architecture::jump(paddr_t info, paddr_t pvec) 175 { 176 kaddr_t sp; 177 vaddr_t v; 178 paddr_t p; 179 180 // stack for bootloader 181 _mem->getPage(v, p); 182 sp = ptokv(p) + _mem->getPageSize(); 183 DPRINTF((TEXT("sp for bootloader = %08x + %08x = %08x\n"), 184 ptokv(p), _mem->getPageSize(), sp)); 185 186 // writeback whole D-cache 187 WritebackDCache(); 188 189 SetKMode(1); 190 FlatJump(info, pvec, sp, _loader_addr); 191 // NOTREACHED 192 } 193
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