framebuffer.cpp revision 1.3
1 /* -*-C++-*- $NetBSD: framebuffer.cpp,v 1.3 2001/03/04 16:52:44 uch Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by UCHIYAMA Yasushi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <hpcmenu.h> 40 #include <machine/bootinfo.h> 41 #include <machine/platid.h> 42 #include <machine/platid_mask.h> 43 44 #include <framebuffer.h> 45 46 struct FrameBufferInfo::framebuffer_info 47 FrameBufferInfo::_table[] = 48 { 49 // CPU MACHINE BPP WIDTH HEIGHT LINEBYTES PHYSICAL ADDR 50 #ifdef MIPS 51 // VR41 (kseg1 address) 52 { PLATID_CPU_MIPS_VR_4102, PLATID_MACH_EVEREX_FREESTYLE_AXX , 2, 240, 320, 80, 0xaa000000 }, 53 { PLATID_CPU_MIPS_VR_4102, PLATID_MACH_NEC_MCCS_11 , 2, 480, 240, 256, 0xaa000000 }, 54 { PLATID_CPU_MIPS_VR_4102, PLATID_MACH_NEC_MCCS_12 , 2, 480, 240, 256, 0xaa000000 }, 55 { PLATID_CPU_MIPS_VR_4102, PLATID_MACH_NEC_MCCS_13 , 2, 480, 240, 256, 0xaa000000 }, 56 { PLATID_CPU_MIPS_VR_4102, PLATID_MACH_NEC_MCR_MPRO700 , 2, 640, 240, 256, 0xaa000000 }, 57 { PLATID_CPU_MIPS_VR_4111, PLATID_MACH_CASIO_CASSIOPEIAE_E55 , 2, 240, 320, 256, 0xaa000000 }, 58 { PLATID_CPU_MIPS_VR_4111, PLATID_MACH_COMPAQ_AERO_1530 , 2, 240, 320, 0, 0xa0000000 }, 59 { PLATID_CPU_MIPS_VR_4111, PLATID_MACH_COMPAQ_PRESARIO_213 , 8, 240, 320, 0, 0xa0000000 }, 60 { PLATID_CPU_MIPS_VR_4111, PLATID_MACH_NEC_MCR_300 , 2, 640, 240, 256, 0xaa000000 }, 61 { PLATID_CPU_MIPS_VR_4111, PLATID_MACH_NEC_MCR_500 , 8, 640, 240, 1024, 0xb3000000 }, 62 { PLATID_CPU_MIPS_VR_4111, PLATID_MACH_NEC_MCR_500A , 8, 640, 240, 1024, 0xb3000000 }, 63 { PLATID_CPU_MIPS_VR_4111, PLATID_MACH_NEC_MCR_FORDOCOMO , 2, 640, 240, 256, 0xaa000000 }, 64 { PLATID_CPU_MIPS_VR_4111, PLATID_MACH_SHARP_TRIPAD_PV6000 , 8, 640, 480, 640, 0xaa000000 }, 65 { PLATID_CPU_MIPS_VR_4121, PLATID_MACH_CASIO_CASSIOPEIAE_E100 , 16, 240, 320, 512, 0xaa200000 }, 66 { PLATID_CPU_MIPS_VR_4121, PLATID_MACH_CASIO_CASSIOPEIAE_E500 , 16, 240, 320, 512, 0xaa200000 }, 67 { PLATID_CPU_MIPS_VR_4121, PLATID_MACH_CASIO_POCKETPOSTPET_POCKETPOSTPET, 16, 320, 240, 1024, 0xaa200000 }, 68 { PLATID_CPU_MIPS_VR_4121, PLATID_MACH_FUJITSU_INTERTOP_IT300 , 8, 640, 480, 640, 0xaa000000 }, 69 { PLATID_CPU_MIPS_VR_4121, PLATID_MACH_FUJITSU_INTERTOP_IT300 , 16, 640, 480, 1280, 0xaa000000 }, 70 { PLATID_CPU_MIPS_VR_4121, PLATID_MACH_FUJITSU_INTERTOP_IT310 , 8, 640, 480, 640, 0xaa000000 }, 71 { PLATID_CPU_MIPS_VR_4121, PLATID_MACH_IBM_WORKPAD_26011AU , 16, 640, 480, 1280, 0xaa000000 }, 72 { PLATID_CPU_MIPS_VR_4121, PLATID_MACH_NEC_MCR_320 , 2, 640, 240, 160, 0xaa000000 }, 73 { PLATID_CPU_MIPS_VR_4121, PLATID_MACH_NEC_MCR_330 , 2, 640, 240, 160, 0xaa000000 }, 74 { PLATID_CPU_MIPS_VR_4121, PLATID_MACH_NEC_MCR_430 , 16, 640, 240, 1280, 0xaa180100 }, 75 { PLATID_CPU_MIPS_VR_4121, PLATID_MACH_NEC_MCR_510 , 8, 640, 240, 1024, 0xaa000000 }, 76 { PLATID_CPU_MIPS_VR_4121, PLATID_MACH_NEC_MCR_510 , 16, 640, 240, 1600, 0xaa000000 }, 77 { PLATID_CPU_MIPS_VR_4121, PLATID_MACH_NEC_MCR_520 , 16, 640, 240, 1600, 0xaa000000 }, 78 { PLATID_CPU_MIPS_VR_4121, PLATID_MACH_NEC_MCR_520A , 16, 640, 240, 1600, 0xaa000000 }, 79 { PLATID_CPU_MIPS_VR_4121, PLATID_MACH_NEC_MCR_530 , 8, 640, 240, 640, 0xaa1d4c00 }, 80 { PLATID_CPU_MIPS_VR_4121, PLATID_MACH_NEC_MCR_530 , 16, 640, 240, 1280, 0xaa180100 }, 81 { PLATID_CPU_MIPS_VR_4121, PLATID_MACH_NEC_MCR_530A , 16, 640, 240, 1280, 0xaa180100 }, 82 { PLATID_CPU_MIPS_VR_4121, PLATID_MACH_NEC_MCR_700 , 16, 800, 600, 1600, 0xaa000000 }, 83 { PLATID_CPU_MIPS_VR_4121, PLATID_MACH_NEC_MCR_700A , 16, 800, 600, 1600, 0xaa000000 }, 84 { PLATID_CPU_MIPS_VR_4121, PLATID_MACH_NEC_MCR_730 , 16, 800, 600, 1600, 0xaa0ea600 }, 85 { PLATID_CPU_MIPS_VR_4121, PLATID_MACH_NEC_MCR_730A , 16, 800, 600, 1600, 0xaa0ea600 }, 86 { PLATID_CPU_MIPS_VR_4121, PLATID_MACH_NEC_MCR_SIGMARION , 16, 640, 240, 1280, 0xaa000000 }, 87 { PLATID_CPU_MIPS_VR_4121, PLATID_MACH_SHARP_TRIPAD_PV6000 , 16, 640, 480, 1280, 0xaa200000 }, 88 // TX39 (can't determine frame buffer address) 89 { PLATID_CPU_MIPS_TX_3912, PLATID_MACH_COMPAQ_C_2010 , 8, 640, 240, 0, 0x00000000 }, 90 { PLATID_CPU_MIPS_TX_3912, PLATID_MACH_COMPAQ_C_2015 , 8, 640, 240, 0, 0x00000000 }, 91 { PLATID_CPU_MIPS_TX_3912, PLATID_MACH_COMPAQ_C_810 , 2, 640, 240, 0, 0x00000000 }, 92 { PLATID_CPU_MIPS_TX_3912, PLATID_MACH_PHILIPS_NINO_312 , 2, 240, 320, 0, 0x00000000 }, 93 { PLATID_CPU_MIPS_TX_3912, PLATID_MACH_SHARP_MOBILON_HC1200 , 4, 640, 240, 0, 0x00000000 }, 94 { PLATID_CPU_MIPS_TX_3912, PLATID_MACH_SHARP_MOBILON_HC4100 , 4, 640, 240, 0, 0x00000000 }, 95 { PLATID_CPU_MIPS_TX_3922, PLATID_MACH_SHARP_TELIOS_HCAJ1 , 16, 800, 600, 0, 0x00000000 }, 96 { PLATID_CPU_MIPS_TX_3922, PLATID_MACH_SHARP_TELIOS_HCVJ1C_JP , 16, 800, 480, 0, 0x00000000 }, 97 { PLATID_CPU_MIPS_TX_3922, PLATID_MACH_VICTOR_INTERLINK_MPC101 , 16, 640, 480, 0, 0x00000000 }, 98 #endif // MIPS 99 #ifdef SHx 100 // SH7709 (P2 address) 101 { PLATID_CPU_SH_3_7709 , PLATID_MACH_HP_LX_620 , 8, 640, 240, 640, 0xb2000000 }, 102 { PLATID_CPU_SH_3_7709 , PLATID_MACH_HP_LX_620JP , 8, 640, 240, 640, 0xb2000000 }, 103 { PLATID_CPU_SH_3_7709 , PLATID_MACH_HITACHI_PERSONA_HPW230JC , 8, 640, 240, 640, 0xb2000000 }, 104 // SH7709A (P2 address) 105 { PLATID_CPU_SH_3_7709A , PLATID_MACH_HP_JORNADA_680 , 16, 640, 240, 1280, 0xb2000000 }, 106 { PLATID_CPU_SH_3_7709A , PLATID_MACH_HP_JORNADA_680JP , 16, 640, 240, 1280, 0xb2000000 }, 107 { PLATID_CPU_SH_3_7709A , PLATID_MACH_HP_JORNADA_690 , 16, 640, 240, 1280, 0xb2000000 }, 108 { PLATID_CPU_SH_3_7709A , PLATID_MACH_HP_JORNADA_690JP , 16, 640, 240, 1280, 0xb2000000 }, 109 #endif // SHx 110 #ifdef ARM 111 // SA-1100 (can't determine frame buffer address) 112 { PLATID_CPU_ARM_STRONGARM_SA1100 , PLATID_MACH_HP_JORNADA_820 , 8, 640, 480, 0, 0x00000000 }, 113 { PLATID_CPU_ARM_STRONGARM_SA1100 , PLATID_MACH_HP_JORNADA_820JP , 8, 640, 480, 0, 0x00000000 }, 114 // SA-1110 115 { PLATID_CPU_ARM_STRONGARM_SA1110 , PLATID_MACH_HP_JORNADA_720 , 16, 640, 240, 0, 0x00000000 }, 116 { PLATID_CPU_ARM_STRONGARM_SA1110 , PLATID_MACH_HP_JORNADA_720JP , 16, 640, 240, 0, 0x00000000 }, 117 { PLATID_CPU_ARM_STRONGARM_SA1110 , PLATID_MACH_COMPAQ_IPAQ_H3600 , 16, 240, 320, 0, 0x00000000 }, 118 #endif // ARM 119 { 0, 0, 0, 0, 0, 0, 0 } // TERMINATOR 120 }; 121 122 FrameBufferInfo::FrameBufferInfo(u_int32_t cpu, u_int32_t machine) 123 { 124 struct framebuffer_info *tab = _table; 125 126 // search apriori setting if any. 127 for (; tab->cpu; tab++) 128 if (tab->cpu == cpu && tab->machine == machine) { 129 _fb = tab; 130 return; 131 } 132 133 // fill default setting. 134 memset(&_default, 0, sizeof(struct framebuffer_info)); 135 136 _default.cpu = cpu; 137 _default.machine = machine; 138 HDC hdc = GetDC(0); 139 _default.bpp = GetDeviceCaps(hdc, BITSPIXEL); 140 _default.width = GetDeviceCaps(hdc, HORZRES); 141 _default.height = GetDeviceCaps(hdc, VERTRES); 142 ReleaseDC(0, hdc); 143 _fb = &_default; 144 } 145 146 FrameBufferInfo::~FrameBufferInfo() 147 { 148 /* NO-OP */ 149 } 150 151 int 152 FrameBufferInfo::type() 153 { 154 int type; 155 156 switch(_fb->bpp) { 157 default: 158 // FALLTHROUGH 159 case 2: 160 type = BIFB_D2_M2L_0; 161 break; 162 case 8: 163 type = BIFB_D8_00; 164 break; 165 case 16: 166 type = BIFB_D16_0000; 167 break; 168 } 169 170 return type; 171 } 172
Indexes created Sun Sep 21 15:09:59 GMT 2025