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mips_boot.cpp revision 1.3 
      1 /* -*-C++-*-	$NetBSD: mips_boot.cpp,v 1.3 2001/05/08 18:51:25 uch Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 2001 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by UCHIYAMA Yasushi.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  * 3. All advertising materials mentioning features or use of this software
     19  *    must display the following acknowledgement:
     20  *        This product includes software developed by the NetBSD
     21  *        Foundation, Inc. and its contributors.
     22  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  *    contributors may be used to endorse or promote products derived
     24  *    from this software without specific prior written permission.
     25  *
     26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  * POSSIBILITY OF SUCH DAMAGE.
     37  */
     38 
     39 #include <hpcboot.h>
     40 #include <console.h>
     41 
     42 #include <arch.h>
     43 #include <memory.h>
     44 
     45 #include <mips/mips_arch.h>
     46 #include <mips/mips_boot.h>
     47 #include <mips/mips_vr41.h>
     48 #include <mips/mips_tx39.h>
     49 #include <mips/mips_console.h>
     50 
     51 MIPSBoot::MIPSBoot()
     52 {
     53 }
     54 
     55 MIPSBoot::~MIPSBoot()
     56 {
     57 	if (_mem)
     58 		delete _mem;
     59 	if (_arch)
     60 		delete _arch;
     61 
     62 	MIPSConsole::Destroy();
     63 }
     64 
     65 BOOL
     66 MIPSBoot::setup()
     67 {
     68 	struct HpcMenuInterface::HpcMenuPreferences &pref = HPC_PREFERENCE;
     69 
     70 	platid_t platid;
     71 	platid.dw.dw0 = pref.platid_hi;
     72 	platid.dw.dw1 = pref.platid_lo;
     73 
     74 	if (platid_match(&platid, &platid_mask_CPU_MIPS_VR)) {
     75 		args.architecture = ARCHITECTURE_MIPS_VR41;
     76 	} else if (platid_match(&platid, &platid_mask_CPU_MIPS_TX_3900)) {
     77 		args.architecture = ARCHITECTURE_MIPS_TX3900;
     78 	} else if (platid_match(&platid, &platid_mask_CPU_MIPS_TX_3920)) {
     79 		args.architecture = ARCHITECTURE_MIPS_TX3920;
     80 	} else {
     81 		DPRINTF((TEXT("unknown MIPS variants.\n")));
     82 		return FALSE;
     83 	}
     84 
     85 	return super::setup();
     86 }
     87 
     88 BOOL
     89 MIPSBoot::create()
     90 {
     91 	size_t pagesz;
     92 	int shift;
     93 	BOOL(*lock_pages)(LPVOID, DWORD, PDWORD, int);
     94 	BOOL(*unlock_pages)(LPVOID, DWORD);
     95 
     96 	// Console
     97 	if (args.console == CONSOLE_SERIAL) {
     98 		_cons = MIPSConsole::Instance();
     99 		if (!_cons->init()) {
    100 			_cons = Console::Instance();
    101 			DPRINTF((TEXT("use LCD console instead.\n")));
    102 		}
    103 	}
    104 
    105 	// Architercure dependent ops.
    106 	switch(args.architecture) {
    107 	default:
    108 		DPRINTF((TEXT("unsupported architecture.\n")));
    109 		return FALSE;
    110 	case ARCHITECTURE_MIPS_TX3900:
    111 		// FALLTHROUGH
    112 	case ARCHITECTURE_MIPS_TX3920:
    113 		_arch = new TX39XX(_cons, _mem, args.architecture);
    114 		pagesz = 4096;
    115 		shift = 0;
    116 		break;
    117 	case ARCHITECTURE_MIPS_VR41:
    118 		_arch = new VR41XX(_cons, _mem);
    119 		pagesz = 1024;
    120 		shift = 4; // VR41 specific shift. for LockPages()
    121 		break;
    122 	}
    123 	_arch->setDebug() = args.architectureDebug;
    124 
    125 	// Memory manager.
    126 	// LockPages API exists in Windows CE 2.11 or later. check it.
    127 	lock_pages = _arch->_load_LockPages();
    128 	unlock_pages = _arch->_load_UnlockPages();
    129 	if (lock_pages == 0 || unlock_pages == 0)
    130 		args.memory = MEMORY_MANAGER_VIRTUALCOPY;
    131 	else
    132 		args.memory = MEMORY_MANAGER_LOCKPAGES;
    133 
    134 	switch(args.memory) {
    135 	default:
    136 		break;
    137 	case MEMORY_MANAGER_SOFTMMU:
    138 		// FALLTHROUGH
    139 	case MEMORY_MANAGER_HARDMMU:
    140 		DPRINTF((TEXT("unsupported memory address detection method.\n")));
    141 		return FALSE;
    142 	case MEMORY_MANAGER_LOCKPAGES:
    143 		_mem = new MemoryManager_LockPages(lock_pages, unlock_pages,
    144 		    _cons, pagesz, shift);
    145 		break;
    146 	case MEMORY_MANAGER_VIRTUALCOPY:
    147 		_mem = new MemoryManager_VirtualCopy(_cons, pagesz);
    148 		break;
    149 	}
    150 	_mem->setDebug() = args.memorymanagerDebug;
    151 
    152 
    153 	// File Manager, Loader
    154 	return super::create();
    155 }
    156