mips_tx39.cpp revision 1.5 1 1.5 martin /* -*-C++-*- $NetBSD: mips_tx39.cpp,v 1.5 2008/04/28 20:23:20 martin Exp $ */
2 1.1 uch
3 1.1 uch /*-
4 1.1 uch * Copyright (c) 2001 The NetBSD Foundation, Inc.
5 1.1 uch * All rights reserved.
6 1.1 uch *
7 1.1 uch * This code is derived from software contributed to The NetBSD Foundation
8 1.1 uch * by UCHIYAMA Yasushi.
9 1.1 uch *
10 1.1 uch * Redistribution and use in source and binary forms, with or without
11 1.1 uch * modification, are permitted provided that the following conditions
12 1.1 uch * are met:
13 1.1 uch * 1. Redistributions of source code must retain the above copyright
14 1.1 uch * notice, this list of conditions and the following disclaimer.
15 1.1 uch * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 uch * notice, this list of conditions and the following disclaimer in the
17 1.1 uch * documentation and/or other materials provided with the distribution.
18 1.1 uch *
19 1.1 uch * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 uch * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 uch * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 uch * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 uch * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 uch * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 uch * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 uch * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 uch * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 uch * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 uch * POSSIBILITY OF SUCH DAMAGE.
30 1.1 uch */
31 1.1 uch
32 1.1 uch #include <console.h>
33 1.1 uch #include <memory.h>
34 1.1 uch #include <mips/mips_tx39.h>
35 1.1 uch
36 1.1 uch TX39XX::TX39XX(Console *&cons, MemoryManager *&mem, enum ArchitectureOps arch)
37 1.1 uch : MIPSArchitecture(cons, mem)
38 1.1 uch {
39 1.1 uch _boot_func = TX39XX::boot_func;
40 1.1 uch }
41 1.1 uch
42 1.1 uch TX39XX::~TX39XX()
43 1.1 uch {
44 1.1 uch /* NO-OP */
45 1.1 uch }
46 1.1 uch
47 1.1 uch BOOT_FUNC_(TX39XX)
48 1.1 uch
49 1.1 uch BOOL
50 1.1 uch TX39XX::init()
51 1.1 uch {
52 1.1 uch MIPSArchitecture::init();
53 1.1 uch
54 1.3 uch // set D-RAM information
55 1.1 uch _mem->loadBank(0x04000000, // D-RAM bank 0/1
56 1.2 uch 0x04000000);
57 1.1 uch
58 1.1 uch return TRUE;
59 1.1 uch }
60 1.1 uch
61 1.1 uch void
62 1.1 uch TX39XX::systemInfo()
63 1.1 uch {
64 1.1 uch MIPSArchitecture::systemInfo();
65 1.1 uch DPRINTF((TEXT("TX39\n")));
66 1.1 uch }
67 1.1 uch
68 1.1 uch void
69 1.1 uch TX39XX::cacheFlush()
70 1.1 uch {
71 1.1 uch MIPS_TX39XX_CACHE_FLUSH();
72 1.1 uch }
73