7707.h revision 1.5 1 /* $NetBSD: 7707.h,v 1.5 2006/03/05 04:05:39 uwe Exp $ */
2
3 /*-
4 * Copyright (c) 2001, 2002, 2004 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by UCHIYAMA Yasushi.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 #ifndef _HPCBOOT_SH_CPU_7707_H_
40 #define _HPCBOOT_SH_CPU_7707_H_
41
42 #define SH7707_LCDAR 0xa40000c0 /* address register */
43 #define SH7707_LCDDR 0xa40000c2 /* display control register */
44 #define SH7707_LCDPR 0xa40000c6 /* palette register */
45 #define SH7707_LCDDMR 0xa40000ce /* DMA control register */
46
47 #define SH7707_LCDAR_LCDDMR0 0x0
48 #define SH7707_LCDAR_LCDDMR1 0x1
49 #define SH7707_LCDAR_LCDDMR2 0x2
50 #define SH7707_LCDAR_LCDDMR3 0x3
51 #define SH7707_LCDAR_LCDDMR4 0x4
52
53 #define SH7707_CACHE_LINESZ 16
54 #define SH7707_CACHE_ENTRY 128
55 #define SH7707_CACHE_WAY 4 /* 2-way in RAM mode */
56 #define SH7707_CACHE_SIZE \
57 (SH7707_CACHE_LINESZ * SH7707_CACHE_ENTRY * SH7707_CACHE_WAY)
58
59 #define SH7707_CACHE_ENTRY_SHIFT 4
60 #define SH7707_CACHE_ENTRY_MASK 0x000007f0
61 #define SH7707_CACHE_WAY_SHIFT 11
62 #define SH7707_CACHE_WAY_MASK 0x00001800
63
64 #define SH7707_CACHE_FLUSH() \
65 __BEGIN_MACRO \
66 uint32_t __e, __w, __wa, __a; \
67 \
68 for (__w = 0; __w < SH7707_CACHE_WAY; __w++) { \
69 __wa = SH3_CCA | __w << SH7707_CACHE_WAY_SHIFT; \
70 for (__e = 0; __e < SH7707_CACHE_ENTRY; __e++) { \
71 __a = __wa |(__e << SH7707_CACHE_ENTRY_SHIFT); \
72 _reg_read_4(__a) &= ~0x3; /* Clear U,V bit */ \
73 } \
74 } \
75 __END_MACRO
76
77 #define SH7707_MMU_DISABLE SH3_MMU_DISABLE
78
79 #endif // _HPCBOOT_SH_CPU_7707_H_
80
81