11.5Smartin/* $NetBSD: 7709a.h,v 1.5 2008/04/28 20:23:20 martin Exp $ */ 21.1Such 31.1Such/*- 41.1Such * Copyright (c) 2001, 2002 The NetBSD Foundation, Inc. 51.1Such * All rights reserved. 61.1Such * 71.1Such * This code is derived from software contributed to The NetBSD Foundation 81.1Such * by UCHIYAMA Yasushi. 91.1Such * 101.1Such * Redistribution and use in source and binary forms, with or without 111.1Such * modification, are permitted provided that the following conditions 121.1Such * are met: 131.1Such * 1. Redistributions of source code must retain the above copyright 141.1Such * notice, this list of conditions and the following disclaimer. 151.1Such * 2. Redistributions in binary form must reproduce the above copyright 161.1Such * notice, this list of conditions and the following disclaimer in the 171.1Such * documentation and/or other materials provided with the distribution. 181.1Such * 191.1Such * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 201.1Such * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 211.1Such * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 221.1Such * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 231.1Such * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 241.1Such * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 251.1Such * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 261.1Such * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 271.1Such * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 281.1Such * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 291.1Such * POSSIBILITY OF SUCH DAMAGE. 301.1Such */ 311.1Such 321.1Such#ifndef _HPCBOOT_SH_CPU_7709A_H_ 331.2Such#define _HPCBOOT_SH_CPU_7709A_H_ 341.1Such 351.2Such#define SH7709A_CACHE_LINESZ 16 361.2Such#define SH7709A_CACHE_ENTRY 256 371.2Such#define SH7709A_CACHE_WAY 4 381.2Such#define SH7709A_CACHE_SIZE \ 391.1Such (SH7709A_CACHE_LINESZ * SH7709A_CACHE_ENTRY * SH7709A_CACHE_WAY) 401.1Such 411.2Such#define SH7709A_CACHE_ENTRY_SHIFT 4 421.2Such#define SH7709A_CACHE_ENTRY_MASK 0x00000ff0 431.2Such#define SH7709A_CACHE_WAY_SHIFT 12 441.2Such#define SH7709A_CACHE_WAY_MASK 0x00003000 451.1Such 461.2Such#define SH7709A_CACHE_FLUSH() \ 471.1Such__BEGIN_MACRO \ 481.4Suwe uint32_t __e, __w, __wa, __a; \ 491.1Such \ 501.1Such for (__w = 0; __w < SH7709A_CACHE_WAY; __w++) { \ 511.1Such __wa = SH3_CCA | __w << SH7709A_CACHE_WAY_SHIFT; \ 521.1Such for (__e = 0; __e < SH7709A_CACHE_ENTRY; __e++) { \ 531.1Such __a = __wa |(__e << SH7709A_CACHE_ENTRY_SHIFT); \ 541.1Such _reg_read_4(__a) &= ~0x3; /* Clear U,V bit */ \ 551.1Such } \ 561.1Such } \ 571.1Such__END_MACRO 581.1Such 591.2Such#define SH7709A_MMU_DISABLE SH3_MMU_DISABLE 601.1Such 611.1Such#endif // _HPCBOOT_SH_CPU_7709A_H_ 62