sh_arch.h revision 1.1 1 /* -*-C++-*- $NetBSD: sh_arch.h,v 1.1 2001/02/09 18:35:17 uch Exp $ */
2
3 /*-
4 * Copyright (c) 2001 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by UCHIYAMA Yasushi.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 #ifndef _HPCBOOT_SH_ARCH_H_
40 #define _HPCBOOT_SH_ARCH_H_
41
42 #include <hpcboot.h>
43 #include <console.h>
44 #include <memory.h>
45 #include <arch.h>
46 #include <sh3/sh3.h>
47
48 template <class T>
49 inline T
50 REG_READ(paddr_t r)
51 {
52 return r & SH_P1_START ? *(T *)r : *(T *)(r | SH_P2_START);
53 }
54
55 class SHArchitecture : public Architecture {
56 protected:
57 typedef void(*boot_func_t)(struct BootArgs *, struct PageTag *);
58
59 u_int8_t reg_read8(paddr_t reg) {
60 return REG_READ <u_int8_t>(reg);
61 }
62 u_int16_t reg_read16(paddr_t reg) {
63 return REG_READ <u_int16_t>(reg);
64 }
65 u_int32_t reg_read(paddr_t reg) {
66 return REG_READ <u_int32_t>(reg);
67 }
68 void hd64461_framebuffer_test(void);
69 void icu_dump(void);
70 void icu_priority(void);
71 void icu_control(void);
72 void scif_dump(int);
73
74 public:
75 struct intr_priority {
76 const char *name;
77 paddr_t reg;
78 int shift;
79 };
80 static struct intr_priority ipr_table[];
81
82 private:
83 int _kmode;
84 boot_func_t _boot_func;
85 void print_stack_pointer(void);
86
87 protected:
88
89 // should be created as actual product insntnce.
90 SHArchitecture(Console *&cons, MemoryManager *&mem, boot_func_t bootfunc)
91 : _boot_func(bootfunc), Architecture(cons, mem) {
92 DPRINTF((TEXT("SH architecture.\n")));
93 }
94 virtual ~SHArchitecture(void) { /* NO-OP */ }
95
96 public:
97 BOOL init(void);
98 BOOL setupLoader(void);
99 void systemInfo(void);
100 void jump(kaddr_t info, kaddr_t pvce);
101
102 virtual void cache_flush(void) { /* NO-OP */ }
103 };
104
105 /*
106 * SH product. setup cache flush routine and 2nd-bootloader.
107 */
108 #define SH_(x) \
109 class SH##x : public SHArchitecture { \
110 public: \
111 SH##x(Console *&cons, MemoryManager *&mem, boot_func_t bootfunc)\
112 : SHArchitecture(cons, mem, bootfunc) { \
113 DPRINTF((TEXT("SH") TEXT(#x) TEXT("\n"))); \
114 } \
115 ~SH##x(void) { /* NO-OP */ } \
116 \
117 void cache_flush(void) { \
118 SH##x##_CACHE_FLUSH(); \
119 } \
120 \
121 static void boot_func(struct BootArgs *, struct PageTag *); \
122 }
123
124 /*
125 * 2nd-bootloader. make sure that PIC and its size is lower than page size.
126 * and can't call subroutine.
127 */
128 #define SH_BOOT_FUNC_(x) \
129 void \
130 SH##x##::boot_func(struct BootArgs *bi, struct PageTag *p) \
131 { \
132 /* Disable interrupt. block exception.(TLB exception don't occur) */ \
133 int tmp; \
134 __asm("stc sr, r5\n" \
135 "or r4, r5\n" \
136 "ldc r5, sr\n", 0x500000f0, tmp); \
137 \
138 /* Now I run on P1, TLB flush. and disable. */ \
139 VOLATILE_REF(MMUCR) = MMUCR_TF; \
140 \
141 do { \
142 u_int32_t *dst =(u_int32_t *)p->dst; \
143 u_int32_t *src =(u_int32_t *)p->src; \
144 u_int32_t sz = p->sz / sizeof (int); \
145 if (p->src == ~0) \
146 while (sz--) \
147 *dst++ = 0; \
148 else \
149 while (sz--) \
150 *dst++ = *src++; \
151 } while ((p =(struct PageTag *)p->next) != ~0); \
152 \
153 SH##x##_CACHE_FLUSH(); \
154 \
155 /* jump to kernel entry. */ \
156 __asm("jmp @r7\n" \
157 "nop\n", bi->argc, bi->argv, \
158 bi->bootinfo, bi->kernel_entry); \
159 }
160
161 SH_(7709);
162 SH_(7709A);
163
164 #endif // _HPCBOOT_SH_ARCH_H_
165