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sh_arch.h revision 1.1.2.3 
      1 /* -*-C++-*-	$NetBSD: sh_arch.h,v 1.1.2.3 2001/03/12 13:28:17 bouyer Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 2001 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by UCHIYAMA Yasushi.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  * 3. All advertising materials mentioning features or use of this software
     19  *    must display the following acknowledgement:
     20  *        This product includes software developed by the NetBSD
     21  *        Foundation, Inc. and its contributors.
     22  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  *    contributors may be used to endorse or promote products derived
     24  *    from this software without specific prior written permission.
     25  *
     26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  * POSSIBILITY OF SUCH DAMAGE.
     37  */
     38 
     39 #ifndef _HPCBOOT_SH_ARCH_H_
     40 #define _HPCBOOT_SH_ARCH_H_
     41 
     42 #include <hpcboot.h>
     43 #include <console.h>
     44 #include <memory.h>
     45 #include <arch.h>
     46 #include <sh3/sh3.h>
     47 
     48 template <class T>
     49 inline T
     50 REG_READ(paddr_t r)
     51 {
     52 	return r & SH_P1_START ? *(T *)r :  *(T *)(r | SH_P2_START);
     53 }
     54 
     55 class SHArchitecture : public Architecture {
     56 protected:
     57 	typedef void(*boot_func_t)(struct BootArgs *, struct PageTag *);
     58 
     59 	u_int8_t reg_read_1(paddr_t reg) {
     60 		return REG_READ <u_int8_t>(reg);
     61 	}
     62 	u_int16_t reg_read_2(paddr_t reg) {
     63 		return REG_READ <u_int16_t>(reg);
     64 	}
     65 	u_int32_t reg_read_4(paddr_t reg) {
     66 		return REG_READ <u_int32_t>(reg);
     67 	}
     68 	void hd64461_dump(platid_t &);
     69 	void bsc_dump(void);
     70 	void pfc_dump(void);
     71 	void icu_dump(void);
     72 	void icu_priority(void);
     73 	void icu_control(void);
     74 	void scif_dump(int);
     75 
     76 public:
     77 	struct intr_priority {
     78 		const char *name;
     79 		paddr_t reg;
     80 		int shift;
     81 	};
     82 	static struct intr_priority ipr_table[];
     83 
     84 private:
     85 	int _kmode;
     86 	boot_func_t _boot_func;
     87 	void print_stack_pointer(void);
     88 
     89 protected:
     90 
     91 	// should be created as actual product insntnce.
     92 	SHArchitecture(Console *&cons, MemoryManager *&mem, boot_func_t bootfunc)
     93 		: _boot_func(bootfunc), Architecture(cons, mem) {
     94 		DPRINTF((TEXT("SH architecture.\n")));
     95 	}
     96 	virtual ~SHArchitecture(void) { /* NO-OP */ }
     97 
     98 public:
     99 	BOOL init(void);
    100 	BOOL setupLoader(void);
    101 	void systemInfo(void);
    102 	void jump(kaddr_t info, kaddr_t pvce);
    103 
    104 	virtual void cache_flush(void) { /* NO-OP */ }
    105 };
    106 
    107 /*
    108  * SH product. setup cache flush routine and 2nd-bootloader.
    109  */
    110 #define SH_(x)								\
    111 class SH##x : public SHArchitecture {					\
    112 public:									\
    113 	SH##x(Console *&cons, MemoryManager *&mem, boot_func_t bootfunc)\
    114 		: SHArchitecture(cons, mem, bootfunc) {			\
    115 		DPRINTF((TEXT("SH") TEXT(#x) TEXT("\n")));		\
    116 	}								\
    117 	~SH##x(void) { /* NO-OP */ }					\
    118 									\
    119 	void cache_flush(void) {					\
    120 		SH##x##_CACHE_FLUSH();					\
    121 	}								\
    122 									\
    123 	static void boot_func(struct BootArgs *, struct PageTag *);	\
    124 }
    125 
    126 /*
    127  * 2nd-bootloader.  make sure that PIC and its size is lower than page size.
    128  * and can't call subroutine.
    129  */
    130 #define SH_BOOT_FUNC_(x)						\
    131 void									\
    132 SH##x##::boot_func(struct BootArgs *bi, struct PageTag *p)		\
    133 {									\
    134 /* Disable interrupt. block exception.(TLB exception don't occur) */	\
    135 	int tmp;							\
    136 	__asm("stc	sr, r5\n"					\
    137 	      "or	r4, r5\n"					\
    138 	      "ldc	r5, sr\n", 0x500000f0, tmp);			\
    139 									\
    140 	/* Now I run on P1, TLB flush. and disable. */			\
    141 	VOLATILE_REF(MMUCR) = MMUCR_TF;					\
    142   									\
    143 	do {								\
    144 		u_int32_t *dst =(u_int32_t *)p->dst;			\
    145 		u_int32_t *src =(u_int32_t *)p->src;			\
    146 		u_int32_t sz = p->sz / sizeof (int);			\
    147 		if (p->src == ~0)					\
    148 			while (sz--)					\
    149 				*dst++ = 0;				\
    150 		else	    						\
    151 			while (sz--)					\
    152 				*dst++ = *src++;			\
    153 	} while ((p =(struct PageTag *)p->next) != ~0);			\
    154 									\
    155 	SH##x##_CACHE_FLUSH();						\
    156 									\
    157 	/* jump to kernel entry. */					\
    158 	__asm("jmp	@r7\n"						\
    159 	      "nop\n", bi->argc, bi->argv,				\
    160 		 bi->bootinfo, bi->kernel_entry);			\
    161 }
    162 
    163 SH_(7709);
    164 SH_(7709A);
    165 
    166 #endif // _HPCBOOT_SH_ARCH_H_
    167