sh_arch.h revision 1.4.2.1
1 /* -*-C++-*- $NetBSD: sh_arch.h,v 1.4.2.1 2002/02/11 20:08:00 jdolecek Exp $ */ 2 3 /*- 4 * Copyright (c) 2001, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by UCHIYAMA Yasushi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #ifndef _HPCBOOT_SH_ARCH_H_ 40 #define _HPCBOOT_SH_ARCH_H_ 41 42 #include <hpcboot.h> 43 #include <console.h> 44 #include <memory.h> 45 #include <arch.h> 46 #include <sh3/sh3.h> 47 #include <sh3/hd64461.h> 48 #include <sh3/hd64465.h> 49 50 template <class T> 51 inline T 52 REG_READ(paddr_t r) 53 { 54 return r & SH_P1_START ? *(T *)r : *(T *)(r | SH_P2_START); 55 } 56 57 class SHArchitecture : public Architecture { 58 protected: 59 typedef void(*boot_func_t)(struct BootArgs *, struct PageTag *); 60 61 u_int8_t reg_read_1(paddr_t reg) { 62 return REG_READ <u_int8_t>(reg); 63 } 64 u_int16_t reg_read_2(paddr_t reg) { 65 return REG_READ <u_int16_t>(reg); 66 } 67 u_int32_t reg_read_4(paddr_t reg) { 68 return REG_READ <u_int32_t>(reg); 69 } 70 void hd64461_dump(platid_t &); 71 void bsc_dump(void); 72 void pfc_dump(void); 73 void tmu_dump(void); 74 void tmu_channel_dump(int, paddr_t, paddr_t, paddr_t); 75 void icu_dump(void); 76 void icu_priority(void); 77 void icu_control(void); 78 void scif_dump(int); 79 80 public: 81 struct intr_priority { 82 const char *name; 83 paddr_t reg; 84 int shift; 85 }; 86 static struct intr_priority ipr_table[]; 87 88 private: 89 int _kmode; 90 boot_func_t _boot_func; 91 void print_stack_pointer(void); 92 93 protected: 94 95 // should be created as actual product insntnce. 96 SHArchitecture(Console *&cons, MemoryManager *&mem, boot_func_t bootfunc) 97 : _boot_func(bootfunc), Architecture(cons, mem) { 98 // NO-OP 99 } 100 virtual ~SHArchitecture(void) { /* NO-OP */ } 101 102 public: 103 BOOL init(void); 104 BOOL setupLoader(void); 105 paddr_t setupBootInfo(Loader &); 106 107 void systemInfo(void); 108 void jump(kaddr_t info, kaddr_t pvce); 109 110 virtual void cache_flush(void) { /* NO-OP */ } 111 }; 112 113 // 114 // SH product. setup cache flush routine and 2nd-bootloader. 115 // 116 117 // 118 // SH3 series. 119 /// 120 #define SH_(x) \ 121 class SH##x : public SHArchitecture { \ 122 public: \ 123 SH##x(Console *&cons, MemoryManager *&mem, boot_func_t bootfunc)\ 124 : SHArchitecture(cons, mem, bootfunc) { \ 125 DPRINTF((TEXT("CPU: SH") TEXT(#x) TEXT("\n"))); \ 126 } \ 127 ~SH##x(void) { /* NO-OP */ } \ 128 \ 129 void cache_flush(void) { \ 130 SH##x##_CACHE_FLUSH(); \ 131 } \ 132 \ 133 static void boot_func(struct BootArgs *, struct PageTag *); \ 134 } 135 136 // 137 // 2nd-bootloader. make sure that PIC and its size is lower than page size. 138 // and can't call subroutine. 139 // 140 #define SH_BOOT_FUNC_(x) \ 141 void \ 142 SH##x##::boot_func(struct BootArgs *bi, struct PageTag *p) \ 143 { \ 144 /* Disable interrupt. block exception.(TLB exception don't occur) */ \ 145 int tmp; \ 146 __asm("stc sr, r5\n" \ 147 "or r4, r5\n" \ 148 "ldc r5, sr\n", 0x500000f0, tmp); \ 149 /* Now I run on P1, TLB flush. and disable. */ \ 150 \ 151 VOLATILE_REF(MMUCR) = MMUCR_TF; \ 152 do { \ 153 u_int32_t *dst =(u_int32_t *)p->dst; \ 154 u_int32_t *src =(u_int32_t *)p->src; \ 155 u_int32_t sz = p->sz / sizeof (int); \ 156 if (p->src == ~0) \ 157 while (sz--) \ 158 *dst++ = 0; \ 159 else \ 160 while (sz--) \ 161 *dst++ = *src++; \ 162 } while ((p =(struct PageTag *)p->next) != ~0); \ 163 \ 164 SH##x##_CACHE_FLUSH(); \ 165 \ 166 /* jump to kernel entry. */ \ 167 __asm("jmp @r7\n" \ 168 "nop\n", bi->argc, bi->argv, \ 169 bi->bootinfo, bi->kernel_entry); \ 170 } 171 172 SH_(7709); 173 SH_(7709A); 174 175 // 176 // SH4 series. 177 /// 178 class SH7750 : public SHArchitecture { 179 public: 180 SH7750(Console *&cons, MemoryManager *&mem, boot_func_t bootfunc) 181 : SHArchitecture(cons, mem, bootfunc) { 182 DPRINTF((TEXT("CPU: SH7750\n"))); 183 } 184 ~SH7750(void) { /* NO-OP */ } 185 186 void cache_flush(void) { 187 // 188 // To invalidate I-cache, program must run on P2. I can't 189 // do it myself, use WinCE API. (WCE2.10 or later) 190 // 191 CacheSync(CACHE_D_WBINV); 192 CacheSync(CACHE_I_INV); 193 } 194 195 static void boot_func(struct BootArgs *, struct PageTag *); 196 }; 197 198 #endif // _HPCBOOT_SH_ARCH_H_ 199
Indexes created Tue Sep 30 20:09:53 GMT 2025