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ipaq_atmelgpio.c revision 1.13.56.2
      1  1.13.56.2      yamt /*	$NetBSD: ipaq_atmelgpio.c,v 1.13.56.2 2009/06/20 07:20:03 yamt Exp $	*/
      2        1.1    ichiro 
      3        1.1    ichiro /*-
      4        1.1    ichiro  * Copyright (c) 2001 The NetBSD Foundation, Inc.  All rights reserved.
      5        1.1    ichiro  *
      6        1.1    ichiro  * This code is derived from software contributed to The NetBSD Foundation
      7        1.1    ichiro  * by Ichiro FUKUHARA (ichiro (at) ichiro.org).
      8        1.1    ichiro  *
      9        1.1    ichiro  * Redistribution and use in source and binary forms, with or without
     10        1.1    ichiro  * modification, are permitted provided that the following conditions
     11        1.1    ichiro  * are met:
     12        1.1    ichiro  * 1. Redistributions of source code must retain the above copyright
     13        1.1    ichiro  *    notice, this list of conditions and the following disclaimer.
     14        1.1    ichiro  * 2. Redistributions in binary form must reproduce the above copyright
     15        1.1    ichiro  *    notice, this list of conditions and the following disclaimer in the
     16        1.1    ichiro  *    documentation and/or other materials provided with the distribution.
     17        1.1    ichiro  *
     18        1.1    ichiro  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     19        1.1    ichiro  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     20        1.1    ichiro  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     21        1.1    ichiro  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     22        1.1    ichiro  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     23        1.1    ichiro  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     24        1.1    ichiro  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     25        1.1    ichiro  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     26        1.1    ichiro  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     27        1.1    ichiro  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     28        1.1    ichiro  * POSSIBILITY OF SUCH DAMAGE.
     29        1.1    ichiro  */
     30        1.1    ichiro /*
     31        1.1    ichiro  * iPAQ uses Atmel microcontroller to service a few of peripheral devices.
     32        1.1    ichiro  * This controller connect to UART1 of SA11x0.
     33        1.1    ichiro  */
     34        1.6     lukem 
     35        1.6     lukem #include <sys/cdefs.h>
     36  1.13.56.2      yamt __KERNEL_RCSID(0, "$NetBSD: ipaq_atmelgpio.c,v 1.13.56.2 2009/06/20 07:20:03 yamt Exp $");
     37        1.1    ichiro 
     38        1.1    ichiro #include <sys/param.h>
     39        1.1    ichiro #include <sys/systm.h>
     40        1.1    ichiro #include <sys/types.h>
     41        1.1    ichiro #include <sys/conf.h>
     42        1.1    ichiro #include <sys/file.h>
     43        1.1    ichiro #include <sys/device.h>
     44        1.1    ichiro #include <sys/kernel.h>
     45        1.1    ichiro #include <sys/kthread.h>
     46        1.1    ichiro #include <sys/malloc.h>
     47        1.1    ichiro 
     48        1.1    ichiro #include <machine/bus.h>
     49        1.1    ichiro 
     50        1.1    ichiro #include <hpcarm/dev/ipaq_saipvar.h>
     51        1.1    ichiro #include <hpcarm/dev/ipaq_gpioreg.h>
     52        1.1    ichiro #include <hpcarm/dev/ipaq_atmel.h>
     53        1.2    ichiro #include <hpcarm/dev/ipaq_atmelvar.h>
     54       1.11     peter 
     55       1.11     peter #include <arm/sa11x0/sa11x0_gpioreg.h>
     56       1.11     peter #include <arm/sa11x0/sa11x0_comreg.h>
     57       1.11     peter #include <arm/sa11x0/sa11x0_reg.h>
     58        1.1    ichiro 
     59        1.2    ichiro #ifdef ATMEL_DEBUG
     60  1.13.56.2      yamt #define DPRINTF(x) aprint_normal x
     61        1.2    ichiro #else
     62        1.2    ichiro #define DPRINTF(x)
     63        1.2    ichiro #endif
     64        1.1    ichiro 
     65  1.13.56.2      yamt static	int	atmelgpio_match(device_t, cfdata_t, void *);
     66  1.13.56.2      yamt static	void	atmelgpio_attach(device_t, device_t, void *);
     67        1.1    ichiro static	int	atmelgpio_print(void *, const char *);
     68  1.13.56.2      yamt static	int	atmelgpio_search(device_t, cfdata_t, const int *, void *);
     69        1.1    ichiro static	void	atmelgpio_init(struct atmelgpio_softc *);
     70        1.1    ichiro 
     71        1.2    ichiro static	void	rxtx_data(struct atmelgpio_softc *, int, int,
     72       1.10     peter 			 uint8_t *, struct atmel_rx *);
     73        1.2    ichiro 
     74  1.13.56.2      yamt CFATTACH_DECL_NEW(atmelgpio, sizeof(struct atmelgpio_softc),
     75        1.5   thorpej     atmelgpio_match, atmelgpio_attach, NULL, NULL);
     76        1.1    ichiro 
     77        1.1    ichiro static int
     78  1.13.56.2      yamt atmelgpio_match(device_t parent, cfdata_t cf, void *aux)
     79        1.1    ichiro {
     80        1.1    ichiro 	return (1);
     81        1.1    ichiro }
     82        1.1    ichiro 
     83        1.1    ichiro static void
     84  1.13.56.2      yamt atmelgpio_attach(device_t parent, device_t self, void *aux)
     85        1.1    ichiro {
     86  1.13.56.2      yamt 	struct atmelgpio_softc *sc = device_private(self);
     87  1.13.56.2      yamt 	struct ipaq_softc *psc = device_private(parent);
     88        1.1    ichiro 
     89       1.11     peter 	struct atmel_rx rxbuf;
     90        1.2    ichiro 
     91  1.13.56.2      yamt 	aprint_normal("\n");
     92  1.13.56.2      yamt 	aprint_normal_dev(self, "Atmel microcontroller GPIO\n");
     93        1.1    ichiro 
     94        1.1    ichiro 	sc->sc_iot = psc->sc_iot;
     95        1.1    ichiro 	sc->sc_ioh = psc->sc_ioh;
     96  1.13.56.2      yamt 	sc->sc_parent = psc;
     97        1.1    ichiro 
     98        1.1    ichiro 	if (bus_space_map(sc->sc_iot, SACOM1_BASE, SACOM_NPORTS, 0,
     99        1.1    ichiro                         &sc->sc_ioh)) {
    100  1.13.56.2      yamt                 aprint_normal_dev(self, "unable to map of UART1 registers\n");
    101        1.1    ichiro                 return;
    102        1.1    ichiro         }
    103        1.1    ichiro 
    104        1.1    ichiro 	atmelgpio_init(sc);
    105        1.1    ichiro 
    106       1.12       rjs 	rxbuf.idx = 0;
    107       1.12       rjs 	rxbuf.len = 0;
    108       1.12       rjs 
    109        1.2    ichiro #if 1  /* this is sample */
    110       1.11     peter 	rxtx_data(sc, STATUS_BATTERY, 0, NULL, &rxbuf);
    111        1.2    ichiro 
    112  1.13.56.2      yamt 	aprint_normal("ac_status          = %x\n", rxbuf.data[0]);
    113  1.13.56.2      yamt 	aprint_normal("Battery kind       = %x\n", rxbuf.data[1]);
    114  1.13.56.2      yamt 	aprint_normal("Voltage            = %d mV\n",
    115       1.11     peter 		1000 * (rxbuf.data[3] << 8 | rxbuf.data[2]) /228);
    116  1.13.56.2      yamt 	aprint_normal("Battery Status     = %x\n", rxbuf.data[4]);
    117  1.13.56.2      yamt 	aprint_normal("Battery percentage = %d\n",
    118       1.11     peter 		425 * (rxbuf.data[3] << 8 | rxbuf.data[2]) /1000 - 298);
    119        1.2    ichiro #endif
    120        1.2    ichiro 
    121       1.13       rjs 	rxtx_data(sc, READ_IIC, 0, NULL, &rxbuf);
    122       1.13       rjs 
    123        1.1    ichiro 	/*
    124        1.1    ichiro 	 *  Attach each devices
    125        1.1    ichiro 	 */
    126        1.1    ichiro 
    127        1.7  drochner 	config_search_ia(atmelgpio_search, self, "atmelgpioif", NULL);
    128        1.1    ichiro }
    129        1.1    ichiro 
    130        1.1    ichiro static int
    131  1.13.56.2      yamt atmelgpio_search(device_t parent, cfdata_t cf, const int *ldesc,
    132       1.13       rjs 		 void *aux)
    133        1.1    ichiro {
    134        1.3   thorpej 	if (config_match(parent, cf, NULL) > 0)
    135        1.1    ichiro 		config_attach(parent, cf, NULL, atmelgpio_print);
    136        1.1    ichiro 	return 0;
    137        1.1    ichiro }
    138        1.1    ichiro 
    139        1.1    ichiro 
    140        1.1    ichiro static int
    141       1.13       rjs atmelgpio_print(void *aux, const char *name)
    142        1.1    ichiro {
    143        1.1    ichiro 	return (UNCONF);
    144        1.1    ichiro }
    145        1.1    ichiro 
    146        1.1    ichiro static void
    147       1.13       rjs atmelgpio_init(struct atmelgpio_softc *sc)
    148        1.1    ichiro {
    149        1.1    ichiro 	/* 8 bits no parity 1 stop bit */
    150        1.1    ichiro 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_CR0, CR0_DSS);
    151        1.1    ichiro 
    152        1.1    ichiro 	/* Set baud rate 115k */
    153        1.1    ichiro 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_CR1, 0);
    154        1.1    ichiro 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_CR2, SACOMSPEED(115200));
    155        1.2    ichiro 
    156        1.2    ichiro 	/* RX/TX enable, RX/TX FIFO interrupt enable */
    157        1.2    ichiro 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_CR3,
    158        1.2    ichiro 			 (CR3_RXE | CR3_TXE | CR3_RIE | CR3_TIE));
    159        1.2    ichiro }
    160        1.2    ichiro 
    161        1.2    ichiro static void
    162       1.13       rjs rxtx_data(struct atmelgpio_softc  *sc, int id, int size, uint8_t *buf,
    163       1.13       rjs 	  struct atmel_rx *rxbuf)
    164        1.2    ichiro {
    165        1.2    ichiro 	int 		i, checksum, length, rx_data;
    166       1.10     peter 	uint8_t		data[MAX_SENDSIZE];
    167        1.2    ichiro 
    168        1.2    ichiro 	length = size + FRAME_OVERHEAD_SIZE;
    169        1.2    ichiro 
    170        1.2    ichiro 	while (! (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_SR0) & SR0_TFS))
    171        1.2    ichiro 		;
    172        1.2    ichiro 
    173       1.10     peter 		data[0] = (uint8_t)FRAME_SOF;
    174       1.10     peter 		data[1] = (uint8_t)((id << 4) | size);
    175        1.2    ichiro 		checksum = data[1];
    176        1.2    ichiro 		i = 2;
    177        1.2    ichiro 		while (size--)	{
    178        1.2    ichiro 			data[i++] = *buf;
    179       1.10     peter 			checksum += (uint8_t)(*buf++);
    180        1.2    ichiro 		}
    181        1.2    ichiro 		data[length-1] = checksum;
    182        1.2    ichiro 
    183        1.2    ichiro 	while (! (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_SR1) & SR1_TNF))
    184        1.2    ichiro 		;
    185        1.2    ichiro 		i = 0;
    186        1.2    ichiro 		while (i < length)
    187        1.2    ichiro 			bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_DR, data[i++]);
    188        1.2    ichiro 
    189        1.2    ichiro 	delay(10000);
    190        1.2    ichiro #if 0
    191        1.2    ichiro 	while (! (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_SR0) &
    192        1.2    ichiro 		 (SR0_RID | SR0_RFS)))
    193        1.2    ichiro #endif
    194        1.2    ichiro 	rxbuf->state = STATE_SOF;
    195        1.2    ichiro 	while (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_SR1) & SR1_RNE) {
    196        1.2    ichiro 
    197        1.2    ichiro 		rx_data = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_DR);
    198        1.2    ichiro 			DPRINTF(("DATA = %x\n", rx_data));
    199        1.2    ichiro 
    200        1.2    ichiro 		switch (rxbuf->state) {
    201        1.2    ichiro 		case STATE_SOF:
    202        1.2    ichiro 			if (rx_data == FRAME_SOF)
    203        1.2    ichiro 				rxbuf->state = STATE_ID;
    204        1.2    ichiro 			break;
    205        1.2    ichiro 		case STATE_ID:
    206        1.2    ichiro 			rxbuf->id = (rx_data & 0xf0) >> 4;
    207        1.2    ichiro 			rxbuf->len = rx_data & 0x0f;
    208        1.2    ichiro 			rxbuf->idx = 0;
    209        1.2    ichiro 			rxbuf->checksum = rx_data;
    210        1.2    ichiro 			rxbuf->state = (rxbuf->len > 0 ) ? STATE_DATA : STATE_EOF;
    211        1.2    ichiro 			break;
    212        1.2    ichiro 		case STATE_DATA:
    213        1.2    ichiro 			rxbuf->checksum += rx_data;
    214        1.2    ichiro 			rxbuf->data[rxbuf->idx] = rx_data;
    215        1.2    ichiro 			if (++rxbuf->idx == rxbuf->len)
    216        1.2    ichiro 				rxbuf->state = STATE_EOF;
    217        1.2    ichiro 			break;
    218        1.2    ichiro 		case STATE_EOF:
    219        1.2    ichiro 			rxbuf->state = STATE_SOF;
    220        1.2    ichiro 			if (rx_data == FRAME_EOF || rx_data == rxbuf->checksum)
    221        1.2    ichiro 				DPRINTF(("frame EOF\n"));
    222        1.2    ichiro 			else
    223        1.2    ichiro 				DPRINTF(("BadFrame\n"));
    224        1.2    ichiro 			break;
    225        1.2    ichiro 		default:
    226        1.2    ichiro 			break;
    227        1.2    ichiro 		}
    228        1.2    ichiro 	}
    229        1.1    ichiro }
    230