ipaq_atmelgpio.c revision 1.2 1 1.2 ichiro /* $NetBSD: ipaq_atmelgpio.c,v 1.2 2001/08/02 18:51:01 ichiro Exp $ */
2 1.1 ichiro
3 1.1 ichiro /*-
4 1.1 ichiro * Copyright (c) 2001 The NetBSD Foundation, Inc. All rights reserved.
5 1.1 ichiro *
6 1.1 ichiro * This code is derived from software contributed to The NetBSD Foundation
7 1.1 ichiro * by Ichiro FUKUHARA (ichiro (at) ichiro.org).
8 1.1 ichiro *
9 1.1 ichiro * Redistribution and use in source and binary forms, with or without
10 1.1 ichiro * modification, are permitted provided that the following conditions
11 1.1 ichiro * are met:
12 1.1 ichiro * 1. Redistributions of source code must retain the above copyright
13 1.1 ichiro * notice, this list of conditions and the following disclaimer.
14 1.1 ichiro * 2. Redistributions in binary form must reproduce the above copyright
15 1.1 ichiro * notice, this list of conditions and the following disclaimer in the
16 1.1 ichiro * documentation and/or other materials provided with the distribution.
17 1.1 ichiro * 3. All advertising materials mentioning features or use of this software
18 1.1 ichiro * must display the following acknowledgement:
19 1.1 ichiro * This product includes software developed by the NetBSD
20 1.1 ichiro * Foundation, Inc. and its contributors.
21 1.1 ichiro * 4. Neither the name of The NetBSD Foundation nor the names of its
22 1.1 ichiro * contributors may be used to endorse or promote products derived
23 1.1 ichiro * from this software without specific prior written permission.
24 1.1 ichiro *
25 1.1 ichiro * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
26 1.1 ichiro * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 1.1 ichiro * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 1.1 ichiro * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
29 1.1 ichiro * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 1.1 ichiro * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 1.1 ichiro * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 1.1 ichiro * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 1.1 ichiro * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 1.1 ichiro * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 1.1 ichiro * POSSIBILITY OF SUCH DAMAGE.
36 1.1 ichiro */
37 1.1 ichiro /*
38 1.1 ichiro * iPAQ uses Atmel microcontroller to service a few of peripheral devices.
39 1.1 ichiro * This controller connect to UART1 of SA11x0.
40 1.1 ichiro */
41 1.1 ichiro
42 1.1 ichiro #include <sys/param.h>
43 1.1 ichiro #include <sys/systm.h>
44 1.1 ichiro #include <sys/types.h>
45 1.1 ichiro #include <sys/conf.h>
46 1.1 ichiro #include <sys/file.h>
47 1.1 ichiro #include <sys/device.h>
48 1.1 ichiro #include <sys/kernel.h>
49 1.1 ichiro #include <sys/kthread.h>
50 1.1 ichiro #include <sys/malloc.h>
51 1.1 ichiro
52 1.1 ichiro #include <machine/bus.h>
53 1.1 ichiro
54 1.1 ichiro #include <hpcarm/dev/ipaq_saipvar.h>
55 1.1 ichiro #include <hpcarm/dev/ipaq_gpioreg.h>
56 1.1 ichiro #include <hpcarm/dev/ipaq_atmel.h>
57 1.2 ichiro #include <hpcarm/dev/ipaq_atmelvar.h>
58 1.2 ichiro #include <hpcarm/sa11x0/sa11x0_gpioreg.h>
59 1.1 ichiro #include <hpcarm/sa11x0/sa11x0_comreg.h>
60 1.1 ichiro #include <hpcarm/sa11x0/sa11x0_reg.h>
61 1.1 ichiro
62 1.2 ichiro #ifdef ATMEL_DEBUG
63 1.2 ichiro #define DPRINTF(x) printf x
64 1.2 ichiro #else
65 1.2 ichiro #define DPRINTF(x)
66 1.2 ichiro #endif
67 1.1 ichiro
68 1.1 ichiro static int atmelgpio_match(struct device *, struct cfdata *, void *);
69 1.1 ichiro static void atmelgpio_attach(struct device *, struct device *, void *);
70 1.1 ichiro static int atmelgpio_print(void *, const char *);
71 1.1 ichiro static int atmelgpio_search(struct device *, struct cfdata *, void *);
72 1.1 ichiro static void atmelgpio_init(struct atmelgpio_softc *);
73 1.1 ichiro
74 1.2 ichiro static void rxtx_data(struct atmelgpio_softc *, int, int,
75 1.2 ichiro u_int8_t *, struct atmel_rx *);
76 1.2 ichiro
77 1.1 ichiro struct cfattach atmelgpio_ca = {
78 1.1 ichiro sizeof(struct atmelgpio_softc), atmelgpio_match, atmelgpio_attach
79 1.1 ichiro };
80 1.1 ichiro
81 1.1 ichiro static int
82 1.1 ichiro atmelgpio_match(parent, cf, aux)
83 1.1 ichiro struct device *parent;
84 1.1 ichiro struct cfdata *cf;
85 1.1 ichiro void *aux;
86 1.1 ichiro {
87 1.1 ichiro return (1);
88 1.1 ichiro }
89 1.1 ichiro
90 1.1 ichiro static void
91 1.1 ichiro atmelgpio_attach(parent, self, aux)
92 1.1 ichiro struct device *parent;
93 1.1 ichiro struct device *self;
94 1.1 ichiro void *aux;
95 1.1 ichiro {
96 1.1 ichiro struct atmelgpio_softc *sc = (struct atmelgpio_softc *)self;
97 1.1 ichiro struct ipaq_softc *psc = (struct ipaq_softc *)parent;
98 1.1 ichiro
99 1.2 ichiro struct atmel_rx *rxbuf;
100 1.2 ichiro
101 1.1 ichiro printf("\n");
102 1.1 ichiro printf("%s: Atmel microcontroller GPIO\n", sc->sc_dev.dv_xname);
103 1.1 ichiro
104 1.1 ichiro sc->sc_iot = psc->sc_iot;
105 1.1 ichiro sc->sc_ioh = psc->sc_ioh;
106 1.1 ichiro sc->sc_parent = (struct ipaq_softc *)parent;
107 1.1 ichiro
108 1.1 ichiro if (bus_space_map(sc->sc_iot, SACOM1_BASE, SACOM_NPORTS, 0,
109 1.1 ichiro &sc->sc_ioh)) {
110 1.1 ichiro printf("%s: unable to map of UART1 registers\n", sc->sc_dev.dv_xname);
111 1.1 ichiro return;
112 1.1 ichiro }
113 1.1 ichiro
114 1.1 ichiro atmelgpio_init(sc);
115 1.1 ichiro
116 1.2 ichiro #if 1 /* this is sample */
117 1.2 ichiro rxtx_data(sc, STATUS_BATTERY, 0, NULL, rxbuf);
118 1.2 ichiro
119 1.2 ichiro printf("ac_status = %x\n", rxbuf->data[0]);
120 1.2 ichiro printf("Battery kind = %x\n", rxbuf->data[1]);
121 1.2 ichiro printf("Voltage = %d mV\n",
122 1.2 ichiro 1000 * (rxbuf->data[3] << 8 | rxbuf->data[2]) /228);
123 1.2 ichiro printf("Battery Status = %x\n", rxbuf->data[4]);
124 1.2 ichiro printf("Battery percentage = %d\n",
125 1.2 ichiro 425 * (rxbuf->data[3] << 8 | rxbuf->data[2]) /1000 - 298);
126 1.2 ichiro #endif
127 1.2 ichiro
128 1.1 ichiro /*
129 1.1 ichiro * Attach each devices
130 1.1 ichiro */
131 1.1 ichiro
132 1.1 ichiro config_search(atmelgpio_search, self, NULL);
133 1.1 ichiro }
134 1.1 ichiro
135 1.1 ichiro static int
136 1.1 ichiro atmelgpio_search(parent, cf, aux)
137 1.1 ichiro struct device *parent;
138 1.1 ichiro struct cfdata *cf;
139 1.1 ichiro void *aux;
140 1.1 ichiro {
141 1.1 ichiro if ((*cf->cf_attach->ca_match)(parent, cf, NULL) > 0)
142 1.1 ichiro config_attach(parent, cf, NULL, atmelgpio_print);
143 1.1 ichiro return 0;
144 1.1 ichiro }
145 1.1 ichiro
146 1.1 ichiro
147 1.1 ichiro static int
148 1.1 ichiro atmelgpio_print(aux, name)
149 1.1 ichiro void *aux;
150 1.1 ichiro const char *name;
151 1.1 ichiro {
152 1.1 ichiro return (UNCONF);
153 1.1 ichiro }
154 1.1 ichiro
155 1.1 ichiro static void
156 1.1 ichiro atmelgpio_init(sc)
157 1.1 ichiro struct atmelgpio_softc *sc;
158 1.1 ichiro {
159 1.1 ichiro /* 8 bits no parity 1 stop bit */
160 1.1 ichiro bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_CR0, CR0_DSS);
161 1.1 ichiro
162 1.1 ichiro /* Set baud rate 115k */
163 1.1 ichiro bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_CR1, 0);
164 1.1 ichiro bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_CR2, SACOMSPEED(115200));
165 1.2 ichiro
166 1.2 ichiro /* RX/TX enable, RX/TX FIFO interrupt enable */
167 1.2 ichiro bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_CR3,
168 1.2 ichiro (CR3_RXE | CR3_TXE | CR3_RIE | CR3_TIE));
169 1.2 ichiro }
170 1.2 ichiro
171 1.2 ichiro static void
172 1.2 ichiro rxtx_data(sc, id, size, buf, rxbuf)
173 1.2 ichiro struct atmelgpio_softc *sc;
174 1.2 ichiro int id, size;
175 1.2 ichiro u_int8_t *buf;
176 1.2 ichiro struct atmel_rx *rxbuf;
177 1.2 ichiro {
178 1.2 ichiro int i, checksum, length, rx_data;
179 1.2 ichiro u_int8_t data[MAX_SENDSIZE];
180 1.2 ichiro
181 1.2 ichiro length = size + FRAME_OVERHEAD_SIZE;
182 1.2 ichiro
183 1.2 ichiro while (! (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_SR0) & SR0_TFS))
184 1.2 ichiro ;
185 1.2 ichiro
186 1.2 ichiro data[0] = (u_int8_t)FRAME_SOF;
187 1.2 ichiro data[1] = (u_int8_t)((id << 4) | size);
188 1.2 ichiro checksum = data[1];
189 1.2 ichiro i = 2;
190 1.2 ichiro while (size--) {
191 1.2 ichiro data[i++] = *buf;
192 1.2 ichiro checksum += (u_int8_t)(*buf++);
193 1.2 ichiro }
194 1.2 ichiro data[length-1] = checksum;
195 1.2 ichiro
196 1.2 ichiro while (! (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_SR1) & SR1_TNF))
197 1.2 ichiro ;
198 1.2 ichiro i = 0;
199 1.2 ichiro while (i < length)
200 1.2 ichiro bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_DR, data[i++]);
201 1.2 ichiro
202 1.2 ichiro delay(10000);
203 1.2 ichiro #if 0
204 1.2 ichiro while (! (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_SR0) &
205 1.2 ichiro (SR0_RID | SR0_RFS)))
206 1.2 ichiro #endif
207 1.2 ichiro rxbuf->state = STATE_SOF;
208 1.2 ichiro while (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_SR1) & SR1_RNE) {
209 1.2 ichiro
210 1.2 ichiro rx_data = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_DR);
211 1.2 ichiro DPRINTF(("DATA = %x\n", rx_data));
212 1.2 ichiro
213 1.2 ichiro switch (rxbuf->state) {
214 1.2 ichiro case STATE_SOF:
215 1.2 ichiro if (rx_data == FRAME_SOF)
216 1.2 ichiro rxbuf->state = STATE_ID;
217 1.2 ichiro break;
218 1.2 ichiro case STATE_ID:
219 1.2 ichiro rxbuf->id = (rx_data & 0xf0) >> 4;
220 1.2 ichiro rxbuf->len = rx_data & 0x0f;
221 1.2 ichiro rxbuf->idx = 0;
222 1.2 ichiro rxbuf->checksum = rx_data;
223 1.2 ichiro rxbuf->state = (rxbuf->len > 0 ) ? STATE_DATA : STATE_EOF;
224 1.2 ichiro break;
225 1.2 ichiro case STATE_DATA:
226 1.2 ichiro rxbuf->checksum += rx_data;
227 1.2 ichiro rxbuf->data[rxbuf->idx] = rx_data;
228 1.2 ichiro if (++rxbuf->idx == rxbuf->len)
229 1.2 ichiro rxbuf->state = STATE_EOF;
230 1.2 ichiro break;
231 1.2 ichiro case STATE_EOF:
232 1.2 ichiro rxbuf->state = STATE_SOF;
233 1.2 ichiro if (rx_data == FRAME_EOF || rx_data == rxbuf->checksum)
234 1.2 ichiro DPRINTF(("frame EOF\n"));
235 1.2 ichiro else
236 1.2 ichiro DPRINTF(("BadFrame\n"));
237 1.2 ichiro break;
238 1.2 ichiro default:
239 1.2 ichiro break;
240 1.2 ichiro }
241 1.2 ichiro }
242 1.1 ichiro }
243