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ipaq_atmelgpio.c revision 1.9.6.1
      1  1.9.6.1    simonb /*	$NetBSD: ipaq_atmelgpio.c,v 1.9.6.1 2006/04/22 11:37:28 simonb Exp $	*/
      2      1.1    ichiro 
      3      1.1    ichiro /*-
      4      1.1    ichiro  * Copyright (c) 2001 The NetBSD Foundation, Inc.  All rights reserved.
      5      1.1    ichiro  *
      6      1.1    ichiro  * This code is derived from software contributed to The NetBSD Foundation
      7      1.1    ichiro  * by Ichiro FUKUHARA (ichiro (at) ichiro.org).
      8      1.1    ichiro  *
      9      1.1    ichiro  * Redistribution and use in source and binary forms, with or without
     10      1.1    ichiro  * modification, are permitted provided that the following conditions
     11      1.1    ichiro  * are met:
     12      1.1    ichiro  * 1. Redistributions of source code must retain the above copyright
     13      1.1    ichiro  *    notice, this list of conditions and the following disclaimer.
     14      1.1    ichiro  * 2. Redistributions in binary form must reproduce the above copyright
     15      1.1    ichiro  *    notice, this list of conditions and the following disclaimer in the
     16      1.1    ichiro  *    documentation and/or other materials provided with the distribution.
     17      1.1    ichiro  * 3. All advertising materials mentioning features or use of this software
     18      1.1    ichiro  *    must display the following acknowledgement:
     19      1.1    ichiro  *	This product includes software developed by the NetBSD
     20      1.1    ichiro  *	Foundation, Inc. and its contributors.
     21      1.1    ichiro  * 4. Neither the name of The NetBSD Foundation nor the names of its
     22      1.1    ichiro  *    contributors may be used to endorse or promote products derived
     23      1.1    ichiro  *    from this software without specific prior written permission.
     24      1.1    ichiro  *
     25      1.1    ichiro  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     26      1.1    ichiro  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     27      1.1    ichiro  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     28      1.1    ichiro  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     29      1.1    ichiro  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     30      1.1    ichiro  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     31      1.1    ichiro  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     32      1.1    ichiro  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     33      1.1    ichiro  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     34      1.1    ichiro  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     35      1.1    ichiro  * POSSIBILITY OF SUCH DAMAGE.
     36      1.1    ichiro  */
     37      1.1    ichiro /*
     38      1.1    ichiro  * iPAQ uses Atmel microcontroller to service a few of peripheral devices.
     39      1.1    ichiro  * This controller connect to UART1 of SA11x0.
     40      1.1    ichiro  */
     41      1.6     lukem 
     42      1.6     lukem #include <sys/cdefs.h>
     43  1.9.6.1    simonb __KERNEL_RCSID(0, "$NetBSD: ipaq_atmelgpio.c,v 1.9.6.1 2006/04/22 11:37:28 simonb Exp $");
     44      1.1    ichiro 
     45      1.1    ichiro #include <sys/param.h>
     46      1.1    ichiro #include <sys/systm.h>
     47      1.1    ichiro #include <sys/types.h>
     48      1.1    ichiro #include <sys/conf.h>
     49      1.1    ichiro #include <sys/file.h>
     50      1.1    ichiro #include <sys/device.h>
     51      1.1    ichiro #include <sys/kernel.h>
     52      1.1    ichiro #include <sys/kthread.h>
     53      1.1    ichiro #include <sys/malloc.h>
     54      1.1    ichiro 
     55      1.1    ichiro #include <machine/bus.h>
     56      1.1    ichiro 
     57      1.1    ichiro #include <hpcarm/dev/ipaq_saipvar.h>
     58      1.1    ichiro #include <hpcarm/dev/ipaq_gpioreg.h>
     59      1.1    ichiro #include <hpcarm/dev/ipaq_atmel.h>
     60      1.2    ichiro #include <hpcarm/dev/ipaq_atmelvar.h>
     61  1.9.6.1    simonb 
     62  1.9.6.1    simonb #include <arm/sa11x0/sa11x0_gpioreg.h>
     63  1.9.6.1    simonb #include <arm/sa11x0/sa11x0_comreg.h>
     64  1.9.6.1    simonb #include <arm/sa11x0/sa11x0_reg.h>
     65      1.1    ichiro 
     66      1.2    ichiro #ifdef ATMEL_DEBUG
     67      1.2    ichiro #define DPRINTF(x) printf x
     68      1.2    ichiro #else
     69      1.2    ichiro #define DPRINTF(x)
     70      1.2    ichiro #endif
     71      1.1    ichiro 
     72      1.1    ichiro static	int	atmelgpio_match(struct device *, struct cfdata *, void *);
     73      1.1    ichiro static	void	atmelgpio_attach(struct device *, struct device *, void *);
     74      1.1    ichiro static	int	atmelgpio_print(void *, const char *);
     75      1.7  drochner static	int	atmelgpio_search(struct device *, struct cfdata *,
     76      1.8  drochner 				 const int *, void *);
     77      1.1    ichiro static	void	atmelgpio_init(struct atmelgpio_softc *);
     78      1.1    ichiro 
     79      1.2    ichiro static	void	rxtx_data(struct atmelgpio_softc *, int, int,
     80  1.9.6.1    simonb 			 uint8_t *, struct atmel_rx *);
     81      1.2    ichiro 
     82      1.5   thorpej CFATTACH_DECL(atmelgpio, sizeof(struct atmelgpio_softc),
     83      1.5   thorpej     atmelgpio_match, atmelgpio_attach, NULL, NULL);
     84      1.1    ichiro 
     85      1.1    ichiro static int
     86      1.1    ichiro atmelgpio_match(parent, cf, aux)
     87      1.1    ichiro 	struct device *parent;
     88      1.1    ichiro 	struct cfdata *cf;
     89      1.1    ichiro 	void *aux;
     90      1.1    ichiro {
     91      1.1    ichiro 	return (1);
     92      1.1    ichiro }
     93      1.1    ichiro 
     94      1.1    ichiro static void
     95      1.1    ichiro atmelgpio_attach(parent, self, aux)
     96      1.1    ichiro 	struct device *parent;
     97      1.1    ichiro 	struct device *self;
     98      1.1    ichiro 	void *aux;
     99      1.1    ichiro {
    100      1.1    ichiro 	struct atmelgpio_softc *sc = (struct atmelgpio_softc *)self;
    101      1.1    ichiro 	struct ipaq_softc *psc = (struct ipaq_softc *)parent;
    102      1.1    ichiro 
    103  1.9.6.1    simonb 	struct atmel_rx rxbuf;
    104      1.2    ichiro 
    105      1.1    ichiro 	printf("\n");
    106      1.1    ichiro 	printf("%s: Atmel microcontroller GPIO\n",  sc->sc_dev.dv_xname);
    107      1.1    ichiro 
    108      1.1    ichiro 	sc->sc_iot = psc->sc_iot;
    109      1.1    ichiro 	sc->sc_ioh = psc->sc_ioh;
    110      1.1    ichiro 	sc->sc_parent = (struct ipaq_softc *)parent;
    111      1.1    ichiro 
    112      1.1    ichiro 	if (bus_space_map(sc->sc_iot, SACOM1_BASE, SACOM_NPORTS, 0,
    113      1.1    ichiro                         &sc->sc_ioh)) {
    114      1.1    ichiro                 printf("%s: unable to map of UART1 registers\n", sc->sc_dev.dv_xname);
    115      1.1    ichiro                 return;
    116      1.1    ichiro         }
    117      1.1    ichiro 
    118      1.1    ichiro 	atmelgpio_init(sc);
    119      1.1    ichiro 
    120      1.2    ichiro #if 1  /* this is sample */
    121  1.9.6.1    simonb 	rxtx_data(sc, STATUS_BATTERY, 0, NULL, &rxbuf);
    122      1.2    ichiro 
    123  1.9.6.1    simonb 	printf("ac_status          = %x\n", rxbuf.data[0]);
    124  1.9.6.1    simonb 	printf("Battery kind       = %x\n", rxbuf.data[1]);
    125      1.2    ichiro 	printf("Voltage            = %d mV\n",
    126  1.9.6.1    simonb 		1000 * (rxbuf.data[3] << 8 | rxbuf.data[2]) /228);
    127  1.9.6.1    simonb 	printf("Battery Status     = %x\n", rxbuf.data[4]);
    128      1.2    ichiro 	printf("Battery percentage = %d\n",
    129  1.9.6.1    simonb 		425 * (rxbuf.data[3] << 8 | rxbuf.data[2]) /1000 - 298);
    130      1.2    ichiro #endif
    131      1.2    ichiro 
    132      1.1    ichiro 	/*
    133      1.1    ichiro 	 *  Attach each devices
    134      1.1    ichiro 	 */
    135      1.1    ichiro 
    136      1.7  drochner 	config_search_ia(atmelgpio_search, self, "atmelgpioif", NULL);
    137      1.1    ichiro }
    138      1.1    ichiro 
    139      1.1    ichiro static int
    140      1.7  drochner atmelgpio_search(parent, cf, ldesc, aux)
    141      1.1    ichiro 	struct device *parent;
    142      1.1    ichiro 	struct cfdata *cf;
    143      1.8  drochner 	const int *ldesc;
    144      1.1    ichiro 	void *aux;
    145      1.1    ichiro {
    146      1.3   thorpej 	if (config_match(parent, cf, NULL) > 0)
    147      1.1    ichiro 		config_attach(parent, cf, NULL, atmelgpio_print);
    148      1.1    ichiro 	return 0;
    149      1.1    ichiro }
    150      1.1    ichiro 
    151      1.1    ichiro 
    152      1.1    ichiro static int
    153      1.1    ichiro atmelgpio_print(aux, name)
    154      1.1    ichiro 	void *aux;
    155      1.1    ichiro 	const char *name;
    156      1.1    ichiro {
    157      1.1    ichiro 	return (UNCONF);
    158      1.1    ichiro }
    159      1.1    ichiro 
    160      1.1    ichiro static void
    161      1.1    ichiro atmelgpio_init(sc)
    162      1.1    ichiro 	struct atmelgpio_softc *sc;
    163      1.1    ichiro {
    164      1.1    ichiro 	/* 8 bits no parity 1 stop bit */
    165      1.1    ichiro 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_CR0, CR0_DSS);
    166      1.1    ichiro 
    167      1.1    ichiro 	/* Set baud rate 115k */
    168      1.1    ichiro 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_CR1, 0);
    169      1.1    ichiro 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_CR2, SACOMSPEED(115200));
    170      1.2    ichiro 
    171      1.2    ichiro 	/* RX/TX enable, RX/TX FIFO interrupt enable */
    172      1.2    ichiro 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_CR3,
    173      1.2    ichiro 			 (CR3_RXE | CR3_TXE | CR3_RIE | CR3_TIE));
    174      1.2    ichiro }
    175      1.2    ichiro 
    176      1.2    ichiro static void
    177      1.2    ichiro rxtx_data(sc, id, size, buf, rxbuf)
    178      1.2    ichiro 	struct atmelgpio_softc  *sc;
    179      1.2    ichiro 	int			id, size;
    180  1.9.6.1    simonb 	uint8_t			*buf;
    181      1.2    ichiro 	struct atmel_rx		*rxbuf;
    182      1.2    ichiro {
    183      1.2    ichiro 	int 		i, checksum, length, rx_data;
    184  1.9.6.1    simonb 	uint8_t		data[MAX_SENDSIZE];
    185      1.2    ichiro 
    186      1.2    ichiro 	length = size + FRAME_OVERHEAD_SIZE;
    187      1.2    ichiro 
    188      1.2    ichiro 	while (! (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_SR0) & SR0_TFS))
    189      1.2    ichiro 		;
    190      1.2    ichiro 
    191  1.9.6.1    simonb 		data[0] = (uint8_t)FRAME_SOF;
    192  1.9.6.1    simonb 		data[1] = (uint8_t)((id << 4) | size);
    193      1.2    ichiro 		checksum = data[1];
    194      1.2    ichiro 		i = 2;
    195      1.2    ichiro 		while (size--)	{
    196      1.2    ichiro 			data[i++] = *buf;
    197  1.9.6.1    simonb 			checksum += (uint8_t)(*buf++);
    198      1.2    ichiro 		}
    199      1.2    ichiro 		data[length-1] = checksum;
    200      1.2    ichiro 
    201      1.2    ichiro 	while (! (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_SR1) & SR1_TNF))
    202      1.2    ichiro 		;
    203      1.2    ichiro 		i = 0;
    204      1.2    ichiro 		while (i < length)
    205      1.2    ichiro 			bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_DR, data[i++]);
    206      1.2    ichiro 
    207      1.2    ichiro 	delay(10000);
    208      1.2    ichiro #if 0
    209      1.2    ichiro 	while (! (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_SR0) &
    210      1.2    ichiro 		 (SR0_RID | SR0_RFS)))
    211      1.2    ichiro #endif
    212      1.2    ichiro 	rxbuf->state = STATE_SOF;
    213      1.2    ichiro 	while (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_SR1) & SR1_RNE) {
    214      1.2    ichiro 
    215      1.2    ichiro 		rx_data = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_DR);
    216      1.2    ichiro 			DPRINTF(("DATA = %x\n", rx_data));
    217      1.2    ichiro 
    218      1.2    ichiro 		switch (rxbuf->state) {
    219      1.2    ichiro 		case STATE_SOF:
    220      1.2    ichiro 			if (rx_data == FRAME_SOF)
    221      1.2    ichiro 				rxbuf->state = STATE_ID;
    222      1.2    ichiro 			break;
    223      1.2    ichiro 		case STATE_ID:
    224      1.2    ichiro 			rxbuf->id = (rx_data & 0xf0) >> 4;
    225      1.2    ichiro 			rxbuf->len = rx_data & 0x0f;
    226      1.2    ichiro 			rxbuf->idx = 0;
    227      1.2    ichiro 			rxbuf->checksum = rx_data;
    228      1.2    ichiro 			rxbuf->state = (rxbuf->len > 0 ) ? STATE_DATA : STATE_EOF;
    229      1.2    ichiro 			break;
    230      1.2    ichiro 		case STATE_DATA:
    231      1.2    ichiro 			rxbuf->checksum += rx_data;
    232      1.2    ichiro 			rxbuf->data[rxbuf->idx] = rx_data;
    233      1.2    ichiro 			if (++rxbuf->idx == rxbuf->len)
    234      1.2    ichiro 				rxbuf->state = STATE_EOF;
    235      1.2    ichiro 			break;
    236      1.2    ichiro 		case STATE_EOF:
    237      1.2    ichiro 			rxbuf->state = STATE_SOF;
    238      1.2    ichiro 			if (rx_data == FRAME_EOF || rx_data == rxbuf->checksum)
    239      1.2    ichiro 				DPRINTF(("frame EOF\n"));
    240      1.2    ichiro 			else
    241      1.2    ichiro 				DPRINTF(("BadFrame\n"));
    242      1.2    ichiro 			break;
    243      1.2    ichiro 		default:
    244      1.2    ichiro 			break;
    245      1.2    ichiro 		}
    246      1.2    ichiro 	}
    247      1.1    ichiro }
    248