ipaq_atmelgpio.c revision 1.17
1 /* $NetBSD: ipaq_atmelgpio.c,v 1.17 2021/04/24 23:36:37 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Ichiro FUKUHARA (ichiro (at) ichiro.org). 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 /* 31 * iPAQ uses Atmel microcontroller to service a few of peripheral devices. 32 * This controller connect to UART1 of SA11x0. 33 */ 34 35 #include <sys/cdefs.h> 36 __KERNEL_RCSID(0, "$NetBSD: ipaq_atmelgpio.c,v 1.17 2021/04/24 23:36:37 thorpej Exp $"); 37 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/types.h> 41 #include <sys/conf.h> 42 #include <sys/file.h> 43 #include <sys/device.h> 44 #include <sys/kernel.h> 45 #include <sys/kthread.h> 46 #include <sys/malloc.h> 47 #include <sys/bus.h> 48 49 #include <hpcarm/dev/ipaq_saipvar.h> 50 #include <hpcarm/dev/ipaq_gpioreg.h> 51 #include <hpcarm/dev/ipaq_atmel.h> 52 #include <hpcarm/dev/ipaq_atmelvar.h> 53 54 #include <arm/sa11x0/sa11x0_gpioreg.h> 55 #include <arm/sa11x0/sa11x0_comreg.h> 56 #include <arm/sa11x0/sa11x0_reg.h> 57 58 #ifdef ATMEL_DEBUG 59 #define DPRINTF(x) aprint_normal x 60 #else 61 #define DPRINTF(x) 62 #endif 63 64 static int atmelgpio_match(device_t, cfdata_t, void *); 65 static void atmelgpio_attach(device_t, device_t, void *); 66 static int atmelgpio_print(void *, const char *); 67 static int atmelgpio_search(device_t, cfdata_t, const int *, void *); 68 static void atmelgpio_init(struct atmelgpio_softc *); 69 70 static void rxtx_data(struct atmelgpio_softc *, int, int, 71 uint8_t *, struct atmel_rx *); 72 73 CFATTACH_DECL_NEW(atmelgpio, sizeof(struct atmelgpio_softc), 74 atmelgpio_match, atmelgpio_attach, NULL, NULL); 75 76 static int 77 atmelgpio_match(device_t parent, cfdata_t cf, void *aux) 78 { 79 return (1); 80 } 81 82 static void 83 atmelgpio_attach(device_t parent, device_t self, void *aux) 84 { 85 struct atmelgpio_softc *sc = device_private(self); 86 struct ipaq_softc *psc = device_private(parent); 87 88 struct atmel_rx rxbuf; 89 90 aprint_normal("\n"); 91 aprint_normal_dev(self, "Atmel microcontroller GPIO\n"); 92 93 sc->sc_iot = psc->sc_iot; 94 sc->sc_ioh = psc->sc_ioh; 95 sc->sc_parent = psc; 96 97 if (bus_space_map(sc->sc_iot, SACOM1_BASE, SACOM_NPORTS, 0, 98 &sc->sc_ioh)) { 99 aprint_normal_dev(self, "unable to map of UART1 registers\n"); 100 return; 101 } 102 103 atmelgpio_init(sc); 104 105 rxbuf.idx = 0; 106 rxbuf.len = 0; 107 108 #if 1 /* this is sample */ 109 rxtx_data(sc, STATUS_BATTERY, 0, NULL, &rxbuf); 110 111 aprint_normal("ac_status = %x\n", rxbuf.data[0]); 112 aprint_normal("Battery kind = %x\n", rxbuf.data[1]); 113 aprint_normal("Voltage = %d mV\n", 114 1000 * (rxbuf.data[3] << 8 | rxbuf.data[2]) /228); 115 aprint_normal("Battery Status = %x\n", rxbuf.data[4]); 116 aprint_normal("Battery percentage = %d\n", 117 425 * (rxbuf.data[3] << 8 | rxbuf.data[2]) /1000 - 298); 118 #endif 119 120 rxtx_data(sc, READ_IIC, 0, NULL, &rxbuf); 121 122 /* 123 * Attach each devices 124 */ 125 126 config_search(self, NULL, 127 CFARG_SEARCH, atmelgpio_search, 128 CFARG_EOL); 129 } 130 131 static int 132 atmelgpio_search(device_t parent, cfdata_t cf, const int *ldesc, 133 void *aux) 134 { 135 if (config_probe(parent, cf, NULL)) 136 config_attach(parent, cf, NULL, atmelgpio_print, CFARG_EOL); 137 return 0; 138 } 139 140 141 static int 142 atmelgpio_print(void *aux, const char *name) 143 { 144 return (UNCONF); 145 } 146 147 static void 148 atmelgpio_init(struct atmelgpio_softc *sc) 149 { 150 /* 8 bits no parity 1 stop bit */ 151 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_CR0, CR0_DSS); 152 153 /* Set baud rate 115k */ 154 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_CR1, 0); 155 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_CR2, SACOMSPEED(115200)); 156 157 /* RX/TX enable, RX/TX FIFO interrupt enable */ 158 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_CR3, 159 (CR3_RXE | CR3_TXE | CR3_RIE | CR3_TIE)); 160 } 161 162 static void 163 rxtx_data(struct atmelgpio_softc *sc, int id, int size, uint8_t *buf, 164 struct atmel_rx *rxbuf) 165 { 166 int i, checksum, length, rx_data; 167 uint8_t data[MAX_SENDSIZE]; 168 169 length = size + FRAME_OVERHEAD_SIZE; 170 171 while (! (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_SR0) & SR0_TFS)) 172 ; 173 174 data[0] = (uint8_t)FRAME_SOF; 175 data[1] = (uint8_t)((id << 4) | size); 176 checksum = data[1]; 177 i = 2; 178 while (size--) { 179 data[i++] = *buf; 180 checksum += (uint8_t)(*buf++); 181 } 182 data[length-1] = checksum; 183 184 while (! (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_SR1) & SR1_TNF)) 185 ; 186 i = 0; 187 while (i < length) 188 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_DR, data[i++]); 189 190 delay(10000); 191 #if 0 192 while (! (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_SR0) & 193 (SR0_RID | SR0_RFS))) 194 #endif 195 rxbuf->state = STATE_SOF; 196 while (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_SR1) & SR1_RNE) { 197 198 rx_data = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_DR); 199 DPRINTF(("DATA = %x\n", rx_data)); 200 201 switch (rxbuf->state) { 202 case STATE_SOF: 203 if (rx_data == FRAME_SOF) 204 rxbuf->state = STATE_ID; 205 break; 206 case STATE_ID: 207 rxbuf->id = (rx_data & 0xf0) >> 4; 208 rxbuf->len = rx_data & 0x0f; 209 rxbuf->idx = 0; 210 rxbuf->checksum = rx_data; 211 rxbuf->state = (rxbuf->len > 0 ) ? STATE_DATA : STATE_EOF; 212 break; 213 case STATE_DATA: 214 rxbuf->checksum += rx_data; 215 rxbuf->data[rxbuf->idx] = rx_data; 216 if (++rxbuf->idx == rxbuf->len) 217 rxbuf->state = STATE_EOF; 218 break; 219 case STATE_EOF: 220 rxbuf->state = STATE_SOF; 221 if (rx_data == FRAME_EOF || rx_data == rxbuf->checksum) 222 DPRINTF(("frame EOF\n")); 223 else 224 DPRINTF(("BadFrame\n")); 225 break; 226 default: 227 break; 228 } 229 } 230 } 231
Indexes created Sat Sep 27 14:09:57 GMT 2025