ipaq_atmelgpio.c revision 1.3
1 /* $NetBSD: ipaq_atmelgpio.c,v 1.3 2002/09/27 03:17:52 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Ichiro FUKUHARA (ichiro (at) ichiro.org). 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the NetBSD 20 * Foundation, Inc. and its contributors. 21 * 4. Neither the name of The NetBSD Foundation nor the names of its 22 * contributors may be used to endorse or promote products derived 23 * from this software without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 26 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 /* 38 * iPAQ uses Atmel microcontroller to service a few of peripheral devices. 39 * This controller connect to UART1 of SA11x0. 40 */ 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/types.h> 45 #include <sys/conf.h> 46 #include <sys/file.h> 47 #include <sys/device.h> 48 #include <sys/kernel.h> 49 #include <sys/kthread.h> 50 #include <sys/malloc.h> 51 52 #include <machine/bus.h> 53 54 #include <hpcarm/dev/ipaq_saipvar.h> 55 #include <hpcarm/dev/ipaq_gpioreg.h> 56 #include <hpcarm/dev/ipaq_atmel.h> 57 #include <hpcarm/dev/ipaq_atmelvar.h> 58 #include <hpcarm/sa11x0/sa11x0_gpioreg.h> 59 #include <hpcarm/sa11x0/sa11x0_comreg.h> 60 #include <hpcarm/sa11x0/sa11x0_reg.h> 61 62 #ifdef ATMEL_DEBUG 63 #define DPRINTF(x) printf x 64 #else 65 #define DPRINTF(x) 66 #endif 67 68 static int atmelgpio_match(struct device *, struct cfdata *, void *); 69 static void atmelgpio_attach(struct device *, struct device *, void *); 70 static int atmelgpio_print(void *, const char *); 71 static int atmelgpio_search(struct device *, struct cfdata *, void *); 72 static void atmelgpio_init(struct atmelgpio_softc *); 73 74 static void rxtx_data(struct atmelgpio_softc *, int, int, 75 u_int8_t *, struct atmel_rx *); 76 77 struct cfattach atmelgpio_ca = { 78 sizeof(struct atmelgpio_softc), atmelgpio_match, atmelgpio_attach 79 }; 80 81 static int 82 atmelgpio_match(parent, cf, aux) 83 struct device *parent; 84 struct cfdata *cf; 85 void *aux; 86 { 87 return (1); 88 } 89 90 static void 91 atmelgpio_attach(parent, self, aux) 92 struct device *parent; 93 struct device *self; 94 void *aux; 95 { 96 struct atmelgpio_softc *sc = (struct atmelgpio_softc *)self; 97 struct ipaq_softc *psc = (struct ipaq_softc *)parent; 98 99 struct atmel_rx *rxbuf; 100 101 printf("\n"); 102 printf("%s: Atmel microcontroller GPIO\n", sc->sc_dev.dv_xname); 103 104 sc->sc_iot = psc->sc_iot; 105 sc->sc_ioh = psc->sc_ioh; 106 sc->sc_parent = (struct ipaq_softc *)parent; 107 108 if (bus_space_map(sc->sc_iot, SACOM1_BASE, SACOM_NPORTS, 0, 109 &sc->sc_ioh)) { 110 printf("%s: unable to map of UART1 registers\n", sc->sc_dev.dv_xname); 111 return; 112 } 113 114 atmelgpio_init(sc); 115 116 #if 1 /* this is sample */ 117 rxtx_data(sc, STATUS_BATTERY, 0, NULL, rxbuf); 118 119 printf("ac_status = %x\n", rxbuf->data[0]); 120 printf("Battery kind = %x\n", rxbuf->data[1]); 121 printf("Voltage = %d mV\n", 122 1000 * (rxbuf->data[3] << 8 | rxbuf->data[2]) /228); 123 printf("Battery Status = %x\n", rxbuf->data[4]); 124 printf("Battery percentage = %d\n", 125 425 * (rxbuf->data[3] << 8 | rxbuf->data[2]) /1000 - 298); 126 #endif 127 128 /* 129 * Attach each devices 130 */ 131 132 config_search(atmelgpio_search, self, NULL); 133 } 134 135 static int 136 atmelgpio_search(parent, cf, aux) 137 struct device *parent; 138 struct cfdata *cf; 139 void *aux; 140 { 141 if (config_match(parent, cf, NULL) > 0) 142 config_attach(parent, cf, NULL, atmelgpio_print); 143 return 0; 144 } 145 146 147 static int 148 atmelgpio_print(aux, name) 149 void *aux; 150 const char *name; 151 { 152 return (UNCONF); 153 } 154 155 static void 156 atmelgpio_init(sc) 157 struct atmelgpio_softc *sc; 158 { 159 /* 8 bits no parity 1 stop bit */ 160 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_CR0, CR0_DSS); 161 162 /* Set baud rate 115k */ 163 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_CR1, 0); 164 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_CR2, SACOMSPEED(115200)); 165 166 /* RX/TX enable, RX/TX FIFO interrupt enable */ 167 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_CR3, 168 (CR3_RXE | CR3_TXE | CR3_RIE | CR3_TIE)); 169 } 170 171 static void 172 rxtx_data(sc, id, size, buf, rxbuf) 173 struct atmelgpio_softc *sc; 174 int id, size; 175 u_int8_t *buf; 176 struct atmel_rx *rxbuf; 177 { 178 int i, checksum, length, rx_data; 179 u_int8_t data[MAX_SENDSIZE]; 180 181 length = size + FRAME_OVERHEAD_SIZE; 182 183 while (! (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_SR0) & SR0_TFS)) 184 ; 185 186 data[0] = (u_int8_t)FRAME_SOF; 187 data[1] = (u_int8_t)((id << 4) | size); 188 checksum = data[1]; 189 i = 2; 190 while (size--) { 191 data[i++] = *buf; 192 checksum += (u_int8_t)(*buf++); 193 } 194 data[length-1] = checksum; 195 196 while (! (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_SR1) & SR1_TNF)) 197 ; 198 i = 0; 199 while (i < length) 200 bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACOM_DR, data[i++]); 201 202 delay(10000); 203 #if 0 204 while (! (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_SR0) & 205 (SR0_RID | SR0_RFS))) 206 #endif 207 rxbuf->state = STATE_SOF; 208 while (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_SR1) & SR1_RNE) { 209 210 rx_data = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACOM_DR); 211 DPRINTF(("DATA = %x\n", rx_data)); 212 213 switch (rxbuf->state) { 214 case STATE_SOF: 215 if (rx_data == FRAME_SOF) 216 rxbuf->state = STATE_ID; 217 break; 218 case STATE_ID: 219 rxbuf->id = (rx_data & 0xf0) >> 4; 220 rxbuf->len = rx_data & 0x0f; 221 rxbuf->idx = 0; 222 rxbuf->checksum = rx_data; 223 rxbuf->state = (rxbuf->len > 0 ) ? STATE_DATA : STATE_EOF; 224 break; 225 case STATE_DATA: 226 rxbuf->checksum += rx_data; 227 rxbuf->data[rxbuf->idx] = rx_data; 228 if (++rxbuf->idx == rxbuf->len) 229 rxbuf->state = STATE_EOF; 230 break; 231 case STATE_EOF: 232 rxbuf->state = STATE_SOF; 233 if (rx_data == FRAME_EOF || rx_data == rxbuf->checksum) 234 DPRINTF(("frame EOF\n")); 235 else 236 DPRINTF(("BadFrame\n")); 237 break; 238 default: 239 break; 240 } 241 } 242 } 243
Indexes created Wed Sep 24 14:09:57 GMT 2025