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ipaq_gpioreg.h revision 1.3
      1  1.3  ichiro /*	$NetBSD: ipaq_gpioreg.h,v 1.3 2001/07/15 00:30:17 ichiro Exp $	*/
      2  1.1  ichiro 
      3  1.1  ichiro /*-
      4  1.1  ichiro  * Copyright (c) 2001 The NetBSD Foundation, Inc.  All rights reserved.
      5  1.1  ichiro  *
      6  1.1  ichiro  * This code is derived from software contributed to The NetBSD Foundation
      7  1.1  ichiro  * by Ichiro FUKUHARA (ichiro (at) ichiro.org).
      8  1.1  ichiro  *
      9  1.1  ichiro  * Redistribution and use in source and binary forms, with or without
     10  1.1  ichiro  * modification, are permitted provided that the following conditions
     11  1.1  ichiro  * are met:
     12  1.1  ichiro  * 1. Redistributions of source code must retain the above copyright
     13  1.1  ichiro  *    notice, this list of conditions and the following disclaimer.
     14  1.1  ichiro  * 2. Redistributions in binary form must reproduce the above copyright
     15  1.1  ichiro  *    notice, this list of conditions and the following disclaimer in the
     16  1.1  ichiro  *    documentation and/or other materials provided with the distribution.
     17  1.1  ichiro  * 3. All advertising materials mentioning features or use of this software
     18  1.1  ichiro  *    must display the following acknowledgement:
     19  1.1  ichiro  *	This product includes software developed by the NetBSD
     20  1.1  ichiro  *	Foundation, Inc. and its contributors.
     21  1.1  ichiro  * 4. Neither the name of The NetBSD Foundation nor the names of its
     22  1.1  ichiro  *    contributors may be used to endorse or promote products derived
     23  1.1  ichiro  *    from this software without specific prior written permission.
     24  1.1  ichiro  *
     25  1.1  ichiro  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     26  1.1  ichiro  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     27  1.1  ichiro  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     28  1.1  ichiro  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     29  1.1  ichiro  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     30  1.1  ichiro  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     31  1.1  ichiro  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     32  1.1  ichiro  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     33  1.1  ichiro  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     34  1.1  ichiro  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     35  1.1  ichiro  * POSSIBILITY OF SUCH DAMAGE.
     36  1.1  ichiro  */
     37  1.1  ichiro 
     38  1.1  ichiro /*
     39  1.1  ichiro  * iPAQ H3600 specific parameter
     40  1.1  ichiro  */
     41  1.1  ichiro /*
     42  1.1  ichiro port	I/O(Active)	name 	desc
     43  1.1  ichiro 0	I(L)	PWR_ON#		button detect: power-on
     44  1.1  ichiro 1	I(L)	IP_IRQ#		cpu-interrupt
     45  1.1  ichiro 2...9	O	LDD{8..15}	LCD DATA(8-15)
     46  1.1  ichiro 10	I(L)	CARD_IND1#	PCMCIA Socket1 inserted detection
     47  1.1  ichiro 11	I(L)	CARD_IRQ1#	PCMCIA slot1 IRQ
     48  1.1  ichiro 12	O	CLK_SET0	clock select 0 for audio codec
     49  1.1  ichiro 13	O	CLK_SET1	clock select 1 for audio codec
     50  1.1  ichiro 14	I/O	L3_SDA		UDA1341 L3DATA
     51  1.1  ichiro 15	O	L3_MODE		UDA1341 L3MODE
     52  1.1  ichiro 16	O	L3_SCLK		UDA1341 L3SCLK
     53  1.1  ichiro 17	I(L)	CARD_IND0#	PCMCIA Socket0 inserted detection
     54  1.1  ichiro 18	I(L)	KEY_ACT#	button detect: center button
     55  1.1  ichiro 19	I	SYS_CLK		Stereo audio codev external clock
     56  1.1  ichiro 20	I(H)	BAT_FAULT	Battery fault
     57  1.1  ichiro 21	I(L)	CARD_IRQ0#	PCMCIA slot0 IRQ
     58  1.1  ichiro 22	I(L)	LOCK#		expansion pack lock/unlock signal
     59  1.1  ichiro 23	I(H)	COM_DCD		RS-232 DCD
     60  1.1  ichiro 24	I(H)	OPT_IRQ		expansion pach shared IRQ
     61  1.1  ichiro 25	I(H)	COM_CTS		RS-232 CTS
     62  1.1  ichiro 26	O(H)	COM_RTS		RS-232 RTS
     63  1.1  ichiro 27	O(L)	OPT_DETECT#	Indicates presence of expansion pack inserted
     64  1.1  ichiro 
     65  1.1  ichiro Extended GPIO
     66  1.1  ichiro 0	O(H)	VPEN		Enables programming and erasing of Flash
     67  1.1  ichiro 1	O(H)	CARD_RESET	CF/PCMCIA card reset signal
     68  1.1  ichiro 2	O(H)	OPT_RESET	Expansion pack reset signal
     69  1.1  ichiro 3	O(L)	CODEC_RESET#	onboard codec reset signal
     70  1.1  ichiro 4	O(H)	OPT_NVRAM_ON	Enables power supply to the NVRAM of the
     71  1.1  ichiro 				Expansion pack.(=OPT_ON)
     72  1.1  ichiro 5	O(H)	OPT_ON		Enables full power supply to the Expansion pack.
     73  1.1  ichiro 6	O(H)	LCD_ON		Enables LCD 3.3V power supply
     74  1.1  ichiro 7	O(H)	RS232_ON	Enables RS232
     75  1.1  ichiro 8	O(H)	LCD_PCI		Enables power to LCD control IC
     76  1.1  ichiro 9	O(H)	IR_ON		Enables power to IR module
     77  1.1  ichiro 10	O(H)	AUD_ON		Enables power to audio output amp.
     78  1.1  ichiro 11	O(H)	AUD_PWR_ON	Enables power to all audio modules.
     79  1.1  ichiro 12	O(H)	QMUTE		Mutes yhe onboard audio codec
     80  1.1  ichiro 13	O	IR_FSEL		FIR mode selection:H=FIR,L=SIR
     81  1.1  ichiro 14	O(H)	LCD_5V_ON	Enables 5V to the LCD module
     82  1.1  ichiro 15	O(H)	LVDD_ON		Enables 9V and -6.5V to the LCD module
     83  1.1  ichiro  */
     84  1.1  ichiro 
     85  1.1  ichiro #define GPIO_H3600_POWER_BUTTON	GPIO (0)
     86  1.1  ichiro #define GPIO_H3600_PCMCIA_CD0	GPIO (17)
     87  1.1  ichiro #define GPIO_H3600_PCMCIA_CD1	GPIO (10)
     88  1.1  ichiro #define GPIO_H3600_PCMCIA_IRQ0	GPIO (21)
     89  1.1  ichiro #define GPIO_H3600_PCMCIA_IRQ1	GPIO (11)
     90  1.1  ichiro #define GPIO_H3600_OPT_LOCK	GPIO (22)
     91  1.1  ichiro #define GPIO_H3600_OPT_IRQ	GPIO (24)
     92  1.1  ichiro #define GPIO_H3600_OPT_DETECT	GPIO (27)
     93  1.1  ichiro 
     94  1.1  ichiro #define EGPIO_H3600_VPEN		GPIO (0)
     95  1.1  ichiro #define EGPIO_H3600_CARD_RESET		GPIO (1)
     96  1.1  ichiro #define EGPIO_H3600_OPT_RESET		GPIO (2)
     97  1.1  ichiro #define EGPIO_H3600_CODEC_RESET		GPIO (3)
     98  1.1  ichiro #define EGPIO_H3600_OPT_NVRAM_ON	GPIO (4)
     99  1.1  ichiro #define EGPIO_H3600_OPT_ON		GPIO (5)
    100  1.1  ichiro #define EGPIO_H3600_LCD33_ON		GPIO (6)
    101  1.1  ichiro #define EGPIO_H3600_RS232_ON		GPIO (7)
    102  1.1  ichiro #define EGPIO_H3600_LCD_PCI		GPIO (8)
    103  1.1  ichiro #define EGPIO_H3600_IR_ON		GPIO (9)
    104  1.1  ichiro #define EGPIO_H3600_AUD_ON		GPIO (10)
    105  1.1  ichiro #define EGPIO_H3600_AUD_PWRON		GPIO (11)
    106  1.1  ichiro #define EGPIO_H3600_QMUTE		GPIO (12)
    107  1.1  ichiro #define EGPIO_H3600_IR_FSEL		GPIO (13)
    108  1.1  ichiro #define EGPIO_H3600_LCD5_ON		GPIO (14)
    109  1.1  ichiro #define EGPIO_H3600_LVDD_ON		GPIO (15)
    110  1.1  ichiro 
    111  1.3  ichiro #define EGPIO_INIT	EGPIO_H3600_RS232_ON| \
    112  1.3  ichiro 			EGPIO_H3600_AUD_PWRON| \
    113  1.3  ichiro 			EGPIO_H3600_QMUTE| \
    114  1.3  ichiro 			EGPIO_H3600_AUD_ON
    115  1.1  ichiro 
    116  1.1  ichiro #define EGPIO_LCD_INIT	EGPIO_H3600_LCD33_ON| \
    117  1.1  ichiro 			EGPIO_H3600_LCD_PCI| \
    118  1.1  ichiro 			EGPIO_H3600_LCD5_ON| \
    119  1.1  ichiro 			EGPIO_H3600_LVDD_ON
    120