ipaq_gpioreg.h revision 1.1
1 /* $NetBSD: ipaq_gpioreg.h,v 1.1 2001/07/10 14:58:28 ichiro Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Ichiro FUKUHARA (ichiro (at) ichiro.org). 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the NetBSD 20 * Foundation, Inc. and its contributors. 21 * 4. Neither the name of The NetBSD Foundation nor the names of its 22 * contributors may be used to endorse or promote products derived 23 * from this software without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 26 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 #define GPIO(x) (0x00000001 << (x)) 39 40 /* 41 * iPAQ H3600 specific parameter 42 */ 43 /* 44 port I/O(Active) name desc 45 0 I(L) PWR_ON# button detect: power-on 46 1 I(L) IP_IRQ# cpu-interrupt 47 2...9 O LDD{8..15} LCD DATA(8-15) 48 10 I(L) CARD_IND1# PCMCIA Socket1 inserted detection 49 11 I(L) CARD_IRQ1# PCMCIA slot1 IRQ 50 12 O CLK_SET0 clock select 0 for audio codec 51 13 O CLK_SET1 clock select 1 for audio codec 52 14 I/O L3_SDA UDA1341 L3DATA 53 15 O L3_MODE UDA1341 L3MODE 54 16 O L3_SCLK UDA1341 L3SCLK 55 17 I(L) CARD_IND0# PCMCIA Socket0 inserted detection 56 18 I(L) KEY_ACT# button detect: center button 57 19 I SYS_CLK Stereo audio codev external clock 58 20 I(H) BAT_FAULT Battery fault 59 21 I(L) CARD_IRQ0# PCMCIA slot0 IRQ 60 22 I(L) LOCK# expansion pack lock/unlock signal 61 23 I(H) COM_DCD RS-232 DCD 62 24 I(H) OPT_IRQ expansion pach shared IRQ 63 25 I(H) COM_CTS RS-232 CTS 64 26 O(H) COM_RTS RS-232 RTS 65 27 O(L) OPT_DETECT# Indicates presence of expansion pack inserted 66 67 Extended GPIO 68 0 O(H) VPEN Enables programming and erasing of Flash 69 1 O(H) CARD_RESET CF/PCMCIA card reset signal 70 2 O(H) OPT_RESET Expansion pack reset signal 71 3 O(L) CODEC_RESET# onboard codec reset signal 72 4 O(H) OPT_NVRAM_ON Enables power supply to the NVRAM of the 73 Expansion pack.(=OPT_ON) 74 5 O(H) OPT_ON Enables full power supply to the Expansion pack. 75 6 O(H) LCD_ON Enables LCD 3.3V power supply 76 7 O(H) RS232_ON Enables RS232 77 8 O(H) LCD_PCI Enables power to LCD control IC 78 9 O(H) IR_ON Enables power to IR module 79 10 O(H) AUD_ON Enables power to audio output amp. 80 11 O(H) AUD_PWR_ON Enables power to all audio modules. 81 12 O(H) QMUTE Mutes yhe onboard audio codec 82 13 O IR_FSEL FIR mode selection:H=FIR,L=SIR 83 14 O(H) LCD_5V_ON Enables 5V to the LCD module 84 15 O(H) LVDD_ON Enables 9V and -6.5V to the LCD module 85 */ 86 87 #define GPIO_H3600_POWER_BUTTON GPIO (0) 88 #define GPIO_H3600_PCMCIA_CD0 GPIO (17) 89 #define GPIO_H3600_PCMCIA_CD1 GPIO (10) 90 #define GPIO_H3600_PCMCIA_IRQ0 GPIO (21) 91 #define GPIO_H3600_PCMCIA_IRQ1 GPIO (11) 92 #define GPIO_H3600_OPT_LOCK GPIO (22) 93 #define GPIO_H3600_OPT_IRQ GPIO (24) 94 #define GPIO_H3600_OPT_DETECT GPIO (27) 95 96 #define EGPIO_H3600_VPEN GPIO (0) 97 #define EGPIO_H3600_CARD_RESET GPIO (1) 98 #define EGPIO_H3600_OPT_RESET GPIO (2) 99 #define EGPIO_H3600_CODEC_RESET GPIO (3) 100 #define EGPIO_H3600_OPT_NVRAM_ON GPIO (4) 101 #define EGPIO_H3600_OPT_ON GPIO (5) 102 #define EGPIO_H3600_LCD33_ON GPIO (6) 103 #define EGPIO_H3600_RS232_ON GPIO (7) 104 #define EGPIO_H3600_LCD_PCI GPIO (8) 105 #define EGPIO_H3600_IR_ON GPIO (9) 106 #define EGPIO_H3600_AUD_ON GPIO (10) 107 #define EGPIO_H3600_AUD_PWRON GPIO (11) 108 #define EGPIO_H3600_QMUTE GPIO (12) 109 #define EGPIO_H3600_IR_FSEL GPIO (13) 110 #define EGPIO_H3600_LCD5_ON GPIO (14) 111 #define EGPIO_H3600_LVDD_ON GPIO (15) 112 113 #define EGPIO_INIT (EGPIO_H3600_OPT_NVRAM_ON| \ 114 EGPIO_H3600_LCD33_ON| \ 115 EGPIO_H3600_LCD_PCI| \ 116 EGPIO_H3600_AUD_ON) & 0xFFFF 117 118 #define EGPIO_LCD_INIT EGPIO_H3600_LCD33_ON| \ 119 EGPIO_H3600_LCD_PCI| \ 120 EGPIO_H3600_LCD5_ON| \ 121 EGPIO_H3600_LVDD_ON 122
Indexes created Tue Sep 30 20:09:53 GMT 2025