ipaq_lcd.c revision 1.10
1 /* $NetBSD: ipaq_lcd.c,v 1.10 2002/10/02 05:18:51 thorpej Exp $ */ 2 #define IPAQ_LCD_DEBUG 3 4 /* 5 * Copyright (c) 2001 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Ichiro FUKUHARA (ichiro (at) ichiro.org). 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 #include <sys/types.h> 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/kernel.h> 44 #include <sys/time.h> 45 #include <sys/device.h> 46 47 #include <uvm/uvm_extern.h> 48 49 #include <dev/wscons/wsconsio.h> 50 51 #include <machine/bootinfo.h> 52 #include <machine/bus.h> 53 #include <machine/intr.h> 54 #include <arm/cpufunc.h> 55 #include <arm/arm32/katelib.h> 56 57 #include <hpcarm/sa11x0/sa11x0_reg.h> 58 #include <hpcarm/sa11x0/sa11x0_gpioreg.h> 59 60 #include <hpcarm/dev/ipaq_gpioreg.h> 61 #include <hpcarm/dev/ipaq_saipvar.h> 62 #include <hpcarm/dev/ipaq_lcdreg.h> 63 #include <hpcarm/dev/ipaq_lcdvar.h> 64 65 #ifdef IPAQ_LCD_DEBUG 66 #define DPRINTFN(n, x) if (ipaqlcddebug > (n)) printf x 67 int ipaqlcddebug = 0xff; 68 #else 69 #define DPRINTFN(n, x) 70 #endif 71 #define DPRINTF(x) DPRINTFN(0, x) 72 73 static int ipaqlcd_match(struct device *, struct cfdata *, void *); 74 static void ipaqlcd_attach(struct device *, struct device *, void *); 75 static void ipaqlcd_init(struct ipaqlcd_softc *); 76 static int ipaqlcd_fbinit(struct ipaqlcd_softc *); 77 static int ipaqlcd_ioctl(void *, u_long, caddr_t, int, struct proc *); 78 static paddr_t ipaqlcd_mmap(void *, off_t offset, int); 79 80 #if defined __mips__ || defined __sh__ || defined __arm__ 81 #define __BTOP(x) ((paddr_t)(x) >> PGSHIFT) 82 #define __PTOB(x) ((paddr_t)(x) << PGSHIFT) 83 #else 84 #error "define btop, ptob." 85 #endif 86 87 CFATTACH_DECL(ipaqlcd, sizeof(struct ipaqlcd_softc), 88 ipaqlcd_match, ipaqlcd_attach, NULL, NULL); 89 90 struct hpcfb_accessops ipaqlcd_ha = { 91 ipaqlcd_ioctl, ipaqlcd_mmap 92 }; 93 static int console_flag = 0; 94 95 static int 96 ipaqlcd_match(parent, match, aux) 97 struct device *parent; 98 struct cfdata *match; 99 void *aux; 100 { 101 return (1); 102 } 103 104 void 105 ipaqlcd_attach(parent, self, aux) 106 struct device *parent; 107 struct device *self; 108 void *aux; 109 { 110 struct ipaqlcd_softc *sc = (struct ipaqlcd_softc*)self; 111 struct hpcfb_attach_args ha; 112 struct ipaq_softc *psc = (struct ipaq_softc *)parent; 113 114 sc->sc_iot = psc->sc_iot; 115 sc->sc_parent = (struct ipaq_softc *)parent; 116 117 ipaqlcd_init(sc); 118 ipaqlcd_fbinit(sc); 119 120 printf("\n"); 121 printf("%s: iPAQ internal LCD controller\n", sc->sc_dev.dv_xname); 122 123 DPRINTF(("framebuffer_baseaddr=%lx\n", (u_long)bootinfo->fb_addr)); 124 125 ha.ha_console = console_flag; 126 ha.ha_accessops = &ipaqlcd_ha; 127 ha.ha_accessctx = sc; 128 ha.ha_curfbconf = 0; 129 ha.ha_nfbconf = 1; 130 ha.ha_fbconflist = &sc->sc_fbconf; 131 ha.ha_curdspconf = 0; 132 ha.ha_ndspconf = 1; 133 ha.ha_dspconflist = &sc->sc_dspconf; 134 135 config_found(&sc->sc_dev, &ha, hpcfbprint); 136 } 137 138 void 139 ipaqlcd_init(sc) 140 struct ipaqlcd_softc *sc; 141 { 142 /* Initialization of Extended GPIO */ 143 sc->sc_parent->ipaq_egpio |= EGPIO_LCD_INIT; 144 bus_space_write_2(sc->sc_iot, sc->sc_parent->sc_egpioh, 145 0, sc->sc_parent->ipaq_egpio); 146 147 if (bus_space_map(sc->sc_iot, SALCD_BASE, SALCD_NPORTS, 148 0, &sc->sc_ioh)) 149 panic("ipaqlcd_init:Cannot map registers"); 150 151 (u_long)bootinfo->fb_addr = 152 bus_space_read_4(sc->sc_iot, sc->sc_ioh, SALCD_BA1); 153 154 /* 155 * Initialize LCD Control Register 0 - 3 156 * must initialize DMA Channel Base Address Register 157 * before enabling LCD(LEN = 1) 158 */ 159 bus_space_write_4(sc->sc_iot, sc->sc_ioh, 160 SALCD_CR1, IPAQ_LCCR1); 161 bus_space_write_4(sc->sc_iot, sc->sc_ioh, 162 SALCD_CR2, IPAQ_LCCR2); 163 bus_space_write_4(sc->sc_iot, sc->sc_ioh, 164 SALCD_CR3, IPAQ_LCCR3); 165 bus_space_write_4(sc->sc_iot, sc->sc_ioh, 166 SALCD_CR0, IPAQ_LCCR0); 167 168 DPRINTF(("\n" 169 "DMA_BASE= %08x : DMA_CUR = %08x \n" 170 "LCCR0 = %08x : LCCR1 = %08x \n" 171 "LCCR2 = %08x : LCCR3 = %08x", 172 bus_space_read_4(sc->sc_iot, sc->sc_ioh, SALCD_BA1), 173 bus_space_read_4(sc->sc_iot, sc->sc_ioh, SALCD_CA1), 174 bus_space_read_4(sc->sc_iot, sc->sc_ioh, SALCD_CR0), 175 bus_space_read_4(sc->sc_iot, sc->sc_ioh, SALCD_CR1), 176 bus_space_read_4(sc->sc_iot, sc->sc_ioh, SALCD_CR2), 177 bus_space_read_4(sc->sc_iot, sc->sc_ioh, SALCD_CR3))); 178 179 } 180 181 int 182 ipaqlcd_fbinit(sc) 183 struct ipaqlcd_softc *sc; 184 { 185 struct hpcfb_fbconf *fb; 186 187 fb = &sc->sc_fbconf; 188 189 /* Initialize fb */ 190 memset(fb, 0, sizeof(*fb)); 191 192 fb->hf_conf_index = 0; /* configuration index */ 193 fb->hf_nconfs = 1; 194 strcpy(fb->hf_name, "built-in video"); 195 strcpy(fb->hf_conf_name, "LCD"); 196 /* configuration name */ 197 fb->hf_height = bootinfo->fb_height; 198 fb->hf_width = bootinfo->fb_width; 199 200 if (bus_space_map(sc->sc_iot, (bus_addr_t)bootinfo->fb_addr, 201 bootinfo->fb_height * bootinfo->fb_line_bytes, 202 0, &fb->hf_baseaddr)) { 203 printf("unable to map framebuffer\n"); 204 return (-1); 205 } 206 207 fb->hf_offset = (u_long)bootinfo->fb_addr - 208 __PTOB(__BTOP(bootinfo->fb_addr)); 209 /* frame buffer start offset */ 210 fb->hf_bytes_per_line = bootinfo->fb_line_bytes; 211 fb->hf_nplanes = 1; 212 fb->hf_bytes_per_plane = bootinfo->fb_height * 213 bootinfo->fb_line_bytes; 214 215 fb->hf_access_flags |= HPCFB_ACCESS_BYTE; 216 fb->hf_access_flags |= HPCFB_ACCESS_WORD; 217 fb->hf_access_flags |= HPCFB_ACCESS_DWORD; 218 219 switch (bootinfo->fb_type) { 220 /* 221 * gray scale 222 */ 223 case BIFB_D2_M2L_3: 224 case BIFB_D2_M2L_3x2: 225 fb->hf_access_flags |= HPCFB_ACCESS_REVERSE; 226 case BIFB_D2_M2L_0: 227 case BIFB_D2_M2L_0x2: 228 fb->hf_class = HPCFB_CLASS_GRAYSCALE; 229 break; 230 case BIFB_D4_M2L_F: 231 case BIFB_D4_M2L_Fx2: 232 fb->hf_access_flags |= HPCFB_ACCESS_REVERSE; 233 case BIFB_D4_M2L_0: 234 case BIFB_D4_M2L_0x2: 235 fb->hf_class = HPCFB_CLASS_GRAYSCALE; 236 break; 237 /* 238 * indexed color 239 */ 240 case BIFB_D8_FF: 241 case BIFB_D8_00: 242 fb->hf_offset = 0x200; 243 break; 244 /* 245 * RGB color 246 */ 247 case BIFB_D16_FFFF: 248 case BIFB_D16_0000: 249 fb->hf_class = HPCFB_CLASS_RGBCOLOR; 250 fb->hf_access_flags |= HPCFB_ACCESS_STATIC; 251 fb->hf_order_flags = HPCFB_REVORDER_BYTE; 252 fb->hf_pack_width = 16; 253 fb->hf_pixels_per_pack = 1; 254 fb->hf_pixel_width = 16; 255 256 fb->hf_class_data_length = sizeof(struct hf_rgb_tag); 257 fb->hf_u.hf_rgb.hf_flags = 0; 258 /* reserved for future use */ 259 fb->hf_u.hf_rgb.hf_red_width = 5; 260 fb->hf_u.hf_rgb.hf_red_shift = 11; 261 fb->hf_u.hf_rgb.hf_green_width = 6; 262 fb->hf_u.hf_rgb.hf_green_shift = 5; 263 fb->hf_u.hf_rgb.hf_blue_width = 5; 264 fb->hf_u.hf_rgb.hf_blue_shift = 0; 265 fb->hf_u.hf_rgb.hf_alpha_width = 0; 266 fb->hf_u.hf_rgb.hf_alpha_shift = 0; 267 break; 268 default : 269 printf("unknown type (=%d).\n", bootinfo->fb_type); 270 return (-1); 271 break; 272 } 273 274 return(0); 275 } 276 277 int 278 ipaqlcd_ioctl(v, cmd, data, flag, p) 279 void *v; 280 u_long cmd; 281 caddr_t data; 282 int flag; 283 struct proc *p; 284 { 285 struct ipaqlcd_softc *sc = (struct ipaqlcd_softc *)v; 286 struct hpcfb_fbconf *fbconf; 287 struct hpcfb_dspconf *dspconf; 288 struct wsdisplay_cmap *cmap; 289 struct wsdisplay_param *dispparam; 290 291 switch (cmd) { 292 case WSDISPLAYIO_GETCMAP: 293 cmap = (struct wsdisplay_cmap*)data; 294 295 if (sc->sc_fbconf.hf_class != HPCFB_CLASS_INDEXCOLOR || 296 sc->sc_fbconf.hf_pack_width != 8 || 297 256 <= cmap->index || 298 256 < (cmap->index + cmap->count)) 299 return (EINVAL); 300 return (0); 301 case WSDISPLAYIO_PUTCMAP: 302 return (EINVAL); 303 case WSDISPLAYIO_GETPARAM: 304 dispparam = (struct wsdisplay_param*)data; 305 switch (dispparam->param) { 306 case WSDISPLAYIO_PARAM_BACKLIGHT: 307 DPRINTF(("ipaqlcd_ioctl: GETPARAM:BACKLIGHT\n")); 308 return (EINVAL); 309 case WSDISPLAYIO_PARAM_CONTRAST: 310 DPRINTF(("ipaqlcd_ioctl: GETPARAM:CONTRAST\n")); 311 return (EINVAL); 312 case WSDISPLAYIO_PARAM_BRIGHTNESS: 313 DPRINTF(("ipaqlcd_ioctl: GETPARAM:BRIGHTNESS\n")); 314 return (EINVAL); 315 default: 316 return (EINVAL); 317 } 318 return (0); 319 case WSDISPLAYIO_SETPARAM: 320 dispparam = (struct wsdisplay_param*)data; 321 switch (dispparam->param) { 322 case WSDISPLAYIO_PARAM_BACKLIGHT: 323 DPRINTF(("ipaqlcd_ioctl: GETPARAM:BACKLIGHT\n")); 324 return (EINVAL); 325 case WSDISPLAYIO_PARAM_CONTRAST: 326 DPRINTF(("ipaqlcd_ioctl: GETPARAM:CONTRAST\n")); 327 return (EINVAL); 328 case WSDISPLAYIO_PARAM_BRIGHTNESS: 329 DPRINTF(("ipaqlcd_ioctl: GETPARAM:BRIGHTNESS\n")); 330 return (EINVAL); 331 default: 332 return (EINVAL); 333 } 334 return (0); 335 336 case HPCFBIO_GCONF: 337 fbconf = (struct hpcfb_fbconf *)data; 338 if (fbconf->hf_conf_index != 0 && 339 fbconf->hf_conf_index != HPCFB_CURRENT_CONFIG) { 340 return (EINVAL); 341 } 342 *fbconf = sc->sc_fbconf; /* structure assignment */ 343 return (0); 344 case HPCFBIO_SCONF: 345 fbconf = (struct hpcfb_fbconf *)data; 346 if (fbconf->hf_conf_index != 0 && 347 fbconf->hf_conf_index != HPCFB_CURRENT_CONFIG) { 348 return (EINVAL); 349 } 350 /* 351 * nothing to do because we have only one configration 352 */ 353 return (0); 354 case HPCFBIO_GDSPCONF: 355 dspconf = (struct hpcfb_dspconf *)data; 356 if ((dspconf->hd_unit_index != 0 && 357 dspconf->hd_unit_index != HPCFB_CURRENT_UNIT) || 358 (dspconf->hd_conf_index != 0 && 359 dspconf->hd_conf_index != HPCFB_CURRENT_CONFIG)) { 360 return (EINVAL); 361 } 362 *dspconf = sc->sc_dspconf; /* structure assignment */ 363 return (0); 364 case HPCFBIO_SDSPCONF: 365 dspconf = (struct hpcfb_dspconf *)data; 366 if ((dspconf->hd_unit_index != 0 && 367 dspconf->hd_unit_index != HPCFB_CURRENT_UNIT) || 368 (dspconf->hd_conf_index != 0 && 369 dspconf->hd_conf_index != HPCFB_CURRENT_CONFIG)) { 370 return (EINVAL); 371 } 372 /* 373 * nothing to do 374 * because we have only one unit and one configration 375 */ 376 return (0); 377 378 case HPCFBIO_GOP: 379 case HPCFBIO_SOP: 380 return (EINVAL); 381 } 382 return (EPASSTHROUGH); 383 } 384 385 paddr_t 386 ipaqlcd_mmap(ctx, offset, prot) 387 void *ctx; 388 off_t offset; 389 int prot; 390 { 391 struct ipaqlcd_softc *sc = (struct ipaqlcd_softc *)ctx; 392 393 if (offset < 0 || 394 (sc->sc_fbconf.hf_bytes_per_plane + 395 sc->sc_fbconf.hf_offset) < offset) 396 return -1; 397 398 return __BTOP((u_long)bootinfo->fb_addr + offset); 399 } 400
Indexes created Tue Sep 23 07:09:52 GMT 2025