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      1  1.24  thorpej /*      $NetBSD: ipaq_pcic.c,v 1.24 2023/12/20 14:50:02 thorpej Exp $        */
      2   1.1   ichiro 
      3   1.1   ichiro /*-
      4   1.1   ichiro  * Copyright (c) 2001 The NetBSD Foundation, Inc.
      5   1.1   ichiro  * All rights reserved.
      6   1.1   ichiro  *
      7   1.1   ichiro  * This code is derived from software contributed to The NetBSD Foundation
      8   1.1   ichiro  * by Ichiro FUKUHARA (ichiro (at) ichiro.org).
      9   1.1   ichiro  *
     10   1.1   ichiro  * Redistribution and use in source and binary forms, with or without
     11   1.1   ichiro  * modification, are permitted provided that the following conditions
     12   1.1   ichiro  * are met:
     13   1.1   ichiro  * 1. Redistributions of source code must retain the above copyright
     14   1.1   ichiro  *    notice, this list of conditions and the following disclaimer.
     15   1.1   ichiro  * 2. Redistributions in binary form must reproduce the above copyright
     16   1.1   ichiro  *    notice, this list of conditions and the following disclaimer in the
     17   1.1   ichiro  *    documentation and/or other materials provided with the distribution.
     18   1.1   ichiro  *
     19   1.1   ichiro  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20   1.1   ichiro  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21   1.1   ichiro  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22   1.1   ichiro  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23   1.1   ichiro  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24   1.1   ichiro  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25   1.1   ichiro  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26   1.1   ichiro  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27   1.1   ichiro  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28   1.1   ichiro  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29   1.1   ichiro  * POSSIBILITY OF SUCH DAMAGE.
     30   1.1   ichiro  */
     31  1.12    lukem 
     32  1.12    lukem #include <sys/cdefs.h>
     33  1.24  thorpej __KERNEL_RCSID(0, "$NetBSD: ipaq_pcic.c,v 1.24 2023/12/20 14:50:02 thorpej Exp $");
     34   1.1   ichiro 
     35   1.1   ichiro #include <sys/param.h>
     36   1.1   ichiro #include <sys/systm.h>
     37   1.1   ichiro #include <sys/types.h>
     38   1.1   ichiro #include <sys/conf.h>
     39   1.1   ichiro #include <sys/file.h>
     40   1.1   ichiro #include <sys/device.h>
     41   1.1   ichiro #include <sys/kernel.h>
     42   1.1   ichiro #include <sys/kthread.h>
     43  1.20   dyoung #include <sys/bus.h>
     44   1.1   ichiro 
     45   1.1   ichiro #include <dev/pcmcia/pcmciachip.h>
     46   1.1   ichiro #include <dev/pcmcia/pcmciavar.h>
     47   1.1   ichiro 
     48   1.1   ichiro #include <hpcarm/dev/ipaq_saipvar.h>
     49   1.1   ichiro #include <hpcarm/dev/ipaq_pcicreg.h>
     50   1.1   ichiro #include <hpcarm/dev/ipaq_gpioreg.h>
     51   1.7   ichiro 
     52   1.7   ichiro #include <arm/sa11x0/sa11x0_gpioreg.h>
     53   1.7   ichiro #include <arm/sa11x0/sa11x0_var.h>
     54   1.7   ichiro #include <arm/sa11x0/sa11xx_pcicvar.h>
     55   1.1   ichiro 
     56   1.1   ichiro #include "ipaqpcic.h"
     57   1.1   ichiro 
     58  1.19      rjs static	int	ipaqpcic_match(device_t, cfdata_t, void *);
     59  1.19      rjs static	void	ipaqpcic_attach(device_t, device_t, void *);
     60   1.1   ichiro static	int	ipaqpcic_print(void *, const char *);
     61   1.1   ichiro 
     62   1.1   ichiro static	int	ipaqpcic_read(struct sapcic_socket *, int);
     63   1.1   ichiro static	void	ipaqpcic_write(struct sapcic_socket *, int, int);
     64   1.1   ichiro static	void	ipaqpcic_set_power(struct sapcic_socket *, int);
     65   1.1   ichiro static	void	ipaqpcic_clear_intr(int);
     66   1.1   ichiro static	void	*ipaqpcic_intr_establish(struct sapcic_socket *, int,
     67   1.1   ichiro 				       int (*)(void *), void *);
     68   1.1   ichiro static	void	ipaqpcic_intr_disestablish(struct sapcic_socket *, void *);
     69   1.1   ichiro 
     70   1.1   ichiro struct ipaqpcic_softc {
     71   1.5   ichiro 	struct sapcic_softc	sc_pc;
     72   1.5   ichiro 	bus_space_handle_t	sc_ioh;
     73   1.5   ichiro 	struct ipaq_softc	*sc_parent;
     74   1.5   ichiro 	struct sapcic_socket	sc_socket[2];
     75   1.1   ichiro };
     76   1.1   ichiro 
     77   1.5   ichiro static	void	ipaqpcic_init(struct ipaqpcic_softc *);
     78   1.5   ichiro 
     79   1.1   ichiro static struct sapcic_tag ipaqpcic_functions = {
     80   1.1   ichiro 	ipaqpcic_read,
     81   1.1   ichiro 	ipaqpcic_write,
     82   1.1   ichiro 	ipaqpcic_set_power,
     83   1.1   ichiro 	ipaqpcic_clear_intr,
     84   1.1   ichiro 	ipaqpcic_intr_establish,
     85   1.1   ichiro 	ipaqpcic_intr_disestablish
     86   1.1   ichiro };
     87   1.1   ichiro 
     88  1.19      rjs CFATTACH_DECL_NEW(ipaqpcic, sizeof(struct ipaqpcic_softc),
     89  1.11  thorpej     ipaqpcic_match, ipaqpcic_attach, NULL, NULL);
     90   1.1   ichiro 
     91   1.1   ichiro static int
     92  1.19      rjs ipaqpcic_match(device_t parent, cfdata_t cf, void *aux)
     93   1.1   ichiro {
     94   1.1   ichiro 	return (1);
     95   1.1   ichiro }
     96   1.1   ichiro 
     97   1.1   ichiro static void
     98  1.19      rjs ipaqpcic_attach(device_t parent, device_t self, void *aux)
     99   1.1   ichiro {
    100   1.1   ichiro 	int i;
    101   1.1   ichiro 	struct pcmciabus_attach_args paa;
    102  1.19      rjs 	struct ipaqpcic_softc *sc = device_private(self);
    103  1.19      rjs 	struct ipaq_softc *psc = device_private(parent);
    104   1.1   ichiro 
    105  1.19      rjs 	aprint_normal("\n");
    106   1.1   ichiro 
    107  1.19      rjs 	sc->sc_pc.sc_dev = self;
    108   1.1   ichiro 	sc->sc_pc.sc_iot = psc->sc_iot;
    109   1.1   ichiro 	sc->sc_ioh = psc->sc_ioh;
    110  1.19      rjs 	sc->sc_parent = psc;
    111   1.1   ichiro 
    112   1.5   ichiro 	ipaqpcic_init(sc);
    113   1.1   ichiro 
    114   1.1   ichiro 	for(i = 0; i < 2; i++) {
    115   1.1   ichiro 		sc->sc_socket[i].sc = (struct sapcic_softc *)sc;
    116   1.1   ichiro 		sc->sc_socket[i].socket = i;
    117   1.3   toshii 		sc->sc_socket[i].pcictag_cookie = psc;
    118   1.1   ichiro 		sc->sc_socket[i].pcictag = &ipaqpcic_functions;
    119   1.1   ichiro 		sc->sc_socket[i].event_thread = NULL;
    120   1.1   ichiro 		sc->sc_socket[i].event = 0;
    121   1.1   ichiro 		sc->sc_socket[i].laststatus = SAPCIC_CARD_INVALID;
    122   1.1   ichiro 		sc->sc_socket[i].shutdown = 0;
    123   1.1   ichiro 
    124   1.1   ichiro 		paa.paa_busname = "pcmcia";
    125   1.1   ichiro 		paa.pct = (pcmcia_chipset_tag_t)&sa11x0_pcmcia_functions;
    126   1.1   ichiro 		paa.pch = (pcmcia_chipset_handle_t)&sc->sc_socket[i];
    127   1.1   ichiro 
    128   1.1   ichiro 		sc->sc_socket[i].pcmcia =
    129  1.22  thorpej 		    config_found(sc->sc_pc.sc_dev, &paa, ipaqpcic_print,
    130  1.23  thorpej 				 CFARGS_NONE);
    131   1.1   ichiro 
    132   1.1   ichiro 		sa11x0_intr_establish((sa11x0_chipset_tag_t)psc,
    133   1.1   ichiro 			    i ? IRQ_CD1 : IRQ_CD0,
    134   1.1   ichiro 			    1, IPL_BIO, sapcic_intr,
    135   1.1   ichiro 			    &sc->sc_socket[i]);
    136   1.1   ichiro 
    137   1.1   ichiro 		/* schedule kthread creation */
    138  1.16       ad 		sapcic_kthread_create(&sc->sc_socket[i]);
    139   1.1   ichiro 
    140   1.1   ichiro #if 0 /* XXX */
    141   1.1   ichiro 		/* establish_intr should be after creating the kthread */
    142   1.1   ichiro 		config_interrupt(&sc->sc_socket[i], ipaqpcic_config_intr);
    143   1.1   ichiro #endif
    144   1.1   ichiro 	}
    145   1.1   ichiro }
    146   1.1   ichiro 
    147   1.1   ichiro static int
    148  1.15      rjs ipaqpcic_print(void *aux, const char *name)
    149   1.1   ichiro {
    150   1.1   ichiro 	return (UNCONF);
    151   1.1   ichiro }
    152   1.1   ichiro 
    153   1.5   ichiro static void
    154  1.15      rjs ipaqpcic_init(struct ipaqpcic_softc *sc)
    155   1.5   ichiro {
    156   1.6   ichiro 	int cr;
    157   1.6   ichiro 
    158   1.6   ichiro 	/* All those are inputs */
    159   1.6   ichiro 	cr = bus_space_read_4(sc->sc_pc.sc_iot, sc->sc_parent->sc_gpioh, SAGPIO_PDR);
    160   1.6   ichiro 	cr &= ~(GPIO_H3600_PCMCIA_CD0 | GPIO_H3600_PCMCIA_CD1 | GPIO_H3600_PCMCIA_IRQ0 |
    161   1.6   ichiro 		GPIO_H3600_PCMCIA_IRQ1);
    162   1.6   ichiro 	bus_space_write_4(sc->sc_pc.sc_iot, sc->sc_parent->sc_gpioh, SAGPIO_PDR, cr);
    163   1.6   ichiro 
    164   1.5   ichiro 	sc->sc_parent->ipaq_egpio |=
    165   1.5   ichiro 		EGPIO_H3600_OPT_NVRAM_ON | EGPIO_H3600_OPT_ON ;
    166   1.5   ichiro 	sc->sc_parent->ipaq_egpio &=
    167   1.5   ichiro 		~(EGPIO_H3600_CARD_RESET | EGPIO_H3600_OPT_RESET);
    168   1.5   ichiro 	bus_space_write_2(sc->sc_pc.sc_iot, sc->sc_parent->sc_egpioh,
    169   1.5   ichiro 			  0, sc->sc_parent->ipaq_egpio);
    170   1.5   ichiro }
    171   1.1   ichiro 
    172   1.1   ichiro static int
    173  1.15      rjs ipaqpcic_read(struct sapcic_socket *so, int reg)
    174   1.1   ichiro {
    175   1.1   ichiro 	int cr, bit;
    176   1.1   ichiro 	struct ipaqpcic_softc *sc = (struct ipaqpcic_softc *)so->sc;
    177   1.1   ichiro 
    178   1.5   ichiro 	cr = bus_space_read_4(sc->sc_pc.sc_iot, sc->sc_parent->sc_gpioh, SAGPIO_PLR);
    179   1.1   ichiro 
    180   1.1   ichiro 	switch (reg) {
    181   1.1   ichiro 	case SAPCIC_STATUS_CARD:
    182   1.6   ichiro 		bit = (so->socket ? GPIO_H3600_PCMCIA_CD0 :
    183   1.6   ichiro 				GPIO_H3600_PCMCIA_CD1) & cr;
    184   1.6   ichiro 		if (!bit)
    185   1.1   ichiro 			return SAPCIC_CARD_INVALID;
    186   1.1   ichiro 		else
    187   1.1   ichiro 			return SAPCIC_CARD_VALID;
    188   1.1   ichiro 	case SAPCIC_STATUS_VS1:
    189   1.1   ichiro         case SAPCIC_STATUS_VS2:
    190   1.6   ichiro 	case SAPCIC_STATUS_READY:
    191   1.6   ichiro 		bit = (so->socket ? GPIO_H3600_PCMCIA_IRQ0:
    192   1.6   ichiro 				GPIO_H3600_PCMCIA_IRQ1);
    193   1.6   ichiro 		return (bit & cr);
    194   1.1   ichiro 	default:
    195   1.9   provos 		panic("ipaqpcic_read: bogus register");
    196   1.1   ichiro 	}
    197   1.1   ichiro }
    198   1.1   ichiro 
    199   1.1   ichiro static void
    200  1.15      rjs ipaqpcic_write(struct sapcic_socket *so, int reg, int arg)
    201   1.1   ichiro {
    202   1.5   ichiro 	int s;
    203   1.1   ichiro 	struct ipaqpcic_softc *sc = (struct ipaqpcic_softc *)so->sc;
    204   1.1   ichiro 
    205   1.1   ichiro 	s = splhigh();
    206   1.1   ichiro 	switch (reg) {
    207   1.1   ichiro 	case SAPCIC_CONTROL_RESET:
    208   1.5   ichiro 		sc->sc_parent->ipaq_egpio |= EGPIO_H3600_CARD_RESET;
    209   1.1   ichiro 		break;
    210   1.1   ichiro 	case SAPCIC_CONTROL_LINEENABLE:
    211   1.1   ichiro 	case SAPCIC_CONTROL_WAITENABLE:
    212   1.1   ichiro 	case SAPCIC_CONTROL_POWERSELECT:
    213   1.1   ichiro 		break;
    214   1.1   ichiro 
    215   1.1   ichiro 	default:
    216   1.1   ichiro 		splx(s);
    217   1.1   ichiro 		panic("ipaqpcic_write: bogus register");
    218   1.1   ichiro 	}
    219   1.5   ichiro 	bus_space_write_2(sc->sc_pc.sc_iot, sc->sc_parent->sc_egpioh, 0,
    220   1.5   ichiro 			  sc->sc_parent->ipaq_egpio);
    221   1.1   ichiro 	splx(s);
    222   1.1   ichiro }
    223   1.1   ichiro 
    224   1.1   ichiro static void
    225  1.15      rjs ipaqpcic_set_power(struct sapcic_socket *so, int arg)
    226   1.1   ichiro {
    227   1.5   ichiro 	int s;
    228   1.5   ichiro 	struct ipaqpcic_softc *sc = (struct ipaqpcic_softc *)so->sc;
    229   1.1   ichiro 
    230   1.1   ichiro 	s = splbio();
    231   1.1   ichiro 	switch (arg) {
    232   1.1   ichiro 	case SAPCIC_POWER_OFF:
    233   1.5   ichiro 		sc->sc_parent->ipaq_egpio &=
    234   1.5   ichiro 			~(EGPIO_H3600_OPT_NVRAM_ON | EGPIO_H3600_OPT_ON);
    235   1.1   ichiro 		break;
    236   1.1   ichiro 	case SAPCIC_POWER_3V:
    237   1.1   ichiro 	case SAPCIC_POWER_5V:
    238   1.5   ichiro 		sc->sc_parent->ipaq_egpio |=
    239   1.5   ichiro 			EGPIO_H3600_OPT_NVRAM_ON | EGPIO_H3600_OPT_ON;
    240   1.1   ichiro 		break;
    241   1.1   ichiro 	default:
    242   1.9   provos 		panic("ipaqpcic_set_power: bogus arg");
    243   1.1   ichiro 	}
    244   1.5   ichiro 	bus_space_write_2(sc->sc_pc.sc_iot, sc->sc_parent->sc_egpioh,
    245   1.5   ichiro 			  0, sc->sc_parent->ipaq_egpio);
    246   1.1   ichiro 	splx(s);
    247   1.1   ichiro }
    248   1.1   ichiro 
    249   1.1   ichiro static void
    250  1.15      rjs ipaqpcic_clear_intr(int arg)
    251   1.1   ichiro {
    252   1.1   ichiro }
    253   1.1   ichiro 
    254   1.1   ichiro static void *
    255  1.15      rjs ipaqpcic_intr_establish(struct sapcic_socket *so, int level,
    256  1.15      rjs 			int (*ih_fun)(void *), void *ih_arg)
    257   1.1   ichiro {
    258   1.1   ichiro 	int irq;
    259   1.1   ichiro 
    260   1.1   ichiro 	irq = so->socket ? IRQ_IRQ0 : IRQ_IRQ1;
    261   1.3   toshii 	return (sa11x0_intr_establish((sa11x0_chipset_tag_t)so->pcictag_cookie,
    262   1.1   ichiro 				    irq-16, 1, level, ih_fun, ih_arg));
    263   1.1   ichiro }
    264   1.1   ichiro 
    265   1.1   ichiro static void
    266  1.15      rjs ipaqpcic_intr_disestablish(struct sapcic_socket *so, void *ih)
    267   1.1   ichiro {
    268   1.3   toshii 	sa11x0_intr_disestablish((sa11x0_chipset_tag_t)so->pcictag_cookie, ih);
    269   1.1   ichiro }
    270