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ipaq_pcic.c revision 1.1
      1  1.1  ichiro /*      $NetBSD: ipaq_pcic.c,v 1.1 2001/07/10 16:31:52 ichiro Exp $        */
      2  1.1  ichiro 
      3  1.1  ichiro /*-
      4  1.1  ichiro  * Copyright (c) 2001 The NetBSD Foundation, Inc.
      5  1.1  ichiro  * All rights reserved.
      6  1.1  ichiro  *
      7  1.1  ichiro  * This code is derived from software contributed to The NetBSD Foundation
      8  1.1  ichiro  * by Ichiro FUKUHARA (ichiro (at) ichiro.org).
      9  1.1  ichiro  *
     10  1.1  ichiro  * Redistribution and use in source and binary forms, with or without
     11  1.1  ichiro  * modification, are permitted provided that the following conditions
     12  1.1  ichiro  * are met:
     13  1.1  ichiro  * 1. Redistributions of source code must retain the above copyright
     14  1.1  ichiro  *    notice, this list of conditions and the following disclaimer.
     15  1.1  ichiro  * 2. Redistributions in binary form must reproduce the above copyright
     16  1.1  ichiro  *    notice, this list of conditions and the following disclaimer in the
     17  1.1  ichiro  *    documentation and/or other materials provided with the distribution.
     18  1.1  ichiro  * 3. All advertising materials mentioning features or use of this software
     19  1.1  ichiro  *    must display the following acknowledgement:
     20  1.1  ichiro  *        This product includes software developed by the NetBSD
     21  1.1  ichiro  *        Foundation, Inc. and its contributors.
     22  1.1  ichiro  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  1.1  ichiro  *    contributors may be used to endorse or promote products derived
     24  1.1  ichiro  *    from this software without specific prior written permission.
     25  1.1  ichiro  *
     26  1.1  ichiro  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  1.1  ichiro  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  1.1  ichiro  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  1.1  ichiro  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  1.1  ichiro  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  1.1  ichiro  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  1.1  ichiro  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  1.1  ichiro  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  1.1  ichiro  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  1.1  ichiro  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  1.1  ichiro  * POSSIBILITY OF SUCH DAMAGE.
     37  1.1  ichiro  */
     38  1.1  ichiro 
     39  1.1  ichiro #include <sys/param.h>
     40  1.1  ichiro #include <sys/systm.h>
     41  1.1  ichiro #include <sys/types.h>
     42  1.1  ichiro #include <sys/conf.h>
     43  1.1  ichiro #include <sys/file.h>
     44  1.1  ichiro #include <sys/device.h>
     45  1.1  ichiro #include <sys/kernel.h>
     46  1.1  ichiro #include <sys/kthread.h>
     47  1.1  ichiro #include <sys/malloc.h>
     48  1.1  ichiro 
     49  1.1  ichiro #include <machine/bus.h>
     50  1.1  ichiro #include <dev/pcmcia/pcmciachip.h>
     51  1.1  ichiro #include <dev/pcmcia/pcmciavar.h>
     52  1.1  ichiro 
     53  1.1  ichiro #include <hpcarm/dev/ipaq_saipvar.h>
     54  1.1  ichiro #include <hpcarm/dev/ipaq_pcicreg.h>
     55  1.1  ichiro #include <hpcarm/dev/ipaq_gpioreg.h>
     56  1.1  ichiro #include <hpcarm/sa11x0/sa11x0_gpioreg.h>
     57  1.1  ichiro #include <hpcarm/sa11x0/sa11x0_reg.h>
     58  1.1  ichiro #include <hpcarm/sa11x0/sa11x0_var.h>
     59  1.1  ichiro #include <hpcarm/sa11x0/sa11xx_pcicvar.h>
     60  1.1  ichiro 
     61  1.1  ichiro #include "ipaqpcic.h"
     62  1.1  ichiro 
     63  1.1  ichiro static	int	ipaqpcic_match(struct device *, struct cfdata *, void *);
     64  1.1  ichiro static	void	ipaqpcic_attach(struct device *, struct device *, void *);
     65  1.1  ichiro static	int	ipaqpcic_print(void *, const char *);
     66  1.1  ichiro static	int	ipaqpcic_submatch(struct device *, struct cfdata *, void *);
     67  1.1  ichiro 
     68  1.1  ichiro static	int	ipaqpcic_read(struct sapcic_socket *, int);
     69  1.1  ichiro static	void	ipaqpcic_write(struct sapcic_socket *, int, int);
     70  1.1  ichiro static	void	ipaqpcic_set_power(struct sapcic_socket *, int);
     71  1.1  ichiro static	void	ipaqpcic_clear_intr(int);
     72  1.1  ichiro static	void	*ipaqpcic_intr_establish(struct sapcic_socket *, int,
     73  1.1  ichiro 				       int (*)(void *), void *);
     74  1.1  ichiro static	void	ipaqpcic_intr_disestablish(struct sapcic_socket *, void *);
     75  1.1  ichiro 
     76  1.1  ichiro struct ipaqpcic_softc {
     77  1.1  ichiro 	struct sapcic_softc sc_pc;
     78  1.1  ichiro 	bus_space_handle_t sc_ioh;
     79  1.1  ichiro 	bus_space_handle_t sc_gpioh;
     80  1.1  ichiro 	bus_space_handle_t sc_egpioh;
     81  1.1  ichiro 
     82  1.1  ichiro 	struct sapcic_socket sc_socket[2];
     83  1.1  ichiro };
     84  1.1  ichiro 
     85  1.1  ichiro static struct sapcic_tag ipaqpcic_functions = {
     86  1.1  ichiro 	ipaqpcic_read,
     87  1.1  ichiro 	ipaqpcic_write,
     88  1.1  ichiro 	ipaqpcic_set_power,
     89  1.1  ichiro 	ipaqpcic_clear_intr,
     90  1.1  ichiro 	ipaqpcic_intr_establish,
     91  1.1  ichiro 	ipaqpcic_intr_disestablish
     92  1.1  ichiro };
     93  1.1  ichiro 
     94  1.1  ichiro struct cfattach ipaqpcic_ca = {
     95  1.1  ichiro 	sizeof(struct ipaqpcic_softc), ipaqpcic_match, ipaqpcic_attach
     96  1.1  ichiro };
     97  1.1  ichiro 
     98  1.1  ichiro static int
     99  1.1  ichiro ipaqpcic_match(parent, cf, aux)
    100  1.1  ichiro 	struct device *parent;
    101  1.1  ichiro 	struct cfdata *cf;
    102  1.1  ichiro 	void *aux;
    103  1.1  ichiro {
    104  1.1  ichiro 	return (1);
    105  1.1  ichiro }
    106  1.1  ichiro 
    107  1.1  ichiro static void
    108  1.1  ichiro ipaqpcic_attach(parent, self, aux)
    109  1.1  ichiro 	struct device *parent;
    110  1.1  ichiro 	struct device *self;
    111  1.1  ichiro 	void *aux;
    112  1.1  ichiro {
    113  1.1  ichiro 	int i;
    114  1.1  ichiro 	struct pcmciabus_attach_args paa;
    115  1.1  ichiro 	struct ipaqpcic_softc *sc = (struct ipaqpcic_softc *)self;
    116  1.1  ichiro 	struct ipaq_softc *psc = (struct ipaq_softc *)parent;
    117  1.1  ichiro 
    118  1.1  ichiro 	printf("\n");
    119  1.1  ichiro 
    120  1.1  ichiro 	sc->sc_pc.sc_iot = psc->sc_iot;
    121  1.1  ichiro 	sc->sc_ioh = psc->sc_ioh;
    122  1.1  ichiro 
    123  1.1  ichiro 	sc->sc_gpioh = psc->sc_gpioh;
    124  1.1  ichiro 	sc->sc_egpioh = psc->sc_egpioh;
    125  1.1  ichiro 
    126  1.1  ichiro 	for(i = 0; i < 2; i++) {
    127  1.1  ichiro 		sc->sc_socket[i].sc = (struct sapcic_softc *)sc;
    128  1.1  ichiro 		sc->sc_socket[i].socket = i;
    129  1.1  ichiro 		sc->sc_socket[i].saip_sc = psc;
    130  1.1  ichiro 		sc->sc_socket[i].pcictag_cookie = NULL;
    131  1.1  ichiro 		sc->sc_socket[i].pcictag = &ipaqpcic_functions;
    132  1.1  ichiro 		sc->sc_socket[i].event_thread = NULL;
    133  1.1  ichiro 		sc->sc_socket[i].event = 0;
    134  1.1  ichiro 		sc->sc_socket[i].laststatus = SAPCIC_CARD_INVALID;
    135  1.1  ichiro 		sc->sc_socket[i].shutdown = 0;
    136  1.1  ichiro 
    137  1.1  ichiro 		paa.paa_busname = "pcmcia";
    138  1.1  ichiro 		paa.pct = (pcmcia_chipset_tag_t)&sa11x0_pcmcia_functions;
    139  1.1  ichiro 		paa.pch = (pcmcia_chipset_handle_t)&sc->sc_socket[i];
    140  1.1  ichiro 		paa.iobase = 0;
    141  1.1  ichiro 		paa.iosize = 0x4000000;
    142  1.1  ichiro 
    143  1.1  ichiro 		sc->sc_socket[i].pcmcia =
    144  1.1  ichiro 		    (struct device *)config_found_sm(&sc->sc_pc.sc_dev,
    145  1.1  ichiro 		    &paa, ipaqpcic_print, ipaqpcic_submatch);
    146  1.1  ichiro 
    147  1.1  ichiro 		sa11x0_intr_establish((sa11x0_chipset_tag_t)psc,
    148  1.1  ichiro 			    i ? IRQ_CD1 : IRQ_CD0,
    149  1.1  ichiro 			    1, IPL_BIO, sapcic_intr,
    150  1.1  ichiro 			    &sc->sc_socket[i]);
    151  1.1  ichiro 
    152  1.1  ichiro 		/* schedule kthread creation */
    153  1.1  ichiro 		kthread_create(sapcic_kthread_create, &sc->sc_socket[i]);
    154  1.1  ichiro 
    155  1.1  ichiro #if 0 /* XXX */
    156  1.1  ichiro 		/* establish_intr should be after creating the kthread */
    157  1.1  ichiro 		config_interrupt(&sc->sc_socket[i], ipaqpcic_config_intr);
    158  1.1  ichiro #endif
    159  1.1  ichiro 	}
    160  1.1  ichiro }
    161  1.1  ichiro 
    162  1.1  ichiro static int
    163  1.1  ichiro ipaqpcic_print(aux, name)
    164  1.1  ichiro 	void *aux;
    165  1.1  ichiro 	const char *name;
    166  1.1  ichiro {
    167  1.1  ichiro 	return (UNCONF);
    168  1.1  ichiro }
    169  1.1  ichiro 
    170  1.1  ichiro static int
    171  1.1  ichiro ipaqpcic_submatch(parent, cf, aux)
    172  1.1  ichiro 	struct device *parent;
    173  1.1  ichiro 	struct cfdata *cf;
    174  1.1  ichiro 	void *aux;
    175  1.1  ichiro {
    176  1.1  ichiro 	return (*cf->cf_attach->ca_match)(parent, cf, aux);
    177  1.1  ichiro }
    178  1.1  ichiro 
    179  1.1  ichiro 
    180  1.1  ichiro static int
    181  1.1  ichiro ipaqpcic_read(so, reg)
    182  1.1  ichiro 	struct sapcic_socket *so;
    183  1.1  ichiro 	int reg;
    184  1.1  ichiro {
    185  1.1  ichiro 	int cr, bit;
    186  1.1  ichiro 	struct ipaqpcic_softc *sc = (struct ipaqpcic_softc *)so->sc;
    187  1.1  ichiro 
    188  1.1  ichiro 	cr = bus_space_read_4(sc->sc_pc.sc_iot, sc->sc_gpioh, SAGPIO_PLR);
    189  1.1  ichiro 
    190  1.1  ichiro 	switch (reg) {
    191  1.1  ichiro 	case SAPCIC_STATUS_CARD:
    192  1.1  ichiro 	case SAPCIC_STATUS_READY:
    193  1.1  ichiro 		bit = (so->socket ? GPIO_H3600_PCMCIA_CD1 :
    194  1.1  ichiro 				GPIO_H3600_PCMCIA_CD0) & cr;
    195  1.1  ichiro 		if (bit)
    196  1.1  ichiro 			return SAPCIC_CARD_INVALID;
    197  1.1  ichiro 		else
    198  1.1  ichiro 			return SAPCIC_CARD_VALID;
    199  1.1  ichiro 	case SAPCIC_STATUS_VS1:
    200  1.1  ichiro         case SAPCIC_STATUS_VS2:
    201  1.1  ichiro 	default:
    202  1.1  ichiro 		panic("ipaqpcic_read: bogus register\n");
    203  1.1  ichiro 	}
    204  1.1  ichiro }
    205  1.1  ichiro 
    206  1.1  ichiro static void
    207  1.1  ichiro ipaqpcic_write(so, reg, arg)
    208  1.1  ichiro 	struct sapcic_socket *so;
    209  1.1  ichiro 	int reg;
    210  1.1  ichiro 	int arg;
    211  1.1  ichiro {
    212  1.1  ichiro 	int s, value;
    213  1.1  ichiro 	struct ipaqpcic_softc *sc = (struct ipaqpcic_softc *)so->sc;
    214  1.1  ichiro 
    215  1.1  ichiro 	value = 0;
    216  1.1  ichiro 	s = splhigh();
    217  1.1  ichiro 	switch (reg) {
    218  1.1  ichiro 	case SAPCIC_CONTROL_RESET:
    219  1.1  ichiro 		value = EGPIO_H3600_CARD_RESET;
    220  1.1  ichiro 		break;
    221  1.1  ichiro 	case SAPCIC_CONTROL_LINEENABLE:
    222  1.1  ichiro 	case SAPCIC_CONTROL_WAITENABLE:
    223  1.1  ichiro 	case SAPCIC_CONTROL_POWERSELECT:
    224  1.1  ichiro 		break;
    225  1.1  ichiro 
    226  1.1  ichiro 	default:
    227  1.1  ichiro 		splx(s);
    228  1.1  ichiro 		panic("ipaqpcic_write: bogus register");
    229  1.1  ichiro 	}
    230  1.1  ichiro 	value |= bus_space_read_2(sc->sc_pc.sc_iot, sc->sc_egpioh, 0) & 0xFFFF;
    231  1.1  ichiro #if 0
    232  1.1  ichiro 	bus_space_write_2(sc->sc_pc.sc_iot, sc->sc_egpioh, 0, value);
    233  1.1  ichiro #endif
    234  1.1  ichiro 	splx(s);
    235  1.1  ichiro }
    236  1.1  ichiro 
    237  1.1  ichiro static void
    238  1.1  ichiro ipaqpcic_set_power(so, arg)
    239  1.1  ichiro 	struct sapcic_socket *so;
    240  1.1  ichiro 	int arg;
    241  1.1  ichiro {
    242  1.1  ichiro 	int value, s;
    243  1.1  ichiro 	struct ipaqpcic_softc *sc = (struct ipaqpcic_softc *)so->sc;
    244  1.1  ichiro 
    245  1.1  ichiro 	s = splbio();
    246  1.1  ichiro 	switch (arg) {
    247  1.1  ichiro 	case SAPCIC_POWER_OFF:
    248  1.1  ichiro 		value &= ~(EGPIO_H3600_OPT_NVRAM_ON | EGPIO_H3600_OPT_ON);
    249  1.1  ichiro 		break;
    250  1.1  ichiro 	case SAPCIC_POWER_3V:
    251  1.1  ichiro 	case SAPCIC_POWER_5V:
    252  1.1  ichiro 		value |= EGPIO_H3600_OPT_NVRAM_ON | EGPIO_H3600_OPT_ON;
    253  1.1  ichiro 		break;
    254  1.1  ichiro 	default:
    255  1.1  ichiro 		panic("ipaqpcic_set_power: bogus arg\n");
    256  1.1  ichiro 	}
    257  1.1  ichiro 
    258  1.1  ichiro 	value |= bus_space_read_2(sc->sc_pc.sc_iot, sc->sc_egpioh, 0) & 0xFFFF;
    259  1.1  ichiro #if 0
    260  1.1  ichiro 	bus_space_write_2(sc->sc_pc.sc_iot, sc->sc_egpioh, 0, value);
    261  1.1  ichiro #endif
    262  1.1  ichiro 	splx(s);
    263  1.1  ichiro }
    264  1.1  ichiro 
    265  1.1  ichiro static void
    266  1.1  ichiro ipaqpcic_clear_intr(arg)
    267  1.1  ichiro {
    268  1.1  ichiro }
    269  1.1  ichiro 
    270  1.1  ichiro static void *
    271  1.1  ichiro ipaqpcic_intr_establish(so, level, ih_fun, ih_arg)
    272  1.1  ichiro 	struct sapcic_socket *so;
    273  1.1  ichiro 	int level;
    274  1.1  ichiro 	int (*ih_fun)(void *);
    275  1.1  ichiro 	void *ih_arg;
    276  1.1  ichiro {
    277  1.1  ichiro 	int irq;
    278  1.1  ichiro 
    279  1.1  ichiro 	irq = so->socket ? IRQ_IRQ0 : IRQ_IRQ1;
    280  1.1  ichiro 	return (sa11x0_intr_establish((sa11x0_chipset_tag_t)so->saip_sc,
    281  1.1  ichiro 				    irq-16, 1, level, ih_fun, ih_arg));
    282  1.1  ichiro }
    283  1.1  ichiro 
    284  1.1  ichiro static void
    285  1.1  ichiro ipaqpcic_intr_disestablish(so, ih)
    286  1.1  ichiro 	struct sapcic_socket *so;
    287  1.1  ichiro 	void *ih;
    288  1.1  ichiro {
    289  1.1  ichiro 	sa11x0_intr_disestablish((sa11x0_chipset_tag_t)so->saip_sc, ih);
    290  1.1  ichiro }
    291