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ipaq_pcic.c revision 1.15.8.1
      1  1.15.8.1        ad /*      $NetBSD: ipaq_pcic.c,v 1.15.8.1 2007/07/15 13:16:01 ad Exp $        */
      2       1.1    ichiro 
      3       1.1    ichiro /*-
      4       1.1    ichiro  * Copyright (c) 2001 The NetBSD Foundation, Inc.
      5       1.1    ichiro  * All rights reserved.
      6       1.1    ichiro  *
      7       1.1    ichiro  * This code is derived from software contributed to The NetBSD Foundation
      8       1.1    ichiro  * by Ichiro FUKUHARA (ichiro (at) ichiro.org).
      9       1.1    ichiro  *
     10       1.1    ichiro  * Redistribution and use in source and binary forms, with or without
     11       1.1    ichiro  * modification, are permitted provided that the following conditions
     12       1.1    ichiro  * are met:
     13       1.1    ichiro  * 1. Redistributions of source code must retain the above copyright
     14       1.1    ichiro  *    notice, this list of conditions and the following disclaimer.
     15       1.1    ichiro  * 2. Redistributions in binary form must reproduce the above copyright
     16       1.1    ichiro  *    notice, this list of conditions and the following disclaimer in the
     17       1.1    ichiro  *    documentation and/or other materials provided with the distribution.
     18       1.1    ichiro  * 3. All advertising materials mentioning features or use of this software
     19       1.1    ichiro  *    must display the following acknowledgement:
     20       1.1    ichiro  *        This product includes software developed by the NetBSD
     21       1.1    ichiro  *        Foundation, Inc. and its contributors.
     22       1.1    ichiro  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23       1.1    ichiro  *    contributors may be used to endorse or promote products derived
     24       1.1    ichiro  *    from this software without specific prior written permission.
     25       1.1    ichiro  *
     26       1.1    ichiro  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27       1.1    ichiro  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28       1.1    ichiro  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29       1.1    ichiro  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30       1.1    ichiro  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31       1.1    ichiro  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32       1.1    ichiro  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33       1.1    ichiro  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34       1.1    ichiro  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35       1.1    ichiro  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36       1.1    ichiro  * POSSIBILITY OF SUCH DAMAGE.
     37       1.1    ichiro  */
     38      1.12     lukem 
     39      1.12     lukem #include <sys/cdefs.h>
     40  1.15.8.1        ad __KERNEL_RCSID(0, "$NetBSD: ipaq_pcic.c,v 1.15.8.1 2007/07/15 13:16:01 ad Exp $");
     41       1.1    ichiro 
     42       1.1    ichiro #include <sys/param.h>
     43       1.1    ichiro #include <sys/systm.h>
     44       1.1    ichiro #include <sys/types.h>
     45       1.1    ichiro #include <sys/conf.h>
     46       1.1    ichiro #include <sys/file.h>
     47       1.1    ichiro #include <sys/device.h>
     48       1.1    ichiro #include <sys/kernel.h>
     49       1.1    ichiro #include <sys/kthread.h>
     50       1.1    ichiro #include <sys/malloc.h>
     51       1.1    ichiro 
     52       1.1    ichiro #include <machine/bus.h>
     53       1.1    ichiro #include <dev/pcmcia/pcmciachip.h>
     54       1.1    ichiro #include <dev/pcmcia/pcmciavar.h>
     55       1.1    ichiro 
     56       1.1    ichiro #include <hpcarm/dev/ipaq_saipvar.h>
     57       1.1    ichiro #include <hpcarm/dev/ipaq_pcicreg.h>
     58       1.1    ichiro #include <hpcarm/dev/ipaq_gpioreg.h>
     59       1.7    ichiro 
     60       1.7    ichiro #include <arm/sa11x0/sa11x0_gpioreg.h>
     61       1.7    ichiro #include <arm/sa11x0/sa11x0_var.h>
     62       1.7    ichiro #include <arm/sa11x0/sa11xx_pcicvar.h>
     63       1.1    ichiro 
     64       1.1    ichiro #include "ipaqpcic.h"
     65       1.1    ichiro 
     66       1.1    ichiro static	int	ipaqpcic_match(struct device *, struct cfdata *, void *);
     67       1.1    ichiro static	void	ipaqpcic_attach(struct device *, struct device *, void *);
     68       1.1    ichiro static	int	ipaqpcic_print(void *, const char *);
     69       1.1    ichiro 
     70       1.1    ichiro static	int	ipaqpcic_read(struct sapcic_socket *, int);
     71       1.1    ichiro static	void	ipaqpcic_write(struct sapcic_socket *, int, int);
     72       1.1    ichiro static	void	ipaqpcic_set_power(struct sapcic_socket *, int);
     73       1.1    ichiro static	void	ipaqpcic_clear_intr(int);
     74       1.1    ichiro static	void	*ipaqpcic_intr_establish(struct sapcic_socket *, int,
     75       1.1    ichiro 				       int (*)(void *), void *);
     76       1.1    ichiro static	void	ipaqpcic_intr_disestablish(struct sapcic_socket *, void *);
     77       1.1    ichiro 
     78       1.1    ichiro struct ipaqpcic_softc {
     79       1.5    ichiro 	struct sapcic_softc	sc_pc;
     80       1.5    ichiro 	bus_space_handle_t	sc_ioh;
     81       1.5    ichiro 	struct ipaq_softc	*sc_parent;
     82       1.5    ichiro 	struct sapcic_socket	sc_socket[2];
     83       1.1    ichiro };
     84       1.1    ichiro 
     85       1.5    ichiro static	void	ipaqpcic_init(struct ipaqpcic_softc *);
     86       1.5    ichiro 
     87       1.1    ichiro static struct sapcic_tag ipaqpcic_functions = {
     88       1.1    ichiro 	ipaqpcic_read,
     89       1.1    ichiro 	ipaqpcic_write,
     90       1.1    ichiro 	ipaqpcic_set_power,
     91       1.1    ichiro 	ipaqpcic_clear_intr,
     92       1.1    ichiro 	ipaqpcic_intr_establish,
     93       1.1    ichiro 	ipaqpcic_intr_disestablish
     94       1.1    ichiro };
     95       1.1    ichiro 
     96      1.11   thorpej CFATTACH_DECL(ipaqpcic, sizeof(struct ipaqpcic_softc),
     97      1.11   thorpej     ipaqpcic_match, ipaqpcic_attach, NULL, NULL);
     98       1.1    ichiro 
     99       1.1    ichiro static int
    100      1.15       rjs ipaqpcic_match(struct device *parent, struct cfdata *cf, void *aux)
    101       1.1    ichiro {
    102       1.1    ichiro 	return (1);
    103       1.1    ichiro }
    104       1.1    ichiro 
    105       1.1    ichiro static void
    106      1.15       rjs ipaqpcic_attach(struct device *parent, struct device *self, void *aux)
    107       1.1    ichiro {
    108       1.1    ichiro 	int i;
    109       1.1    ichiro 	struct pcmciabus_attach_args paa;
    110       1.1    ichiro 	struct ipaqpcic_softc *sc = (struct ipaqpcic_softc *)self;
    111       1.1    ichiro 	struct ipaq_softc *psc = (struct ipaq_softc *)parent;
    112       1.1    ichiro 
    113       1.1    ichiro 	printf("\n");
    114       1.1    ichiro 
    115       1.1    ichiro 	sc->sc_pc.sc_iot = psc->sc_iot;
    116       1.1    ichiro 	sc->sc_ioh = psc->sc_ioh;
    117       1.5    ichiro 	sc->sc_parent = (struct ipaq_softc *)parent;
    118       1.1    ichiro 
    119       1.5    ichiro 	ipaqpcic_init(sc);
    120       1.1    ichiro 
    121       1.1    ichiro 	for(i = 0; i < 2; i++) {
    122       1.1    ichiro 		sc->sc_socket[i].sc = (struct sapcic_softc *)sc;
    123       1.1    ichiro 		sc->sc_socket[i].socket = i;
    124       1.3    toshii 		sc->sc_socket[i].pcictag_cookie = psc;
    125       1.1    ichiro 		sc->sc_socket[i].pcictag = &ipaqpcic_functions;
    126       1.1    ichiro 		sc->sc_socket[i].event_thread = NULL;
    127       1.1    ichiro 		sc->sc_socket[i].event = 0;
    128       1.1    ichiro 		sc->sc_socket[i].laststatus = SAPCIC_CARD_INVALID;
    129       1.1    ichiro 		sc->sc_socket[i].shutdown = 0;
    130       1.1    ichiro 
    131       1.1    ichiro 		paa.paa_busname = "pcmcia";
    132       1.1    ichiro 		paa.pct = (pcmcia_chipset_tag_t)&sa11x0_pcmcia_functions;
    133       1.1    ichiro 		paa.pch = (pcmcia_chipset_handle_t)&sc->sc_socket[i];
    134       1.1    ichiro 		paa.iobase = 0;
    135       1.1    ichiro 		paa.iosize = 0x4000000;
    136       1.1    ichiro 
    137       1.1    ichiro 		sc->sc_socket[i].pcmcia =
    138      1.13  drochner 		    config_found_ia(&sc->sc_pc.sc_dev, "pcmciabus",
    139      1.13  drochner 		    &paa, ipaqpcic_print);
    140       1.1    ichiro 
    141       1.1    ichiro 		sa11x0_intr_establish((sa11x0_chipset_tag_t)psc,
    142       1.1    ichiro 			    i ? IRQ_CD1 : IRQ_CD0,
    143       1.1    ichiro 			    1, IPL_BIO, sapcic_intr,
    144       1.1    ichiro 			    &sc->sc_socket[i]);
    145       1.1    ichiro 
    146       1.1    ichiro 		/* schedule kthread creation */
    147  1.15.8.1        ad 		sapcic_kthread_create(&sc->sc_socket[i]);
    148       1.1    ichiro 
    149       1.1    ichiro #if 0 /* XXX */
    150       1.1    ichiro 		/* establish_intr should be after creating the kthread */
    151       1.1    ichiro 		config_interrupt(&sc->sc_socket[i], ipaqpcic_config_intr);
    152       1.1    ichiro #endif
    153       1.1    ichiro 	}
    154       1.1    ichiro }
    155       1.1    ichiro 
    156       1.1    ichiro static int
    157      1.15       rjs ipaqpcic_print(void *aux, const char *name)
    158       1.1    ichiro {
    159       1.1    ichiro 	return (UNCONF);
    160       1.1    ichiro }
    161       1.1    ichiro 
    162       1.5    ichiro static void
    163      1.15       rjs ipaqpcic_init(struct ipaqpcic_softc *sc)
    164       1.5    ichiro {
    165       1.6    ichiro 	int cr;
    166       1.6    ichiro 
    167       1.6    ichiro 	/* All those are inputs */
    168       1.6    ichiro 	cr = bus_space_read_4(sc->sc_pc.sc_iot, sc->sc_parent->sc_gpioh, SAGPIO_PDR);
    169       1.6    ichiro 	cr &= ~(GPIO_H3600_PCMCIA_CD0 | GPIO_H3600_PCMCIA_CD1 | GPIO_H3600_PCMCIA_IRQ0 |
    170       1.6    ichiro 		GPIO_H3600_PCMCIA_IRQ1);
    171       1.6    ichiro 	bus_space_write_4(sc->sc_pc.sc_iot, sc->sc_parent->sc_gpioh, SAGPIO_PDR, cr);
    172       1.6    ichiro 
    173       1.5    ichiro 	sc->sc_parent->ipaq_egpio |=
    174       1.5    ichiro 		EGPIO_H3600_OPT_NVRAM_ON | EGPIO_H3600_OPT_ON ;
    175       1.5    ichiro 	sc->sc_parent->ipaq_egpio &=
    176       1.5    ichiro 		~(EGPIO_H3600_CARD_RESET | EGPIO_H3600_OPT_RESET);
    177       1.5    ichiro 	bus_space_write_2(sc->sc_pc.sc_iot, sc->sc_parent->sc_egpioh,
    178       1.5    ichiro 			  0, sc->sc_parent->ipaq_egpio);
    179       1.5    ichiro }
    180       1.1    ichiro 
    181       1.1    ichiro static int
    182      1.15       rjs ipaqpcic_read(struct sapcic_socket *so, int reg)
    183       1.1    ichiro {
    184       1.1    ichiro 	int cr, bit;
    185       1.1    ichiro 	struct ipaqpcic_softc *sc = (struct ipaqpcic_softc *)so->sc;
    186       1.1    ichiro 
    187       1.5    ichiro 	cr = bus_space_read_4(sc->sc_pc.sc_iot, sc->sc_parent->sc_gpioh, SAGPIO_PLR);
    188       1.1    ichiro 
    189       1.1    ichiro 	switch (reg) {
    190       1.1    ichiro 	case SAPCIC_STATUS_CARD:
    191       1.6    ichiro 		bit = (so->socket ? GPIO_H3600_PCMCIA_CD0 :
    192       1.6    ichiro 				GPIO_H3600_PCMCIA_CD1) & cr;
    193       1.6    ichiro 		if (!bit)
    194       1.1    ichiro 			return SAPCIC_CARD_INVALID;
    195       1.1    ichiro 		else
    196       1.1    ichiro 			return SAPCIC_CARD_VALID;
    197       1.1    ichiro 	case SAPCIC_STATUS_VS1:
    198       1.1    ichiro         case SAPCIC_STATUS_VS2:
    199       1.6    ichiro 	case SAPCIC_STATUS_READY:
    200       1.6    ichiro 		bit = (so->socket ? GPIO_H3600_PCMCIA_IRQ0:
    201       1.6    ichiro 				GPIO_H3600_PCMCIA_IRQ1);
    202       1.6    ichiro 		return (bit & cr);
    203       1.1    ichiro 	default:
    204       1.9    provos 		panic("ipaqpcic_read: bogus register");
    205       1.1    ichiro 	}
    206       1.1    ichiro }
    207       1.1    ichiro 
    208       1.1    ichiro static void
    209      1.15       rjs ipaqpcic_write(struct sapcic_socket *so, int reg, int arg)
    210       1.1    ichiro {
    211       1.5    ichiro 	int s;
    212       1.1    ichiro 	struct ipaqpcic_softc *sc = (struct ipaqpcic_softc *)so->sc;
    213       1.1    ichiro 
    214       1.1    ichiro 	s = splhigh();
    215       1.1    ichiro 	switch (reg) {
    216       1.1    ichiro 	case SAPCIC_CONTROL_RESET:
    217       1.5    ichiro 		sc->sc_parent->ipaq_egpio |= EGPIO_H3600_CARD_RESET;
    218       1.1    ichiro 		break;
    219       1.1    ichiro 	case SAPCIC_CONTROL_LINEENABLE:
    220       1.1    ichiro 	case SAPCIC_CONTROL_WAITENABLE:
    221       1.1    ichiro 	case SAPCIC_CONTROL_POWERSELECT:
    222       1.1    ichiro 		break;
    223       1.1    ichiro 
    224       1.1    ichiro 	default:
    225       1.1    ichiro 		splx(s);
    226       1.1    ichiro 		panic("ipaqpcic_write: bogus register");
    227       1.1    ichiro 	}
    228       1.5    ichiro 	bus_space_write_2(sc->sc_pc.sc_iot, sc->sc_parent->sc_egpioh, 0,
    229       1.5    ichiro 			  sc->sc_parent->ipaq_egpio);
    230       1.1    ichiro 	splx(s);
    231       1.1    ichiro }
    232       1.1    ichiro 
    233       1.1    ichiro static void
    234      1.15       rjs ipaqpcic_set_power(struct sapcic_socket *so, int arg)
    235       1.1    ichiro {
    236       1.5    ichiro 	int s;
    237       1.5    ichiro 	struct ipaqpcic_softc *sc = (struct ipaqpcic_softc *)so->sc;
    238       1.1    ichiro 
    239       1.1    ichiro 	s = splbio();
    240       1.1    ichiro 	switch (arg) {
    241       1.1    ichiro 	case SAPCIC_POWER_OFF:
    242       1.5    ichiro 		sc->sc_parent->ipaq_egpio &=
    243       1.5    ichiro 			~(EGPIO_H3600_OPT_NVRAM_ON | EGPIO_H3600_OPT_ON);
    244       1.1    ichiro 		break;
    245       1.1    ichiro 	case SAPCIC_POWER_3V:
    246       1.1    ichiro 	case SAPCIC_POWER_5V:
    247       1.5    ichiro 		sc->sc_parent->ipaq_egpio |=
    248       1.5    ichiro 			EGPIO_H3600_OPT_NVRAM_ON | EGPIO_H3600_OPT_ON;
    249       1.1    ichiro 		break;
    250       1.1    ichiro 	default:
    251       1.9    provos 		panic("ipaqpcic_set_power: bogus arg");
    252       1.1    ichiro 	}
    253       1.5    ichiro 	bus_space_write_2(sc->sc_pc.sc_iot, sc->sc_parent->sc_egpioh,
    254       1.5    ichiro 			  0, sc->sc_parent->ipaq_egpio);
    255       1.1    ichiro 	splx(s);
    256       1.1    ichiro }
    257       1.1    ichiro 
    258       1.1    ichiro static void
    259      1.15       rjs ipaqpcic_clear_intr(int arg)
    260       1.1    ichiro {
    261       1.1    ichiro }
    262       1.1    ichiro 
    263       1.1    ichiro static void *
    264      1.15       rjs ipaqpcic_intr_establish(struct sapcic_socket *so, int level,
    265      1.15       rjs 			int (*ih_fun)(void *), void *ih_arg)
    266       1.1    ichiro {
    267       1.1    ichiro 	int irq;
    268       1.1    ichiro 
    269       1.1    ichiro 	irq = so->socket ? IRQ_IRQ0 : IRQ_IRQ1;
    270       1.3    toshii 	return (sa11x0_intr_establish((sa11x0_chipset_tag_t)so->pcictag_cookie,
    271       1.1    ichiro 				    irq-16, 1, level, ih_fun, ih_arg));
    272       1.1    ichiro }
    273       1.1    ichiro 
    274       1.1    ichiro static void
    275      1.15       rjs ipaqpcic_intr_disestablish(struct sapcic_socket *so, void *ih)
    276       1.1    ichiro {
    277       1.3    toshii 	sa11x0_intr_disestablish((sa11x0_chipset_tag_t)so->pcictag_cookie, ih);
    278       1.1    ichiro }
    279