Home | History | Annotate | Line # | Download | only in dev
ipaq_pcic.c revision 1.6.16.1
      1  1.6.16.1  gehenna /*      $NetBSD: ipaq_pcic.c,v 1.6.16.1 2002/07/21 13:00:37 gehenna Exp $        */
      2       1.1   ichiro 
      3       1.1   ichiro /*-
      4       1.1   ichiro  * Copyright (c) 2001 The NetBSD Foundation, Inc.
      5       1.1   ichiro  * All rights reserved.
      6       1.1   ichiro  *
      7       1.1   ichiro  * This code is derived from software contributed to The NetBSD Foundation
      8       1.1   ichiro  * by Ichiro FUKUHARA (ichiro (at) ichiro.org).
      9       1.1   ichiro  *
     10       1.1   ichiro  * Redistribution and use in source and binary forms, with or without
     11       1.1   ichiro  * modification, are permitted provided that the following conditions
     12       1.1   ichiro  * are met:
     13       1.1   ichiro  * 1. Redistributions of source code must retain the above copyright
     14       1.1   ichiro  *    notice, this list of conditions and the following disclaimer.
     15       1.1   ichiro  * 2. Redistributions in binary form must reproduce the above copyright
     16       1.1   ichiro  *    notice, this list of conditions and the following disclaimer in the
     17       1.1   ichiro  *    documentation and/or other materials provided with the distribution.
     18       1.1   ichiro  * 3. All advertising materials mentioning features or use of this software
     19       1.1   ichiro  *    must display the following acknowledgement:
     20       1.1   ichiro  *        This product includes software developed by the NetBSD
     21       1.1   ichiro  *        Foundation, Inc. and its contributors.
     22       1.1   ichiro  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23       1.1   ichiro  *    contributors may be used to endorse or promote products derived
     24       1.1   ichiro  *    from this software without specific prior written permission.
     25       1.1   ichiro  *
     26       1.1   ichiro  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27       1.1   ichiro  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28       1.1   ichiro  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29       1.1   ichiro  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30       1.1   ichiro  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31       1.1   ichiro  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32       1.1   ichiro  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33       1.1   ichiro  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34       1.1   ichiro  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35       1.1   ichiro  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36       1.1   ichiro  * POSSIBILITY OF SUCH DAMAGE.
     37       1.1   ichiro  */
     38       1.1   ichiro 
     39       1.1   ichiro #include <sys/param.h>
     40       1.1   ichiro #include <sys/systm.h>
     41       1.1   ichiro #include <sys/types.h>
     42       1.1   ichiro #include <sys/conf.h>
     43       1.1   ichiro #include <sys/file.h>
     44       1.1   ichiro #include <sys/device.h>
     45       1.1   ichiro #include <sys/kernel.h>
     46       1.1   ichiro #include <sys/kthread.h>
     47       1.1   ichiro #include <sys/malloc.h>
     48       1.1   ichiro 
     49       1.1   ichiro #include <machine/bus.h>
     50       1.1   ichiro #include <dev/pcmcia/pcmciachip.h>
     51       1.1   ichiro #include <dev/pcmcia/pcmciavar.h>
     52       1.1   ichiro 
     53       1.1   ichiro #include <hpcarm/dev/ipaq_saipvar.h>
     54       1.1   ichiro #include <hpcarm/dev/ipaq_pcicreg.h>
     55       1.1   ichiro #include <hpcarm/dev/ipaq_gpioreg.h>
     56  1.6.16.1  gehenna 
     57  1.6.16.1  gehenna #include <arm/sa11x0/sa11x0_gpioreg.h>
     58  1.6.16.1  gehenna #include <arm/sa11x0/sa11x0_var.h>
     59  1.6.16.1  gehenna #include <arm/sa11x0/sa11xx_pcicvar.h>
     60       1.1   ichiro 
     61       1.1   ichiro #include "ipaqpcic.h"
     62       1.1   ichiro 
     63       1.1   ichiro static	int	ipaqpcic_match(struct device *, struct cfdata *, void *);
     64       1.1   ichiro static	void	ipaqpcic_attach(struct device *, struct device *, void *);
     65       1.1   ichiro static	int	ipaqpcic_print(void *, const char *);
     66       1.1   ichiro static	int	ipaqpcic_submatch(struct device *, struct cfdata *, void *);
     67       1.1   ichiro 
     68       1.1   ichiro static	int	ipaqpcic_read(struct sapcic_socket *, int);
     69       1.1   ichiro static	void	ipaqpcic_write(struct sapcic_socket *, int, int);
     70       1.1   ichiro static	void	ipaqpcic_set_power(struct sapcic_socket *, int);
     71       1.1   ichiro static	void	ipaqpcic_clear_intr(int);
     72       1.1   ichiro static	void	*ipaqpcic_intr_establish(struct sapcic_socket *, int,
     73       1.1   ichiro 				       int (*)(void *), void *);
     74       1.1   ichiro static	void	ipaqpcic_intr_disestablish(struct sapcic_socket *, void *);
     75       1.1   ichiro 
     76       1.1   ichiro struct ipaqpcic_softc {
     77       1.5   ichiro 	struct sapcic_softc	sc_pc;
     78       1.5   ichiro 	bus_space_handle_t	sc_ioh;
     79       1.5   ichiro 	struct ipaq_softc	*sc_parent;
     80       1.5   ichiro 	struct sapcic_socket	sc_socket[2];
     81       1.1   ichiro };
     82       1.1   ichiro 
     83       1.5   ichiro static	void	ipaqpcic_init(struct ipaqpcic_softc *);
     84       1.5   ichiro 
     85       1.1   ichiro static struct sapcic_tag ipaqpcic_functions = {
     86       1.1   ichiro 	ipaqpcic_read,
     87       1.1   ichiro 	ipaqpcic_write,
     88       1.1   ichiro 	ipaqpcic_set_power,
     89       1.1   ichiro 	ipaqpcic_clear_intr,
     90       1.1   ichiro 	ipaqpcic_intr_establish,
     91       1.1   ichiro 	ipaqpcic_intr_disestablish
     92       1.1   ichiro };
     93       1.1   ichiro 
     94       1.1   ichiro struct cfattach ipaqpcic_ca = {
     95       1.1   ichiro 	sizeof(struct ipaqpcic_softc), ipaqpcic_match, ipaqpcic_attach
     96       1.1   ichiro };
     97       1.1   ichiro 
     98       1.1   ichiro static int
     99       1.1   ichiro ipaqpcic_match(parent, cf, aux)
    100       1.1   ichiro 	struct device *parent;
    101       1.1   ichiro 	struct cfdata *cf;
    102       1.1   ichiro 	void *aux;
    103       1.1   ichiro {
    104       1.1   ichiro 	return (1);
    105       1.1   ichiro }
    106       1.1   ichiro 
    107       1.1   ichiro static void
    108       1.1   ichiro ipaqpcic_attach(parent, self, aux)
    109       1.1   ichiro 	struct device *parent;
    110       1.1   ichiro 	struct device *self;
    111       1.1   ichiro 	void *aux;
    112       1.1   ichiro {
    113       1.1   ichiro 	int i;
    114       1.1   ichiro 	struct pcmciabus_attach_args paa;
    115       1.1   ichiro 	struct ipaqpcic_softc *sc = (struct ipaqpcic_softc *)self;
    116       1.1   ichiro 	struct ipaq_softc *psc = (struct ipaq_softc *)parent;
    117       1.1   ichiro 
    118       1.1   ichiro 	printf("\n");
    119       1.1   ichiro 
    120       1.1   ichiro 	sc->sc_pc.sc_iot = psc->sc_iot;
    121       1.1   ichiro 	sc->sc_ioh = psc->sc_ioh;
    122       1.5   ichiro 	sc->sc_parent = (struct ipaq_softc *)parent;
    123       1.1   ichiro 
    124       1.5   ichiro 	ipaqpcic_init(sc);
    125       1.1   ichiro 
    126       1.1   ichiro 	for(i = 0; i < 2; i++) {
    127       1.1   ichiro 		sc->sc_socket[i].sc = (struct sapcic_softc *)sc;
    128       1.1   ichiro 		sc->sc_socket[i].socket = i;
    129       1.3   toshii 		sc->sc_socket[i].pcictag_cookie = psc;
    130       1.1   ichiro 		sc->sc_socket[i].pcictag = &ipaqpcic_functions;
    131       1.1   ichiro 		sc->sc_socket[i].event_thread = NULL;
    132       1.1   ichiro 		sc->sc_socket[i].event = 0;
    133       1.1   ichiro 		sc->sc_socket[i].laststatus = SAPCIC_CARD_INVALID;
    134       1.1   ichiro 		sc->sc_socket[i].shutdown = 0;
    135       1.1   ichiro 
    136       1.1   ichiro 		paa.paa_busname = "pcmcia";
    137       1.1   ichiro 		paa.pct = (pcmcia_chipset_tag_t)&sa11x0_pcmcia_functions;
    138       1.1   ichiro 		paa.pch = (pcmcia_chipset_handle_t)&sc->sc_socket[i];
    139       1.1   ichiro 		paa.iobase = 0;
    140       1.1   ichiro 		paa.iosize = 0x4000000;
    141       1.1   ichiro 
    142       1.1   ichiro 		sc->sc_socket[i].pcmcia =
    143       1.1   ichiro 		    (struct device *)config_found_sm(&sc->sc_pc.sc_dev,
    144       1.1   ichiro 		    &paa, ipaqpcic_print, ipaqpcic_submatch);
    145       1.1   ichiro 
    146       1.1   ichiro 		sa11x0_intr_establish((sa11x0_chipset_tag_t)psc,
    147       1.1   ichiro 			    i ? IRQ_CD1 : IRQ_CD0,
    148       1.1   ichiro 			    1, IPL_BIO, sapcic_intr,
    149       1.1   ichiro 			    &sc->sc_socket[i]);
    150       1.1   ichiro 
    151       1.1   ichiro 		/* schedule kthread creation */
    152       1.1   ichiro 		kthread_create(sapcic_kthread_create, &sc->sc_socket[i]);
    153       1.1   ichiro 
    154       1.1   ichiro #if 0 /* XXX */
    155       1.1   ichiro 		/* establish_intr should be after creating the kthread */
    156       1.1   ichiro 		config_interrupt(&sc->sc_socket[i], ipaqpcic_config_intr);
    157       1.1   ichiro #endif
    158       1.1   ichiro 	}
    159       1.1   ichiro }
    160       1.1   ichiro 
    161       1.1   ichiro static int
    162       1.1   ichiro ipaqpcic_print(aux, name)
    163       1.1   ichiro 	void *aux;
    164       1.1   ichiro 	const char *name;
    165       1.1   ichiro {
    166       1.1   ichiro 	return (UNCONF);
    167       1.1   ichiro }
    168       1.1   ichiro 
    169       1.1   ichiro static int
    170       1.1   ichiro ipaqpcic_submatch(parent, cf, aux)
    171       1.1   ichiro 	struct device *parent;
    172       1.1   ichiro 	struct cfdata *cf;
    173       1.1   ichiro 	void *aux;
    174       1.1   ichiro {
    175       1.1   ichiro 	return (*cf->cf_attach->ca_match)(parent, cf, aux);
    176       1.1   ichiro }
    177       1.1   ichiro 
    178       1.5   ichiro static void
    179       1.5   ichiro ipaqpcic_init(sc)
    180       1.5   ichiro 	struct ipaqpcic_softc *sc;
    181       1.5   ichiro {
    182       1.6   ichiro 	int cr;
    183       1.6   ichiro 
    184       1.6   ichiro 	/* All those are inputs */
    185       1.6   ichiro 	cr = bus_space_read_4(sc->sc_pc.sc_iot, sc->sc_parent->sc_gpioh, SAGPIO_PDR);
    186       1.6   ichiro 	cr &= ~(GPIO_H3600_PCMCIA_CD0 | GPIO_H3600_PCMCIA_CD1 | GPIO_H3600_PCMCIA_IRQ0 |
    187       1.6   ichiro 		GPIO_H3600_PCMCIA_IRQ1);
    188       1.6   ichiro 	bus_space_write_4(sc->sc_pc.sc_iot, sc->sc_parent->sc_gpioh, SAGPIO_PDR, cr);
    189       1.6   ichiro 
    190       1.5   ichiro 	sc->sc_parent->ipaq_egpio |=
    191       1.5   ichiro 		EGPIO_H3600_OPT_NVRAM_ON | EGPIO_H3600_OPT_ON ;
    192       1.5   ichiro 	sc->sc_parent->ipaq_egpio &=
    193       1.5   ichiro 		~(EGPIO_H3600_CARD_RESET | EGPIO_H3600_OPT_RESET);
    194       1.5   ichiro 	bus_space_write_2(sc->sc_pc.sc_iot, sc->sc_parent->sc_egpioh,
    195       1.5   ichiro 			  0, sc->sc_parent->ipaq_egpio);
    196       1.5   ichiro }
    197       1.1   ichiro 
    198       1.1   ichiro static int
    199       1.1   ichiro ipaqpcic_read(so, reg)
    200       1.1   ichiro 	struct sapcic_socket *so;
    201       1.1   ichiro 	int reg;
    202       1.1   ichiro {
    203       1.1   ichiro 	int cr, bit;
    204       1.1   ichiro 	struct ipaqpcic_softc *sc = (struct ipaqpcic_softc *)so->sc;
    205       1.1   ichiro 
    206       1.5   ichiro 	cr = bus_space_read_4(sc->sc_pc.sc_iot, sc->sc_parent->sc_gpioh, SAGPIO_PLR);
    207       1.1   ichiro 
    208       1.1   ichiro 	switch (reg) {
    209       1.1   ichiro 	case SAPCIC_STATUS_CARD:
    210       1.6   ichiro 		bit = (so->socket ? GPIO_H3600_PCMCIA_CD0 :
    211       1.6   ichiro 				GPIO_H3600_PCMCIA_CD1) & cr;
    212       1.6   ichiro 		if (!bit)
    213       1.1   ichiro 			return SAPCIC_CARD_INVALID;
    214       1.1   ichiro 		else
    215       1.1   ichiro 			return SAPCIC_CARD_VALID;
    216       1.1   ichiro 	case SAPCIC_STATUS_VS1:
    217       1.1   ichiro         case SAPCIC_STATUS_VS2:
    218       1.6   ichiro 	case SAPCIC_STATUS_READY:
    219       1.6   ichiro 		bit = (so->socket ? GPIO_H3600_PCMCIA_IRQ0:
    220       1.6   ichiro 				GPIO_H3600_PCMCIA_IRQ1);
    221       1.6   ichiro 		return (bit & cr);
    222       1.1   ichiro 	default:
    223       1.1   ichiro 		panic("ipaqpcic_read: bogus register\n");
    224       1.1   ichiro 	}
    225       1.1   ichiro }
    226       1.1   ichiro 
    227       1.1   ichiro static void
    228       1.1   ichiro ipaqpcic_write(so, reg, arg)
    229       1.1   ichiro 	struct sapcic_socket *so;
    230       1.1   ichiro 	int reg;
    231       1.1   ichiro 	int arg;
    232       1.1   ichiro {
    233       1.5   ichiro 	int s;
    234       1.1   ichiro 	struct ipaqpcic_softc *sc = (struct ipaqpcic_softc *)so->sc;
    235       1.1   ichiro 
    236       1.1   ichiro 	s = splhigh();
    237       1.1   ichiro 	switch (reg) {
    238       1.1   ichiro 	case SAPCIC_CONTROL_RESET:
    239       1.5   ichiro 		sc->sc_parent->ipaq_egpio |= EGPIO_H3600_CARD_RESET;
    240       1.1   ichiro 		break;
    241       1.1   ichiro 	case SAPCIC_CONTROL_LINEENABLE:
    242       1.1   ichiro 	case SAPCIC_CONTROL_WAITENABLE:
    243       1.1   ichiro 	case SAPCIC_CONTROL_POWERSELECT:
    244       1.1   ichiro 		break;
    245       1.1   ichiro 
    246       1.1   ichiro 	default:
    247       1.1   ichiro 		splx(s);
    248       1.1   ichiro 		panic("ipaqpcic_write: bogus register");
    249       1.1   ichiro 	}
    250       1.5   ichiro 	bus_space_write_2(sc->sc_pc.sc_iot, sc->sc_parent->sc_egpioh, 0,
    251       1.5   ichiro 			  sc->sc_parent->ipaq_egpio);
    252       1.1   ichiro 	splx(s);
    253       1.1   ichiro }
    254       1.1   ichiro 
    255       1.1   ichiro static void
    256       1.1   ichiro ipaqpcic_set_power(so, arg)
    257       1.1   ichiro 	struct sapcic_socket *so;
    258       1.1   ichiro 	int arg;
    259       1.1   ichiro {
    260       1.5   ichiro 	int s;
    261       1.5   ichiro 	struct ipaqpcic_softc *sc = (struct ipaqpcic_softc *)so->sc;
    262       1.1   ichiro 
    263       1.1   ichiro 	s = splbio();
    264       1.1   ichiro 	switch (arg) {
    265       1.1   ichiro 	case SAPCIC_POWER_OFF:
    266       1.5   ichiro 		sc->sc_parent->ipaq_egpio &=
    267       1.5   ichiro 			~(EGPIO_H3600_OPT_NVRAM_ON | EGPIO_H3600_OPT_ON);
    268       1.1   ichiro 		break;
    269       1.1   ichiro 	case SAPCIC_POWER_3V:
    270       1.1   ichiro 	case SAPCIC_POWER_5V:
    271       1.5   ichiro 		sc->sc_parent->ipaq_egpio |=
    272       1.5   ichiro 			EGPIO_H3600_OPT_NVRAM_ON | EGPIO_H3600_OPT_ON;
    273       1.1   ichiro 		break;
    274       1.1   ichiro 	default:
    275       1.1   ichiro 		panic("ipaqpcic_set_power: bogus arg\n");
    276       1.1   ichiro 	}
    277       1.5   ichiro 	bus_space_write_2(sc->sc_pc.sc_iot, sc->sc_parent->sc_egpioh,
    278       1.5   ichiro 			  0, sc->sc_parent->ipaq_egpio);
    279       1.1   ichiro 	splx(s);
    280       1.1   ichiro }
    281       1.1   ichiro 
    282       1.1   ichiro static void
    283       1.1   ichiro ipaqpcic_clear_intr(arg)
    284       1.1   ichiro {
    285       1.1   ichiro }
    286       1.1   ichiro 
    287       1.1   ichiro static void *
    288       1.1   ichiro ipaqpcic_intr_establish(so, level, ih_fun, ih_arg)
    289       1.1   ichiro 	struct sapcic_socket *so;
    290       1.1   ichiro 	int level;
    291       1.1   ichiro 	int (*ih_fun)(void *);
    292       1.1   ichiro 	void *ih_arg;
    293       1.1   ichiro {
    294       1.1   ichiro 	int irq;
    295       1.1   ichiro 
    296       1.1   ichiro 	irq = so->socket ? IRQ_IRQ0 : IRQ_IRQ1;
    297       1.3   toshii 	return (sa11x0_intr_establish((sa11x0_chipset_tag_t)so->pcictag_cookie,
    298       1.1   ichiro 				    irq-16, 1, level, ih_fun, ih_arg));
    299       1.1   ichiro }
    300       1.1   ichiro 
    301       1.1   ichiro static void
    302       1.1   ichiro ipaqpcic_intr_disestablish(so, ih)
    303       1.1   ichiro 	struct sapcic_socket *so;
    304       1.1   ichiro 	void *ih;
    305       1.1   ichiro {
    306       1.3   toshii 	sa11x0_intr_disestablish((sa11x0_chipset_tag_t)so->pcictag_cookie, ih);
    307       1.1   ichiro }
    308