ipaq_pcic.c revision 1.6.8.2 1 1.6.8.2 nathanw /* $NetBSD: ipaq_pcic.c,v 1.6.8.2 2002/08/01 02:41:43 nathanw Exp $ */
2 1.6.8.2 nathanw
3 1.6.8.2 nathanw /*-
4 1.6.8.2 nathanw * Copyright (c) 2001 The NetBSD Foundation, Inc.
5 1.6.8.2 nathanw * All rights reserved.
6 1.6.8.2 nathanw *
7 1.6.8.2 nathanw * This code is derived from software contributed to The NetBSD Foundation
8 1.6.8.2 nathanw * by Ichiro FUKUHARA (ichiro (at) ichiro.org).
9 1.6.8.2 nathanw *
10 1.6.8.2 nathanw * Redistribution and use in source and binary forms, with or without
11 1.6.8.2 nathanw * modification, are permitted provided that the following conditions
12 1.6.8.2 nathanw * are met:
13 1.6.8.2 nathanw * 1. Redistributions of source code must retain the above copyright
14 1.6.8.2 nathanw * notice, this list of conditions and the following disclaimer.
15 1.6.8.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright
16 1.6.8.2 nathanw * notice, this list of conditions and the following disclaimer in the
17 1.6.8.2 nathanw * documentation and/or other materials provided with the distribution.
18 1.6.8.2 nathanw * 3. All advertising materials mentioning features or use of this software
19 1.6.8.2 nathanw * must display the following acknowledgement:
20 1.6.8.2 nathanw * This product includes software developed by the NetBSD
21 1.6.8.2 nathanw * Foundation, Inc. and its contributors.
22 1.6.8.2 nathanw * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.6.8.2 nathanw * contributors may be used to endorse or promote products derived
24 1.6.8.2 nathanw * from this software without specific prior written permission.
25 1.6.8.2 nathanw *
26 1.6.8.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.6.8.2 nathanw * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.6.8.2 nathanw * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.6.8.2 nathanw * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.6.8.2 nathanw * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.6.8.2 nathanw * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.6.8.2 nathanw * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.6.8.2 nathanw * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.6.8.2 nathanw * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.6.8.2 nathanw * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.6.8.2 nathanw * POSSIBILITY OF SUCH DAMAGE.
37 1.6.8.2 nathanw */
38 1.6.8.2 nathanw
39 1.6.8.2 nathanw #include <sys/param.h>
40 1.6.8.2 nathanw #include <sys/systm.h>
41 1.6.8.2 nathanw #include <sys/types.h>
42 1.6.8.2 nathanw #include <sys/conf.h>
43 1.6.8.2 nathanw #include <sys/file.h>
44 1.6.8.2 nathanw #include <sys/device.h>
45 1.6.8.2 nathanw #include <sys/kernel.h>
46 1.6.8.2 nathanw #include <sys/kthread.h>
47 1.6.8.2 nathanw #include <sys/malloc.h>
48 1.6.8.2 nathanw
49 1.6.8.2 nathanw #include <machine/bus.h>
50 1.6.8.2 nathanw #include <dev/pcmcia/pcmciachip.h>
51 1.6.8.2 nathanw #include <dev/pcmcia/pcmciavar.h>
52 1.6.8.2 nathanw
53 1.6.8.2 nathanw #include <hpcarm/dev/ipaq_saipvar.h>
54 1.6.8.2 nathanw #include <hpcarm/dev/ipaq_pcicreg.h>
55 1.6.8.2 nathanw #include <hpcarm/dev/ipaq_gpioreg.h>
56 1.6.8.2 nathanw
57 1.6.8.2 nathanw #include <arm/sa11x0/sa11x0_gpioreg.h>
58 1.6.8.2 nathanw #include <arm/sa11x0/sa11x0_var.h>
59 1.6.8.2 nathanw #include <arm/sa11x0/sa11xx_pcicvar.h>
60 1.6.8.2 nathanw
61 1.6.8.2 nathanw #include "ipaqpcic.h"
62 1.6.8.2 nathanw
63 1.6.8.2 nathanw static int ipaqpcic_match(struct device *, struct cfdata *, void *);
64 1.6.8.2 nathanw static void ipaqpcic_attach(struct device *, struct device *, void *);
65 1.6.8.2 nathanw static int ipaqpcic_print(void *, const char *);
66 1.6.8.2 nathanw static int ipaqpcic_submatch(struct device *, struct cfdata *, void *);
67 1.6.8.2 nathanw
68 1.6.8.2 nathanw static int ipaqpcic_read(struct sapcic_socket *, int);
69 1.6.8.2 nathanw static void ipaqpcic_write(struct sapcic_socket *, int, int);
70 1.6.8.2 nathanw static void ipaqpcic_set_power(struct sapcic_socket *, int);
71 1.6.8.2 nathanw static void ipaqpcic_clear_intr(int);
72 1.6.8.2 nathanw static void *ipaqpcic_intr_establish(struct sapcic_socket *, int,
73 1.6.8.2 nathanw int (*)(void *), void *);
74 1.6.8.2 nathanw static void ipaqpcic_intr_disestablish(struct sapcic_socket *, void *);
75 1.6.8.2 nathanw
76 1.6.8.2 nathanw struct ipaqpcic_softc {
77 1.6.8.2 nathanw struct sapcic_softc sc_pc;
78 1.6.8.2 nathanw bus_space_handle_t sc_ioh;
79 1.6.8.2 nathanw struct ipaq_softc *sc_parent;
80 1.6.8.2 nathanw struct sapcic_socket sc_socket[2];
81 1.6.8.2 nathanw };
82 1.6.8.2 nathanw
83 1.6.8.2 nathanw static void ipaqpcic_init(struct ipaqpcic_softc *);
84 1.6.8.2 nathanw
85 1.6.8.2 nathanw static struct sapcic_tag ipaqpcic_functions = {
86 1.6.8.2 nathanw ipaqpcic_read,
87 1.6.8.2 nathanw ipaqpcic_write,
88 1.6.8.2 nathanw ipaqpcic_set_power,
89 1.6.8.2 nathanw ipaqpcic_clear_intr,
90 1.6.8.2 nathanw ipaqpcic_intr_establish,
91 1.6.8.2 nathanw ipaqpcic_intr_disestablish
92 1.6.8.2 nathanw };
93 1.6.8.2 nathanw
94 1.6.8.2 nathanw struct cfattach ipaqpcic_ca = {
95 1.6.8.2 nathanw sizeof(struct ipaqpcic_softc), ipaqpcic_match, ipaqpcic_attach
96 1.6.8.2 nathanw };
97 1.6.8.2 nathanw
98 1.6.8.2 nathanw static int
99 1.6.8.2 nathanw ipaqpcic_match(parent, cf, aux)
100 1.6.8.2 nathanw struct device *parent;
101 1.6.8.2 nathanw struct cfdata *cf;
102 1.6.8.2 nathanw void *aux;
103 1.6.8.2 nathanw {
104 1.6.8.2 nathanw return (1);
105 1.6.8.2 nathanw }
106 1.6.8.2 nathanw
107 1.6.8.2 nathanw static void
108 1.6.8.2 nathanw ipaqpcic_attach(parent, self, aux)
109 1.6.8.2 nathanw struct device *parent;
110 1.6.8.2 nathanw struct device *self;
111 1.6.8.2 nathanw void *aux;
112 1.6.8.2 nathanw {
113 1.6.8.2 nathanw int i;
114 1.6.8.2 nathanw struct pcmciabus_attach_args paa;
115 1.6.8.2 nathanw struct ipaqpcic_softc *sc = (struct ipaqpcic_softc *)self;
116 1.6.8.2 nathanw struct ipaq_softc *psc = (struct ipaq_softc *)parent;
117 1.6.8.2 nathanw
118 1.6.8.2 nathanw printf("\n");
119 1.6.8.2 nathanw
120 1.6.8.2 nathanw sc->sc_pc.sc_iot = psc->sc_iot;
121 1.6.8.2 nathanw sc->sc_ioh = psc->sc_ioh;
122 1.6.8.2 nathanw sc->sc_parent = (struct ipaq_softc *)parent;
123 1.6.8.2 nathanw
124 1.6.8.2 nathanw ipaqpcic_init(sc);
125 1.6.8.2 nathanw
126 1.6.8.2 nathanw for(i = 0; i < 2; i++) {
127 1.6.8.2 nathanw sc->sc_socket[i].sc = (struct sapcic_softc *)sc;
128 1.6.8.2 nathanw sc->sc_socket[i].socket = i;
129 1.6.8.2 nathanw sc->sc_socket[i].pcictag_cookie = psc;
130 1.6.8.2 nathanw sc->sc_socket[i].pcictag = &ipaqpcic_functions;
131 1.6.8.2 nathanw sc->sc_socket[i].event_thread = NULL;
132 1.6.8.2 nathanw sc->sc_socket[i].event = 0;
133 1.6.8.2 nathanw sc->sc_socket[i].laststatus = SAPCIC_CARD_INVALID;
134 1.6.8.2 nathanw sc->sc_socket[i].shutdown = 0;
135 1.6.8.2 nathanw
136 1.6.8.2 nathanw paa.paa_busname = "pcmcia";
137 1.6.8.2 nathanw paa.pct = (pcmcia_chipset_tag_t)&sa11x0_pcmcia_functions;
138 1.6.8.2 nathanw paa.pch = (pcmcia_chipset_handle_t)&sc->sc_socket[i];
139 1.6.8.2 nathanw paa.iobase = 0;
140 1.6.8.2 nathanw paa.iosize = 0x4000000;
141 1.6.8.2 nathanw
142 1.6.8.2 nathanw sc->sc_socket[i].pcmcia =
143 1.6.8.2 nathanw (struct device *)config_found_sm(&sc->sc_pc.sc_dev,
144 1.6.8.2 nathanw &paa, ipaqpcic_print, ipaqpcic_submatch);
145 1.6.8.2 nathanw
146 1.6.8.2 nathanw sa11x0_intr_establish((sa11x0_chipset_tag_t)psc,
147 1.6.8.2 nathanw i ? IRQ_CD1 : IRQ_CD0,
148 1.6.8.2 nathanw 1, IPL_BIO, sapcic_intr,
149 1.6.8.2 nathanw &sc->sc_socket[i]);
150 1.6.8.2 nathanw
151 1.6.8.2 nathanw /* schedule kthread creation */
152 1.6.8.2 nathanw kthread_create(sapcic_kthread_create, &sc->sc_socket[i]);
153 1.6.8.2 nathanw
154 1.6.8.2 nathanw #if 0 /* XXX */
155 1.6.8.2 nathanw /* establish_intr should be after creating the kthread */
156 1.6.8.2 nathanw config_interrupt(&sc->sc_socket[i], ipaqpcic_config_intr);
157 1.6.8.2 nathanw #endif
158 1.6.8.2 nathanw }
159 1.6.8.2 nathanw }
160 1.6.8.2 nathanw
161 1.6.8.2 nathanw static int
162 1.6.8.2 nathanw ipaqpcic_print(aux, name)
163 1.6.8.2 nathanw void *aux;
164 1.6.8.2 nathanw const char *name;
165 1.6.8.2 nathanw {
166 1.6.8.2 nathanw return (UNCONF);
167 1.6.8.2 nathanw }
168 1.6.8.2 nathanw
169 1.6.8.2 nathanw static int
170 1.6.8.2 nathanw ipaqpcic_submatch(parent, cf, aux)
171 1.6.8.2 nathanw struct device *parent;
172 1.6.8.2 nathanw struct cfdata *cf;
173 1.6.8.2 nathanw void *aux;
174 1.6.8.2 nathanw {
175 1.6.8.2 nathanw return (*cf->cf_attach->ca_match)(parent, cf, aux);
176 1.6.8.2 nathanw }
177 1.6.8.2 nathanw
178 1.6.8.2 nathanw static void
179 1.6.8.2 nathanw ipaqpcic_init(sc)
180 1.6.8.2 nathanw struct ipaqpcic_softc *sc;
181 1.6.8.2 nathanw {
182 1.6.8.2 nathanw int cr;
183 1.6.8.2 nathanw
184 1.6.8.2 nathanw /* All those are inputs */
185 1.6.8.2 nathanw cr = bus_space_read_4(sc->sc_pc.sc_iot, sc->sc_parent->sc_gpioh, SAGPIO_PDR);
186 1.6.8.2 nathanw cr &= ~(GPIO_H3600_PCMCIA_CD0 | GPIO_H3600_PCMCIA_CD1 | GPIO_H3600_PCMCIA_IRQ0 |
187 1.6.8.2 nathanw GPIO_H3600_PCMCIA_IRQ1);
188 1.6.8.2 nathanw bus_space_write_4(sc->sc_pc.sc_iot, sc->sc_parent->sc_gpioh, SAGPIO_PDR, cr);
189 1.6.8.2 nathanw
190 1.6.8.2 nathanw sc->sc_parent->ipaq_egpio |=
191 1.6.8.2 nathanw EGPIO_H3600_OPT_NVRAM_ON | EGPIO_H3600_OPT_ON ;
192 1.6.8.2 nathanw sc->sc_parent->ipaq_egpio &=
193 1.6.8.2 nathanw ~(EGPIO_H3600_CARD_RESET | EGPIO_H3600_OPT_RESET);
194 1.6.8.2 nathanw bus_space_write_2(sc->sc_pc.sc_iot, sc->sc_parent->sc_egpioh,
195 1.6.8.2 nathanw 0, sc->sc_parent->ipaq_egpio);
196 1.6.8.2 nathanw }
197 1.6.8.2 nathanw
198 1.6.8.2 nathanw static int
199 1.6.8.2 nathanw ipaqpcic_read(so, reg)
200 1.6.8.2 nathanw struct sapcic_socket *so;
201 1.6.8.2 nathanw int reg;
202 1.6.8.2 nathanw {
203 1.6.8.2 nathanw int cr, bit;
204 1.6.8.2 nathanw struct ipaqpcic_softc *sc = (struct ipaqpcic_softc *)so->sc;
205 1.6.8.2 nathanw
206 1.6.8.2 nathanw cr = bus_space_read_4(sc->sc_pc.sc_iot, sc->sc_parent->sc_gpioh, SAGPIO_PLR);
207 1.6.8.2 nathanw
208 1.6.8.2 nathanw switch (reg) {
209 1.6.8.2 nathanw case SAPCIC_STATUS_CARD:
210 1.6.8.2 nathanw bit = (so->socket ? GPIO_H3600_PCMCIA_CD0 :
211 1.6.8.2 nathanw GPIO_H3600_PCMCIA_CD1) & cr;
212 1.6.8.2 nathanw if (!bit)
213 1.6.8.2 nathanw return SAPCIC_CARD_INVALID;
214 1.6.8.2 nathanw else
215 1.6.8.2 nathanw return SAPCIC_CARD_VALID;
216 1.6.8.2 nathanw case SAPCIC_STATUS_VS1:
217 1.6.8.2 nathanw case SAPCIC_STATUS_VS2:
218 1.6.8.2 nathanw case SAPCIC_STATUS_READY:
219 1.6.8.2 nathanw bit = (so->socket ? GPIO_H3600_PCMCIA_IRQ0:
220 1.6.8.2 nathanw GPIO_H3600_PCMCIA_IRQ1);
221 1.6.8.2 nathanw return (bit & cr);
222 1.6.8.2 nathanw default:
223 1.6.8.2 nathanw panic("ipaqpcic_read: bogus register\n");
224 1.6.8.2 nathanw }
225 1.6.8.2 nathanw }
226 1.6.8.2 nathanw
227 1.6.8.2 nathanw static void
228 1.6.8.2 nathanw ipaqpcic_write(so, reg, arg)
229 1.6.8.2 nathanw struct sapcic_socket *so;
230 1.6.8.2 nathanw int reg;
231 1.6.8.2 nathanw int arg;
232 1.6.8.2 nathanw {
233 1.6.8.2 nathanw int s;
234 1.6.8.2 nathanw struct ipaqpcic_softc *sc = (struct ipaqpcic_softc *)so->sc;
235 1.6.8.2 nathanw
236 1.6.8.2 nathanw s = splhigh();
237 1.6.8.2 nathanw switch (reg) {
238 1.6.8.2 nathanw case SAPCIC_CONTROL_RESET:
239 1.6.8.2 nathanw sc->sc_parent->ipaq_egpio |= EGPIO_H3600_CARD_RESET;
240 1.6.8.2 nathanw break;
241 1.6.8.2 nathanw case SAPCIC_CONTROL_LINEENABLE:
242 1.6.8.2 nathanw case SAPCIC_CONTROL_WAITENABLE:
243 1.6.8.2 nathanw case SAPCIC_CONTROL_POWERSELECT:
244 1.6.8.2 nathanw break;
245 1.6.8.2 nathanw
246 1.6.8.2 nathanw default:
247 1.6.8.2 nathanw splx(s);
248 1.6.8.2 nathanw panic("ipaqpcic_write: bogus register");
249 1.6.8.2 nathanw }
250 1.6.8.2 nathanw bus_space_write_2(sc->sc_pc.sc_iot, sc->sc_parent->sc_egpioh, 0,
251 1.6.8.2 nathanw sc->sc_parent->ipaq_egpio);
252 1.6.8.2 nathanw splx(s);
253 1.6.8.2 nathanw }
254 1.6.8.2 nathanw
255 1.6.8.2 nathanw static void
256 1.6.8.2 nathanw ipaqpcic_set_power(so, arg)
257 1.6.8.2 nathanw struct sapcic_socket *so;
258 1.6.8.2 nathanw int arg;
259 1.6.8.2 nathanw {
260 1.6.8.2 nathanw int s;
261 1.6.8.2 nathanw struct ipaqpcic_softc *sc = (struct ipaqpcic_softc *)so->sc;
262 1.6.8.2 nathanw
263 1.6.8.2 nathanw s = splbio();
264 1.6.8.2 nathanw switch (arg) {
265 1.6.8.2 nathanw case SAPCIC_POWER_OFF:
266 1.6.8.2 nathanw sc->sc_parent->ipaq_egpio &=
267 1.6.8.2 nathanw ~(EGPIO_H3600_OPT_NVRAM_ON | EGPIO_H3600_OPT_ON);
268 1.6.8.2 nathanw break;
269 1.6.8.2 nathanw case SAPCIC_POWER_3V:
270 1.6.8.2 nathanw case SAPCIC_POWER_5V:
271 1.6.8.2 nathanw sc->sc_parent->ipaq_egpio |=
272 1.6.8.2 nathanw EGPIO_H3600_OPT_NVRAM_ON | EGPIO_H3600_OPT_ON;
273 1.6.8.2 nathanw break;
274 1.6.8.2 nathanw default:
275 1.6.8.2 nathanw panic("ipaqpcic_set_power: bogus arg\n");
276 1.6.8.2 nathanw }
277 1.6.8.2 nathanw bus_space_write_2(sc->sc_pc.sc_iot, sc->sc_parent->sc_egpioh,
278 1.6.8.2 nathanw 0, sc->sc_parent->ipaq_egpio);
279 1.6.8.2 nathanw splx(s);
280 1.6.8.2 nathanw }
281 1.6.8.2 nathanw
282 1.6.8.2 nathanw static void
283 1.6.8.2 nathanw ipaqpcic_clear_intr(arg)
284 1.6.8.2 nathanw {
285 1.6.8.2 nathanw }
286 1.6.8.2 nathanw
287 1.6.8.2 nathanw static void *
288 1.6.8.2 nathanw ipaqpcic_intr_establish(so, level, ih_fun, ih_arg)
289 1.6.8.2 nathanw struct sapcic_socket *so;
290 1.6.8.2 nathanw int level;
291 1.6.8.2 nathanw int (*ih_fun)(void *);
292 1.6.8.2 nathanw void *ih_arg;
293 1.6.8.2 nathanw {
294 1.6.8.2 nathanw int irq;
295 1.6.8.2 nathanw
296 1.6.8.2 nathanw irq = so->socket ? IRQ_IRQ0 : IRQ_IRQ1;
297 1.6.8.2 nathanw return (sa11x0_intr_establish((sa11x0_chipset_tag_t)so->pcictag_cookie,
298 1.6.8.2 nathanw irq-16, 1, level, ih_fun, ih_arg));
299 1.6.8.2 nathanw }
300 1.6.8.2 nathanw
301 1.6.8.2 nathanw static void
302 1.6.8.2 nathanw ipaqpcic_intr_disestablish(so, ih)
303 1.6.8.2 nathanw struct sapcic_socket *so;
304 1.6.8.2 nathanw void *ih;
305 1.6.8.2 nathanw {
306 1.6.8.2 nathanw sa11x0_intr_disestablish((sa11x0_chipset_tag_t)so->pcictag_cookie, ih);
307 1.6.8.2 nathanw }
308