ipaq_saip.c revision 1.9 1 1.9 ichiro /* $NetBSD: ipaq_saip.c,v 1.9 2002/07/20 01:36:56 ichiro Exp $ */
2 1.1 ichiro
3 1.1 ichiro /*-
4 1.1 ichiro * Copyright (c) 2001, The NetBSD Foundation, Inc. All rights reserved.
5 1.1 ichiro *
6 1.1 ichiro * This code is derived from software contributed to The NetBSD Foundation
7 1.1 ichiro * by Ichiro FUKUHARA (ichiro (at) ichiro.org).
8 1.1 ichiro *
9 1.1 ichiro * Redistribution and use in source and binary forms, with or without
10 1.1 ichiro * modification, are permitted provided that the following conditions
11 1.1 ichiro * are met:
12 1.1 ichiro * 1. Redistributions of source code must retain the above copyright
13 1.1 ichiro * notice, this list of conditions and the following disclaimer.
14 1.1 ichiro * 2. Redistributions in binary form must reproduce the above copyright
15 1.1 ichiro * notice, this list of conditions and the following disclaimer in the
16 1.1 ichiro * documentation and/or other materials provided with the distribution.
17 1.1 ichiro * 3. All advertising materials mentioning features or use of this software
18 1.1 ichiro * must display the following acknowledgement:
19 1.1 ichiro * This product includes software developed by the NetBSD
20 1.1 ichiro * Foundation, Inc. and its contributors.
21 1.1 ichiro * 4. Neither the name of The NetBSD Foundation nor the names of its
22 1.1 ichiro * contributors may be used to endorse or promote products derived
23 1.1 ichiro * from this software without specific prior written permission.
24 1.1 ichiro */
25 1.1 ichiro #include <sys/param.h>
26 1.1 ichiro #include <sys/systm.h>
27 1.1 ichiro #include <sys/types.h>
28 1.1 ichiro #include <sys/conf.h>
29 1.1 ichiro #include <sys/device.h>
30 1.1 ichiro #include <sys/kernel.h>
31 1.1 ichiro #include <sys/malloc.h>
32 1.1 ichiro #include <sys/uio.h>
33 1.1 ichiro
34 1.1 ichiro #include <machine/cpu.h>
35 1.1 ichiro #include <machine/bus.h>
36 1.1 ichiro
37 1.9 ichiro #include <arm/sa11x0/sa11x0_var.h>
38 1.9 ichiro #include <arm/sa11x0/sa11x0_reg.h>
39 1.9 ichiro #include <arm/sa11x0/sa11x0_dmacreg.h>
40 1.9 ichiro #include <arm/sa11x0/sa11x0_ppcreg.h>
41 1.9 ichiro #include <arm/sa11x0/sa11x0_gpioreg.h>
42 1.9 ichiro #include <arm/sa11x0/sa11x0_sspreg.h>
43 1.9 ichiro
44 1.4 ichiro #include <hpcarm/dev/ipaq_saipvar.h>
45 1.5 ichiro #include <hpcarm/dev/ipaq_gpioreg.h>
46 1.1 ichiro
47 1.1 ichiro /* prototypes */
48 1.1 ichiro static int ipaq_match(struct device *, struct cfdata *, void *);
49 1.1 ichiro static void ipaq_attach(struct device *, struct device *, void *);
50 1.1 ichiro static int ipaq_search(struct device *, struct cfdata *, void *);
51 1.1 ichiro static int ipaq_print(void *, const char *);
52 1.1 ichiro
53 1.1 ichiro /* attach structures */
54 1.1 ichiro struct cfattach ipaqbus_ca = {
55 1.1 ichiro sizeof(struct ipaq_softc), ipaq_match, ipaq_attach
56 1.1 ichiro };
57 1.1 ichiro
58 1.1 ichiro static int
59 1.1 ichiro ipaq_print(aux, name)
60 1.1 ichiro void *aux;
61 1.1 ichiro const char *name;
62 1.1 ichiro {
63 1.1 ichiro return (UNCONF);
64 1.1 ichiro }
65 1.1 ichiro
66 1.1 ichiro int
67 1.1 ichiro ipaq_match(parent, match, aux)
68 1.1 ichiro struct device *parent;
69 1.1 ichiro struct cfdata *match;
70 1.1 ichiro void *aux;
71 1.1 ichiro {
72 1.3 ichiro return (1);
73 1.1 ichiro }
74 1.1 ichiro
75 1.1 ichiro void
76 1.1 ichiro ipaq_attach(parent, self, aux)
77 1.1 ichiro struct device *parent;
78 1.1 ichiro struct device *self;
79 1.1 ichiro void *aux;
80 1.1 ichiro {
81 1.1 ichiro struct ipaq_softc *sc = (struct ipaq_softc*)self;
82 1.1 ichiro struct sa11x0_softc *psc = (struct sa11x0_softc *)parent;
83 1.1 ichiro
84 1.1 ichiro printf("\n");
85 1.1 ichiro
86 1.2 ichiro sc->sc_iot = psc->sc_iot;
87 1.1 ichiro sc->sc_ioh = psc->sc_ioh;
88 1.1 ichiro sc->sc_gpioh = psc->sc_gpioh;
89 1.1 ichiro
90 1.3 ichiro /* Map the Extended GPIO registers */
91 1.1 ichiro if (bus_space_map(sc->sc_iot, SAEGPIO_BASE, 1, 0, &sc->sc_egpioh))
92 1.1 ichiro panic("%s: unable to map Extended GPIO registers\n",
93 1.1 ichiro self->dv_xname);
94 1.5 ichiro
95 1.5 ichiro sc->ipaq_egpio = EGPIO_INIT;
96 1.5 ichiro bus_space_write_2(sc->sc_iot, sc->sc_egpioh, 0, sc->ipaq_egpio);
97 1.6 ichiro
98 1.6 ichiro /* Map the SSP registers */
99 1.6 ichiro if (bus_space_map(sc->sc_iot, SASSP_BASE, SASSP_NPORTS, 0, &sc->sc_ssph))
100 1.6 ichiro panic("%s: unable to map SSP registers\n",
101 1.6 ichiro self->dv_xname);
102 1.1 ichiro
103 1.1 ichiro sc->sc_ppch = psc->sc_ppch;
104 1.1 ichiro sc->sc_dmach = psc->sc_dmach;
105 1.1 ichiro
106 1.1 ichiro /*
107 1.1 ichiro * Attach each devices
108 1.1 ichiro */
109 1.1 ichiro config_search(ipaq_search, self, NULL);
110 1.1 ichiro }
111 1.1 ichiro
112 1.1 ichiro int
113 1.1 ichiro ipaq_search(parent, cf, aux)
114 1.1 ichiro struct device *parent;
115 1.1 ichiro struct cfdata *cf;
116 1.1 ichiro void *aux;
117 1.1 ichiro {
118 1.1 ichiro if ((*cf->cf_attach->ca_match)(parent, cf, NULL) > 0)
119 1.1 ichiro config_attach(parent, cf, NULL, ipaq_print);
120 1.1 ichiro
121 1.1 ichiro return 0;
122 1.1 ichiro }
123