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sacc_hpcarm.c revision 1.9.8.1
      1 /*      $NetBSD: sacc_hpcarm.c,v 1.9.8.1 2008/05/18 12:32:02 yamt Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 2001 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by IWAMOTO Toshihiro.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 /*
     33  * Platform dependent part for SA-11[01]1 companion chip on hpcarm.
     34  */
     35 
     36 #include <sys/cdefs.h>
     37 __KERNEL_RCSID(0, "$NetBSD: sacc_hpcarm.c,v 1.9.8.1 2008/05/18 12:32:02 yamt Exp $");
     38 
     39 #include <sys/param.h>
     40 #include <sys/systm.h>
     41 #include <sys/types.h>
     42 #include <sys/conf.h>
     43 #include <sys/device.h>
     44 #include <sys/kernel.h>
     45 #include <sys/malloc.h>
     46 #include <sys/uio.h>
     47 
     48 #include <machine/bus.h>
     49 #include <machine/platid.h>
     50 #include <machine/platid_mask.h>
     51 
     52 #include <arm/sa11x0/sa11x0_reg.h>
     53 #include <arm/sa11x0/sa11x0_var.h>
     54 #include <arm/sa11x0/sa11x0_gpioreg.h>
     55 #include <arm/sa11x0/sa1111_reg.h>
     56 #include <arm/sa11x0/sa1111_var.h>
     57 
     58 static void	sacc_attach(struct device *, struct device *, void *);
     59 static int	sacc_intr(void *);
     60 
     61 struct platid_data sacc_platid_table[] = {
     62 	{ &platid_mask_MACH_HP_JORNADA_7XX, (void *)1 },
     63 	{ NULL, NULL }
     64 };
     65 
     66 CFATTACH_DECL(sacc, sizeof(struct sacc_softc),
     67     sacc_probe, sacc_attach, NULL, NULL);
     68 
     69 #ifdef INTR_DEBUG
     70 #define DPRINTF(arg)	printf arg
     71 #else
     72 #define DPRINTF(arg)
     73 #endif
     74 
     75 static void
     76 sacc_attach(struct device *parent, struct device *self, void *aux)
     77 {
     78 	int i, gpiopin;
     79 	uint32_t skid;
     80 	struct sacc_softc *sc = (struct sacc_softc *)self;
     81 	struct sa11x0_softc *psc = (struct sa11x0_softc *)parent;
     82 	struct sa11x0_attach_args *sa = aux;
     83 	struct platid_data *p;
     84 
     85 	printf("\n");
     86 
     87 	sc->sc_iot = sa->sa_iot;
     88 	sc->sc_piot = psc->sc_iot;
     89 	sc->sc_gpioh = psc->sc_gpioh;
     90 
     91 	p = platid_search_data(&platid, sacc_platid_table);
     92 	if (p == NULL)
     93 		return;
     94 
     95 	gpiopin = (int)p->data;
     96 	sc->sc_gpiomask = 1 << gpiopin;
     97 
     98 	if (bus_space_map(sa->sa_iot, sa->sa_addr, sa->sa_size, 0,
     99 			  &sc->sc_ioh)) {
    100 		printf("%s: unable to map registers\n", sc->sc_dev.dv_xname);
    101 		return;
    102 	}
    103 
    104 	skid = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACCSBI_SKID);
    105 
    106 	printf("%s: SA-1111 rev %d.%d\n", sc->sc_dev.dv_xname,
    107 	       (skid & 0xf0) >> 4, skid & 0xf);
    108 
    109 	for (i = 0; i < SACCIC_LEN; i++)
    110 		sc->sc_intrhand[i] = NULL;
    111 
    112 	/* initialize SA-1111 interrupt controller */
    113 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTEN0, 0);
    114 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTEN1, 0);
    115 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTTSTSEL, 0);
    116 	bus_space_write_4(sc->sc_iot, sc->sc_ioh,
    117 			  SACCIC_INTSTATCLR0, 0xffffffff);
    118 	bus_space_write_4(sc->sc_iot, sc->sc_ioh,
    119 			  SACCIC_INTSTATCLR1, 0xffffffff);
    120 
    121 	/* connect to SA-1110's GPIO intr */
    122 	sa11x0_intr_establish(0, gpiopin, 1, IPL_SERIAL, sacc_intr, sc);
    123 
    124 	/* attach each devices */
    125 	config_search_ia(sa1111_search, self, "sacc", NULL);
    126 }
    127 
    128 static int
    129 sacc_intr(void *arg)
    130 {
    131 	int i;
    132 	uint32_t mask;
    133 	struct sacc_intrvec intstat;
    134 	struct sacc_softc *sc = arg;
    135 	struct sacc_intrhand *ih;
    136 
    137 	intstat.lo =
    138 	    bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTSTATCLR0);
    139 	intstat.hi =
    140 	    bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTSTATCLR1);
    141 	DPRINTF(("sacc_intr: %x %x\n", intstat.lo, intstat.hi));
    142 
    143 	/* clear SA-1110's GPIO intr status */
    144 	bus_space_write_4(sc->sc_piot, sc->sc_gpioh,
    145 			  SAGPIO_EDR, sc->sc_gpiomask);
    146 
    147 	for (i = 0, mask = 1; i < 32; i++, mask <<= 1)
    148 		if (intstat.lo & mask) {
    149 			/*
    150 			 * Clear intr status before calling intr handlers.
    151 			 * This cause stray interrupts, but clearing
    152 			 * after calling intr handlers cause intr lossage.
    153 			 */
    154 			bus_space_write_4(sc->sc_iot, sc->sc_ioh,
    155 					  SACCIC_INTSTATCLR0, 1 << i);
    156 
    157 			for (ih = sc->sc_intrhand[i]; ih; ih = ih->ih_next)
    158 				softint_schedule(ih->ih_soft);
    159 		}
    160 	for (i = 0, mask = 1; i < SACCIC_LEN - 32; i++, mask <<= 1)
    161 		if (intstat.hi & mask) {
    162 			bus_space_write_4(sc->sc_iot, sc->sc_ioh,
    163 					  SACCIC_INTSTATCLR1, 1 << i);
    164 			for (ih = sc->sc_intrhand[i + 32]; ih; ih = ih->ih_next)
    165 				softint_schedule(ih->ih_soft);
    166 		}
    167 	return 1;
    168 }
    169