uda1341.c revision 1.1.2.2
1 1.1.2.2 lukem /* $NetBSD: uda1341.c,v 1.1.2.2 2001/08/03 04:11:33 lukem Exp $ */ 2 1.1.2.2 lukem 3 1.1.2.2 lukem /*- 4 1.1.2.2 lukem * Copyright (c) 2001 The NetBSD Foundation, Inc. All rights reserved. 5 1.1.2.2 lukem * 6 1.1.2.2 lukem * This code is derived from software contributed to The NetBSD Foundation 7 1.1.2.2 lukem * by Ichiro FUKUHARA (ichiro (at) ichiro.org). 8 1.1.2.2 lukem * 9 1.1.2.2 lukem * Redistribution and use in source and binary forms, with or without 10 1.1.2.2 lukem * modification, are permitted provided that the following conditions 11 1.1.2.2 lukem * are met: 12 1.1.2.2 lukem * 1. Redistributions of source code must retain the above copyright 13 1.1.2.2 lukem * notice, this list of conditions and the following disclaimer. 14 1.1.2.2 lukem * 2. Redistributions in binary form must reproduce the above copyright 15 1.1.2.2 lukem * notice, this list of conditions and the following disclaimer in the 16 1.1.2.2 lukem * documentation and/or other materials provided with the distribution. 17 1.1.2.2 lukem * 3. All advertising materials mentioning features or use of this software 18 1.1.2.2 lukem * must display the following acknowledgement: 19 1.1.2.2 lukem * This product includes software developed by the NetBSD 20 1.1.2.2 lukem * Foundation, Inc. and its contributors. 21 1.1.2.2 lukem * 4. Neither the name of The NetBSD Foundation nor the names of its 22 1.1.2.2 lukem * contributors may be used to endorse or promote products derived 23 1.1.2.2 lukem * from this software without specific prior written permission. 24 1.1.2.2 lukem * 25 1.1.2.2 lukem * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 26 1.1.2.2 lukem * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 1.1.2.2 lukem * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 1.1.2.2 lukem * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 29 1.1.2.2 lukem * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 1.1.2.2 lukem * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 1.1.2.2 lukem * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 1.1.2.2 lukem * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 1.1.2.2 lukem * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 1.1.2.2 lukem * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 1.1.2.2 lukem * POSSIBILITY OF SUCH DAMAGE. 36 1.1.2.2 lukem */ 37 1.1.2.2 lukem 38 1.1.2.2 lukem #include <sys/param.h> 39 1.1.2.2 lukem #include <sys/systm.h> 40 1.1.2.2 lukem #include <sys/types.h> 41 1.1.2.2 lukem #include <sys/conf.h> 42 1.1.2.2 lukem #include <sys/file.h> 43 1.1.2.2 lukem #include <sys/device.h> 44 1.1.2.2 lukem #include <sys/kernel.h> 45 1.1.2.2 lukem #include <sys/kthread.h> 46 1.1.2.2 lukem #include <sys/malloc.h> 47 1.1.2.2 lukem 48 1.1.2.2 lukem #include <machine/bus.h> 49 1.1.2.2 lukem 50 1.1.2.2 lukem #include <hpcarm/dev/ipaq_saipvar.h> 51 1.1.2.2 lukem #include <hpcarm/dev/ipaq_gpioreg.h> 52 1.1.2.2 lukem #include <hpcarm/dev/uda1341.h> 53 1.1.2.2 lukem #include <hpcarm/sa11x0/sa11x0_gpioreg.h> 54 1.1.2.2 lukem #include <hpcarm/sa11x0/sa11x0_sspreg.h> 55 1.1.2.2 lukem 56 1.1.2.2 lukem struct uda1341_softc { 57 1.1.2.2 lukem struct device sc_dev; 58 1.1.2.2 lukem bus_space_tag_t sc_iot; 59 1.1.2.2 lukem bus_space_handle_t sc_ioh; 60 1.1.2.2 lukem struct ipaq_softc *sc_parent; 61 1.1.2.2 lukem }; 62 1.1.2.2 lukem 63 1.1.2.2 lukem static int uda1341_match(struct device *, struct cfdata *, void *); 64 1.1.2.2 lukem static void uda1341_attach(struct device *, struct device *, void *); 65 1.1.2.2 lukem static int uda1341_print(void *, const char *); 66 1.1.2.2 lukem static int uda1341_search(struct device *, struct cfdata *, void *); 67 1.1.2.2 lukem 68 1.1.2.2 lukem static void uda1341_output_high(struct uda1341_softc *); 69 1.1.2.2 lukem static void uda1341_output_low(struct uda1341_softc *); 70 1.1.2.2 lukem static void uda1341_L3_init(struct uda1341_softc *); 71 1.1.2.2 lukem static void uda1341_init(struct uda1341_softc *); 72 1.1.2.2 lukem static void uda1341_reset(struct uda1341_softc *); 73 1.1.2.2 lukem static void uda1341_reginit(struct uda1341_softc *); 74 1.1.2.2 lukem 75 1.1.2.2 lukem static int L3_getbit(struct uda1341_softc *); 76 1.1.2.2 lukem static void L3_sendbit(struct uda1341_softc *, int); 77 1.1.2.2 lukem static u_int8_t L3_getbyte(struct uda1341_softc *, int); 78 1.1.2.2 lukem static void L3_sendbyte(struct uda1341_softc *, u_int8_t, int); 79 1.1.2.2 lukem static int L3_read(struct uda1341_softc *, u_int8_t, u_int8_t *, int); 80 1.1.2.2 lukem static int L3_write(struct uda1341_softc *, u_int8_t, u_int8_t *, int); 81 1.1.2.2 lukem 82 1.1.2.2 lukem struct cfattach uda_ca = { 83 1.1.2.2 lukem sizeof(struct uda1341_softc), uda1341_match, uda1341_attach 84 1.1.2.2 lukem }; 85 1.1.2.2 lukem 86 1.1.2.2 lukem /* 87 1.1.2.2 lukem * Philips L3 bus support. 88 1.1.2.2 lukem * GPIO lines are used for clock, data and mode pins. 89 1.1.2.2 lukem */ 90 1.1.2.2 lukem #define L3_DATA GPIO_H3600_L3_DATA 91 1.1.2.2 lukem #define L3_MODE GPIO_H3600_L3_MODE 92 1.1.2.2 lukem #define L3_CLK GPIO_H3600_L3_CLK 93 1.1.2.2 lukem 94 1.1.2.2 lukem static struct { 95 1.1.2.2 lukem u_int8_t data0; /* direct addressing register */ 96 1.1.2.2 lukem } DIRECT_REG = {0}; 97 1.1.2.2 lukem 98 1.1.2.2 lukem static struct { 99 1.1.2.2 lukem u_int8_t data0; /* extended addressing register 1 */ 100 1.1.2.2 lukem u_int8_t data1; /* extended addressing register 2 */ 101 1.1.2.2 lukem } EXTEND_REG = {0, 0}; 102 1.1.2.2 lukem 103 1.1.2.2 lukem /* 104 1.1.2.2 lukem * register space access macros 105 1.1.2.2 lukem */ 106 1.1.2.2 lukem #define GPIO_WRITE(sc, reg, val) \ 107 1.1.2.2 lukem bus_space_write_4(sc->sc_iot, sc->sc_parent->sc_gpioh, reg, val) 108 1.1.2.2 lukem #define GPIO_READ(sc, reg) \ 109 1.1.2.2 lukem bus_space_read_4(sc->sc_iot, sc->sc_parent->sc_gpioh, reg) 110 1.1.2.2 lukem #define EGPIO_WRITE(sc) \ 111 1.1.2.2 lukem bus_space_write_2(sc->sc_iot, sc->sc_parent->sc_egpioh, \ 112 1.1.2.2 lukem 0, sc->sc_parent->ipaq_egpio) 113 1.1.2.2 lukem #define SSP_WRITE(sc, reg, val) \ 114 1.1.2.2 lukem bus_space_write_4(sc->sc_iot, sc->sc_parent->sc_ssph, reg, val) 115 1.1.2.2 lukem 116 1.1.2.2 lukem static int 117 1.1.2.2 lukem uda1341_match(parent, cf, aux) 118 1.1.2.2 lukem struct device *parent; 119 1.1.2.2 lukem struct cfdata *cf; 120 1.1.2.2 lukem void *aux; 121 1.1.2.2 lukem { 122 1.1.2.2 lukem return (1); 123 1.1.2.2 lukem } 124 1.1.2.2 lukem 125 1.1.2.2 lukem static void 126 1.1.2.2 lukem uda1341_attach(parent, self, aux) 127 1.1.2.2 lukem struct device *parent; 128 1.1.2.2 lukem struct device *self; 129 1.1.2.2 lukem void *aux; 130 1.1.2.2 lukem { 131 1.1.2.2 lukem struct uda1341_softc *sc = (struct uda1341_softc *)self; 132 1.1.2.2 lukem struct ipaq_softc *psc = (struct ipaq_softc *)parent; 133 1.1.2.2 lukem 134 1.1.2.2 lukem printf("\n"); 135 1.1.2.2 lukem printf("%s: UDA1341 CODEC\n", sc->sc_dev.dv_xname); 136 1.1.2.2 lukem 137 1.1.2.2 lukem sc->sc_iot = psc->sc_iot; 138 1.1.2.2 lukem sc->sc_ioh = psc->sc_ioh; 139 1.1.2.2 lukem sc->sc_parent = (struct ipaq_softc *)parent; 140 1.1.2.2 lukem 141 1.1.2.2 lukem uda1341_L3_init(sc); 142 1.1.2.2 lukem uda1341_init(sc); 143 1.1.2.2 lukem 144 1.1.2.2 lukem uda1341_reset(sc); 145 1.1.2.2 lukem 146 1.1.2.2 lukem uda1341_reginit(sc); 147 1.1.2.2 lukem 148 1.1.2.2 lukem 149 1.1.2.2 lukem /* 150 1.1.2.2 lukem * Attach each devices 151 1.1.2.2 lukem */ 152 1.1.2.2 lukem 153 1.1.2.2 lukem config_search(uda1341_search, self, NULL); 154 1.1.2.2 lukem } 155 1.1.2.2 lukem 156 1.1.2.2 lukem static int 157 1.1.2.2 lukem uda1341_search(parent, cf, aux) 158 1.1.2.2 lukem struct device *parent; 159 1.1.2.2 lukem struct cfdata *cf; 160 1.1.2.2 lukem void *aux; 161 1.1.2.2 lukem { 162 1.1.2.2 lukem if ((*cf->cf_attach->ca_match)(parent, cf, NULL) > 0) 163 1.1.2.2 lukem config_attach(parent, cf, NULL, uda1341_print); 164 1.1.2.2 lukem return 0; 165 1.1.2.2 lukem } 166 1.1.2.2 lukem 167 1.1.2.2 lukem 168 1.1.2.2 lukem static int 169 1.1.2.2 lukem uda1341_print(aux, name) 170 1.1.2.2 lukem void *aux; 171 1.1.2.2 lukem const char *name; 172 1.1.2.2 lukem { 173 1.1.2.2 lukem return (UNCONF); 174 1.1.2.2 lukem } 175 1.1.2.2 lukem 176 1.1.2.2 lukem static void 177 1.1.2.2 lukem uda1341_output_high(sc) 178 1.1.2.2 lukem struct uda1341_softc *sc; 179 1.1.2.2 lukem { 180 1.1.2.2 lukem int cr; 181 1.1.2.2 lukem 182 1.1.2.2 lukem GPIO_WRITE(sc, SAGPIO_PSR, (L3_DATA | L3_MODE | L3_CLK)); 183 1.1.2.2 lukem cr = GPIO_READ(sc, SAGPIO_PDR) | (L3_DATA | L3_MODE | L3_CLK); 184 1.1.2.2 lukem GPIO_WRITE(sc, SAGPIO_PDR, cr); 185 1.1.2.2 lukem } 186 1.1.2.2 lukem 187 1.1.2.2 lukem static void 188 1.1.2.2 lukem uda1341_output_low(sc) 189 1.1.2.2 lukem struct uda1341_softc *sc; 190 1.1.2.2 lukem { 191 1.1.2.2 lukem int cr; 192 1.1.2.2 lukem 193 1.1.2.2 lukem cr = GPIO_READ(sc, SAGPIO_PDR); 194 1.1.2.2 lukem cr &= ~(L3_DATA | L3_MODE | L3_CLK); 195 1.1.2.2 lukem GPIO_WRITE(sc, SAGPIO_PDR, cr); 196 1.1.2.2 lukem } 197 1.1.2.2 lukem 198 1.1.2.2 lukem static void 199 1.1.2.2 lukem uda1341_L3_init(sc) 200 1.1.2.2 lukem struct uda1341_softc *sc; 201 1.1.2.2 lukem { 202 1.1.2.2 lukem int cr; 203 1.1.2.2 lukem 204 1.1.2.2 lukem cr = GPIO_READ(sc, SAGPIO_AFR); 205 1.1.2.2 lukem cr &= ~(L3_DATA | L3_MODE | L3_CLK); 206 1.1.2.2 lukem GPIO_WRITE(sc, SAGPIO_AFR, cr); 207 1.1.2.2 lukem 208 1.1.2.2 lukem uda1341_output_low(sc); 209 1.1.2.2 lukem } 210 1.1.2.2 lukem 211 1.1.2.2 lukem static void 212 1.1.2.2 lukem uda1341_init(sc) 213 1.1.2.2 lukem struct uda1341_softc *sc; 214 1.1.2.2 lukem { 215 1.1.2.2 lukem int cr; 216 1.1.2.2 lukem 217 1.1.2.2 lukem /* GPIO initialize */ 218 1.1.2.2 lukem cr = GPIO_READ(sc, SAGPIO_AFR); 219 1.1.2.2 lukem cr &= ~(GPIO_ALT_SSP_TXD | GPIO_ALT_SSP_RXD | GPIO_ALT_SSP_SCLK | 220 1.1.2.2 lukem GPIO_ALT_SSP_SFRM); 221 1.1.2.2 lukem cr |= GPIO_ALT_SSP_CLK; 222 1.1.2.2 lukem GPIO_WRITE(sc, SAGPIO_AFR, cr); 223 1.1.2.2 lukem 224 1.1.2.2 lukem cr = GPIO_READ(sc, SAGPIO_PDR); 225 1.1.2.2 lukem cr &= ~GPIO_ALT_SSP_CLK; 226 1.1.2.2 lukem GPIO_WRITE(sc, SAGPIO_PDR, cr); 227 1.1.2.2 lukem 228 1.1.2.2 lukem /* SSP initialize & enable */ 229 1.1.2.2 lukem SSP_WRITE(sc, SASSP_CR1, CR1_ECS); 230 1.1.2.2 lukem cr = 0xF | (CR0_FRF_MASK & (1<<4)) | (CR0_SCR_MASK & (3<<8)) | CR0_SSE; 231 1.1.2.2 lukem SSP_WRITE(sc, SASSP_CR0, cr); 232 1.1.2.2 lukem 233 1.1.2.2 lukem /* Enable the audio power */ 234 1.1.2.2 lukem sc->sc_parent->ipaq_egpio |= 235 1.1.2.2 lukem (EGPIO_H3600_AUD_PWRON | EGPIO_H3600_AUD_ON); 236 1.1.2.2 lukem sc->sc_parent->ipaq_egpio &= 237 1.1.2.2 lukem ~(EGPIO_H3600_CODEC_RESET | EGPIO_H3600_QMUTE); 238 1.1.2.2 lukem EGPIO_WRITE(sc); 239 1.1.2.2 lukem 240 1.1.2.2 lukem /* external clock configured for 44100 samples/sec */ 241 1.1.2.2 lukem cr = GPIO_READ(sc, SAGPIO_PDR); 242 1.1.2.2 lukem cr |= (GPIO_H3600_CLK_SET0 | GPIO_H3600_CLK_SET1); 243 1.1.2.2 lukem GPIO_WRITE(sc, SAGPIO_PDR, cr); 244 1.1.2.2 lukem GPIO_WRITE(sc, SAGPIO_PSR, GPIO_H3600_CLK_SET0); 245 1.1.2.2 lukem GPIO_WRITE(sc, SAGPIO_PCR, GPIO_H3600_CLK_SET1); 246 1.1.2.2 lukem 247 1.1.2.2 lukem /* wait for power on */ 248 1.1.2.2 lukem delay(100*1000); 249 1.1.2.2 lukem sc->sc_parent->ipaq_egpio |= EGPIO_H3600_CODEC_RESET; 250 1.1.2.2 lukem EGPIO_WRITE(sc); 251 1.1.2.2 lukem 252 1.1.2.2 lukem /* Wait for the UDA1341 to wake up */ 253 1.1.2.2 lukem delay(100*1000); 254 1.1.2.2 lukem } 255 1.1.2.2 lukem 256 1.1.2.2 lukem static void 257 1.1.2.2 lukem uda1341_reset(sc) 258 1.1.2.2 lukem struct uda1341_softc *sc; 259 1.1.2.2 lukem { 260 1.1.2.2 lukem u_int8_t command; 261 1.1.2.2 lukem 262 1.1.2.2 lukem command = (L3_ADDRESS_COM << 2) | L3_ADDRESS_STATUS; 263 1.1.2.2 lukem DIRECT_REG.data0 = STATUS0_RST | STATUS0_SC_256 | STATUS0_IF_LSB16; 264 1.1.2.2 lukem L3_write(sc, command, (u_int8_t *) &DIRECT_REG, 1); 265 1.1.2.2 lukem 266 1.1.2.2 lukem sc->sc_parent->ipaq_egpio &= ~EGPIO_H3600_CODEC_RESET; 267 1.1.2.2 lukem EGPIO_WRITE(sc); 268 1.1.2.2 lukem sc->sc_parent->ipaq_egpio |= EGPIO_H3600_CODEC_RESET; 269 1.1.2.2 lukem EGPIO_WRITE(sc); 270 1.1.2.2 lukem 271 1.1.2.2 lukem DIRECT_REG.data0 &= ~STATUS0_RST; 272 1.1.2.2 lukem L3_write(sc, command, (u_int8_t *) &DIRECT_REG, 1); 273 1.1.2.2 lukem } 274 1.1.2.2 lukem 275 1.1.2.2 lukem static void 276 1.1.2.2 lukem uda1341_reginit(sc) 277 1.1.2.2 lukem struct uda1341_softc *sc; 278 1.1.2.2 lukem { 279 1.1.2.2 lukem u_int8_t command; 280 1.1.2.2 lukem 281 1.1.2.2 lukem /* STATUS 0 */ 282 1.1.2.2 lukem command = (L3_ADDRESS_COM << 2) | L3_ADDRESS_STATUS; 283 1.1.2.2 lukem DIRECT_REG.data0 = STATUS0_SC_256 | STATUS0_IF_LSB16; 284 1.1.2.2 lukem L3_write(sc, command, (u_int8_t *) &DIRECT_REG, 1); 285 1.1.2.2 lukem 286 1.1.2.2 lukem /* STATUS 1 */ 287 1.1.2.2 lukem DIRECT_REG.data0 = STATUS1_OGS | STATUS1_IGS | (1<<7); 288 1.1.2.2 lukem L3_write(sc, command, (u_int8_t *) &DIRECT_REG, 1); 289 1.1.2.2 lukem 290 1.1.2.2 lukem /* DATA 0 */ 291 1.1.2.2 lukem command = (L3_ADDRESS_COM << 2) | L3_ADDRESS_DATA0; 292 1.1.2.2 lukem DIRECT_REG.data0 = DATA0_VC(100) | DATA0_COMMON; 293 1.1.2.2 lukem L3_write(sc, command, (u_int8_t *) &DIRECT_REG, 1); 294 1.1.2.2 lukem 295 1.1.2.2 lukem /* DATA 1 */ 296 1.1.2.2 lukem DIRECT_REG.data0 = DATA1_BB(0) | DATA1_TR(0) | DATA1_COMMON; 297 1.1.2.2 lukem L3_write(sc, command, (u_int8_t *) &DIRECT_REG, 1); 298 1.1.2.2 lukem 299 1.1.2.2 lukem /* DATA 2*/ 300 1.1.2.2 lukem DIRECT_REG.data0 = DATA2_PP | DATA2_COMMON; 301 1.1.2.2 lukem L3_write(sc, command, (u_int8_t *) &DIRECT_REG, 1); 302 1.1.2.2 lukem 303 1.1.2.2 lukem /* Extended DATA 0 */ 304 1.1.2.2 lukem EXTEND_REG.data0 = EXT_ADDR_COMMON | EXT_ADDR_E0; 305 1.1.2.2 lukem EXTEND_REG.data1 = EXT_DATA_COMMN | 0x4 ; 306 1.1.2.2 lukem L3_write(sc, command, (u_int8_t *) &EXTEND_REG, 2); 307 1.1.2.2 lukem 308 1.1.2.2 lukem /* Extended DATA 1 */ 309 1.1.2.2 lukem EXTEND_REG.data0 = EXT_ADDR_COMMON | EXT_ADDR_E1; 310 1.1.2.2 lukem EXTEND_REG.data1 = EXT_DATA_COMMN | 0x4 ; 311 1.1.2.2 lukem L3_write(sc, command, (u_int8_t *) &EXTEND_REG, 2); 312 1.1.2.2 lukem 313 1.1.2.2 lukem /* Extended DATA 2 */ 314 1.1.2.2 lukem EXTEND_REG.data0 = EXT_ADDR_COMMON | EXT_ADDR_E2; 315 1.1.2.2 lukem EXTEND_REG.data1 = EXT_DATA_COMMN | DATA_E2_MS(30); 316 1.1.2.2 lukem L3_write(sc, command, (u_int8_t *) &EXTEND_REG, 2); 317 1.1.2.2 lukem 318 1.1.2.2 lukem /* Extended DATA 3 */ 319 1.1.2.2 lukem EXTEND_REG.data0 = EXT_ADDR_COMMON | EXT_ADDR_E3; 320 1.1.2.2 lukem EXTEND_REG.data1 = EXT_DATA_COMMN | DATA_E3_IG_L(0); 321 1.1.2.2 lukem L3_write(sc, command, (u_int8_t *) &EXTEND_REG, 2); 322 1.1.2.2 lukem 323 1.1.2.2 lukem /* Extended DATA 4 */ 324 1.1.2.2 lukem EXTEND_REG.data0 = EXT_ADDR_COMMON | EXT_ADDR_E4; 325 1.1.2.2 lukem EXTEND_REG.data1 = EXT_DATA_COMMN | DATA_E4_IG_H(0); 326 1.1.2.2 lukem L3_write(sc, command, (u_int8_t *) &EXTEND_REG, 2); 327 1.1.2.2 lukem 328 1.1.2.2 lukem /* Extended DATA 5 */ 329 1.1.2.2 lukem EXTEND_REG.data0 = EXT_ADDR_COMMON | EXT_ADDR_E5; 330 1.1.2.2 lukem EXTEND_REG.data1 = EXT_DATA_COMMN; 331 1.1.2.2 lukem L3_write(sc, command, (u_int8_t *) &EXTEND_REG, 2); 332 1.1.2.2 lukem } 333 1.1.2.2 lukem 334 1.1.2.2 lukem static int 335 1.1.2.2 lukem L3_getbit(sc) 336 1.1.2.2 lukem struct uda1341_softc *sc; 337 1.1.2.2 lukem { 338 1.1.2.2 lukem int cr, data; 339 1.1.2.2 lukem 340 1.1.2.2 lukem GPIO_WRITE(sc, SAGPIO_PCR, L3_CLK); /* Clock down */ 341 1.1.2.2 lukem delay(L3_CLK_LOW); 342 1.1.2.2 lukem 343 1.1.2.2 lukem cr = GPIO_READ(sc, SAGPIO_PLR); 344 1.1.2.2 lukem data = (cr & L3_DATA) ? 1 : 0; 345 1.1.2.2 lukem 346 1.1.2.2 lukem GPIO_WRITE(sc, SAGPIO_PSR, L3_CLK); /* Clock up */ 347 1.1.2.2 lukem delay(L3_CLK_HIGH); 348 1.1.2.2 lukem 349 1.1.2.2 lukem return (data); 350 1.1.2.2 lukem } 351 1.1.2.2 lukem 352 1.1.2.2 lukem static void 353 1.1.2.2 lukem L3_sendbit(sc, bit) 354 1.1.2.2 lukem struct uda1341_softc *sc; 355 1.1.2.2 lukem int bit; 356 1.1.2.2 lukem { 357 1.1.2.2 lukem GPIO_WRITE(sc, SAGPIO_PCR, L3_CLK); /* Clock down */ 358 1.1.2.2 lukem 359 1.1.2.2 lukem if (bit & 0x01) 360 1.1.2.2 lukem GPIO_WRITE(sc, SAGPIO_PSR, L3_DATA); 361 1.1.2.2 lukem else 362 1.1.2.2 lukem GPIO_WRITE(sc, SAGPIO_PCR, L3_DATA); 363 1.1.2.2 lukem 364 1.1.2.2 lukem delay(L3_CLK_LOW); 365 1.1.2.2 lukem GPIO_WRITE(sc, SAGPIO_PSR, L3_CLK); /* Clock up */ 366 1.1.2.2 lukem delay(L3_CLK_HIGH); 367 1.1.2.2 lukem } 368 1.1.2.2 lukem 369 1.1.2.2 lukem static u_int8_t 370 1.1.2.2 lukem L3_getbyte(sc, mode) 371 1.1.2.2 lukem struct uda1341_softc *sc; 372 1.1.2.2 lukem int mode; 373 1.1.2.2 lukem { 374 1.1.2.2 lukem int i; 375 1.1.2.2 lukem u_int8_t data; 376 1.1.2.2 lukem 377 1.1.2.2 lukem switch (mode) { 378 1.1.2.2 lukem case 0: /* Address mode */ 379 1.1.2.2 lukem case 1: /* First data byte */ 380 1.1.2.2 lukem break; 381 1.1.2.2 lukem default: /* second data byte via halt-Time */ 382 1.1.2.2 lukem GPIO_WRITE(sc, SAGPIO_PCR, L3_CLK); /* Clock down */ 383 1.1.2.2 lukem delay(L3_HALT); 384 1.1.2.2 lukem GPIO_WRITE(sc, SAGPIO_PSR, L3_CLK); /* Clock up */ 385 1.1.2.2 lukem break; 386 1.1.2.2 lukem } 387 1.1.2.2 lukem 388 1.1.2.2 lukem delay(L3_MODE_SETUP); 389 1.1.2.2 lukem 390 1.1.2.2 lukem for (i = 0; i < 8; i++) 391 1.1.2.2 lukem data |= (L3_getbit(sc) << i); 392 1.1.2.2 lukem 393 1.1.2.2 lukem delay(L3_MODE_HOLD); 394 1.1.2.2 lukem 395 1.1.2.2 lukem return (data); 396 1.1.2.2 lukem } 397 1.1.2.2 lukem 398 1.1.2.2 lukem static void 399 1.1.2.2 lukem L3_sendbyte(sc, data, mode) 400 1.1.2.2 lukem struct uda1341_softc *sc; 401 1.1.2.2 lukem u_int8_t data; 402 1.1.2.2 lukem int mode; 403 1.1.2.2 lukem { 404 1.1.2.2 lukem int i; 405 1.1.2.2 lukem 406 1.1.2.2 lukem switch (mode) { 407 1.1.2.2 lukem case 0: /* Address mode */ 408 1.1.2.2 lukem GPIO_WRITE(sc, SAGPIO_PCR, L3_CLK); /* Clock down */ 409 1.1.2.2 lukem break; 410 1.1.2.2 lukem case 1: /* First data byte */ 411 1.1.2.2 lukem break; 412 1.1.2.2 lukem default: /* second data byte via halt-Time */ 413 1.1.2.2 lukem GPIO_WRITE(sc, SAGPIO_PCR, L3_CLK); /* Clock down */ 414 1.1.2.2 lukem delay(L3_HALT); 415 1.1.2.2 lukem GPIO_WRITE(sc, SAGPIO_PSR, L3_CLK); /* Clock up */ 416 1.1.2.2 lukem break; 417 1.1.2.2 lukem } 418 1.1.2.2 lukem 419 1.1.2.2 lukem delay(L3_MODE_SETUP); 420 1.1.2.2 lukem 421 1.1.2.2 lukem for (i = 0; i < 8; i++) 422 1.1.2.2 lukem L3_sendbit(sc, data >> i); 423 1.1.2.2 lukem 424 1.1.2.2 lukem if (mode == 0) /* Address mode */ 425 1.1.2.2 lukem GPIO_WRITE(sc, SAGPIO_PSR, L3_CLK); /* Clock up */ 426 1.1.2.2 lukem 427 1.1.2.2 lukem delay(L3_MODE_HOLD); 428 1.1.2.2 lukem } 429 1.1.2.2 lukem 430 1.1.2.2 lukem static int 431 1.1.2.2 lukem L3_read(sc, addr, data, len) 432 1.1.2.2 lukem struct uda1341_softc *sc; 433 1.1.2.2 lukem u_int8_t addr, *data; 434 1.1.2.2 lukem int len; 435 1.1.2.2 lukem { 436 1.1.2.2 lukem int cr, mode; 437 1.1.2.2 lukem mode = 0; 438 1.1.2.2 lukem 439 1.1.2.2 lukem uda1341_output_high(sc); 440 1.1.2.2 lukem L3_sendbyte(sc, addr, mode++); 441 1.1.2.2 lukem 442 1.1.2.2 lukem cr = GPIO_READ(sc, SAGPIO_PDR); 443 1.1.2.2 lukem cr &= ~(L3_DATA); 444 1.1.2.2 lukem GPIO_WRITE(sc, SAGPIO_PDR, cr); 445 1.1.2.2 lukem 446 1.1.2.2 lukem while(len--) 447 1.1.2.2 lukem *data++ = L3_getbyte(sc, mode++); 448 1.1.2.2 lukem uda1341_output_low(sc); 449 1.1.2.2 lukem 450 1.1.2.2 lukem return len; 451 1.1.2.2 lukem } 452 1.1.2.2 lukem 453 1.1.2.2 lukem static int 454 1.1.2.2 lukem L3_write(sc, addr, data, len) 455 1.1.2.2 lukem struct uda1341_softc *sc; 456 1.1.2.2 lukem u_int8_t addr, *data; 457 1.1.2.2 lukem int len; 458 1.1.2.2 lukem { 459 1.1.2.2 lukem int mode = 0; 460 1.1.2.2 lukem 461 1.1.2.2 lukem uda1341_output_high(sc); 462 1.1.2.2 lukem L3_sendbyte(sc, addr, mode++); 463 1.1.2.2 lukem while(len--) 464 1.1.2.2 lukem L3_sendbyte(sc, *data++, mode++); 465 1.1.2.2 lukem uda1341_output_low(sc); 466 1.1.2.2 lukem 467 1.1.2.2 lukem return len; 468 1.1.2.2 lukem } 469
Indexes created Wed Oct 01 19:09:53 GMT 2025