wzero3_kbd.c revision 1.5.2.2 1 1.5.2.2 rmind /* $NetBSD: wzero3_kbd.c,v 1.5.2.2 2010/05/30 05:16:51 rmind Exp $ */
2 1.5.2.2 rmind
3 1.5.2.2 rmind /*
4 1.5.2.2 rmind * Copyright (c) 2008, 2009, 2010 NONAKA Kimihiro <nonaka (at) netbsd.org>
5 1.5.2.2 rmind * All rights reserved.
6 1.5.2.2 rmind *
7 1.5.2.2 rmind * Redistribution and use in source and binary forms, with or without
8 1.5.2.2 rmind * modification, are permitted provided that the following conditions
9 1.5.2.2 rmind * are met:
10 1.5.2.2 rmind * 1. Redistributions of source code must retain the above copyright
11 1.5.2.2 rmind * notice, this list of conditions and the following disclaimer.
12 1.5.2.2 rmind * 2. Redistributions in binary form must reproduce the above copyright
13 1.5.2.2 rmind * notice, this list of conditions and the following disclaimer in the
14 1.5.2.2 rmind * documentation and/or other materials provided with the distribution.
15 1.5.2.2 rmind *
16 1.5.2.2 rmind * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
17 1.5.2.2 rmind * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 1.5.2.2 rmind * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 1.5.2.2 rmind * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
20 1.5.2.2 rmind * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 1.5.2.2 rmind * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 1.5.2.2 rmind * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 1.5.2.2 rmind * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 1.5.2.2 rmind * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 1.5.2.2 rmind * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 1.5.2.2 rmind * SUCH DAMAGE.
27 1.5.2.2 rmind */
28 1.5.2.2 rmind
29 1.5.2.2 rmind #include <sys/cdefs.h>
30 1.5.2.2 rmind __KERNEL_RCSID(0, "$NetBSD: wzero3_kbd.c,v 1.5.2.2 2010/05/30 05:16:51 rmind Exp $");
31 1.5.2.2 rmind
32 1.5.2.2 rmind #include <sys/param.h>
33 1.5.2.2 rmind #include <sys/systm.h>
34 1.5.2.2 rmind #include <sys/device.h>
35 1.5.2.2 rmind #include <sys/kernel.h>
36 1.5.2.2 rmind #include <sys/malloc.h>
37 1.5.2.2 rmind #include <sys/callout.h>
38 1.5.2.2 rmind
39 1.5.2.2 rmind #include <dev/sysmon/sysmonvar.h>
40 1.5.2.2 rmind #include <dev/sysmon/sysmon_taskq.h>
41 1.5.2.2 rmind
42 1.5.2.2 rmind #include <arm/xscale/pxa2x0cpu.h>
43 1.5.2.2 rmind #include <arm/xscale/pxa2x0var.h>
44 1.5.2.2 rmind #include <arm/xscale/pxa2x0_gpio.h>
45 1.5.2.2 rmind
46 1.5.2.2 rmind #include <machine/bus.h>
47 1.5.2.2 rmind #include <machine/bootinfo.h>
48 1.5.2.2 rmind #include <machine/config_hook.h>
49 1.5.2.2 rmind #include <machine/platid.h>
50 1.5.2.2 rmind #include <machine/platid_mask.h>
51 1.5.2.2 rmind
52 1.5.2.2 rmind #include <dev/hpc/hpckbdvar.h>
53 1.5.2.2 rmind
54 1.5.2.2 rmind #include <arch/hpcarm/dev/wzero3_reg.h>
55 1.5.2.2 rmind
56 1.5.2.2 rmind #ifdef DEBUG
57 1.5.2.2 rmind #define DPRINTF(arg) printf arg
58 1.5.2.2 rmind #else
59 1.5.2.2 rmind #define DPRINTF(arg) /* nothing */
60 1.5.2.2 rmind #endif
61 1.5.2.2 rmind
62 1.5.2.2 rmind #define CSR_READ1(r) bus_space_read_1(sc->sc_iot, sc->sc_ioh, (r))
63 1.5.2.2 rmind #define CSR_WRITE1(r,v) bus_space_write_1(sc->sc_iot, sc->sc_ioh, (r), (v))
64 1.5.2.2 rmind #define CSR_READ2(r) bus_space_read_2(sc->sc_iot, sc->sc_ioh, (r))
65 1.5.2.2 rmind #define CSR_WRITE2(r,v) bus_space_write_2(sc->sc_iot, sc->sc_ioh, (r), (v))
66 1.5.2.2 rmind #define CSR_READ4(r) bus_space_read_4(sc->sc_iot, sc->sc_ioh, (r))
67 1.5.2.2 rmind #define CSR_WRITE4(r,v) bus_space_write_4(sc->sc_iot, sc->sc_ioh, (r), (v))
68 1.5.2.2 rmind
69 1.5.2.2 rmind /* register */
70 1.5.2.2 rmind #define KBDCOL_L (0x00) /* Write */
71 1.5.2.2 rmind #define KBDCOL_U (0x04) /* Write */
72 1.5.2.2 rmind #define KBDCHARGE (0x08) /* Write */
73 1.5.2.2 rmind #define KBDDATA (0x08) /* Read */
74 1.5.2.2 rmind #define REGMAPSIZE 0x0c
75 1.5.2.2 rmind
76 1.5.2.2 rmind #define KEYWAIT 20 /* us */
77 1.5.2.2 rmind
78 1.5.2.2 rmind #define WS003SH_NCOLUMN 12
79 1.5.2.2 rmind #define WS003SH_NROW 7
80 1.5.2.2 rmind
81 1.5.2.2 rmind struct wzero3kbd_softc {
82 1.5.2.2 rmind device_t sc_dev;
83 1.5.2.2 rmind
84 1.5.2.2 rmind bus_space_tag_t sc_iot;
85 1.5.2.2 rmind bus_space_handle_t sc_ioh;
86 1.5.2.2 rmind
87 1.5.2.2 rmind int sc_ncolumn;
88 1.5.2.2 rmind int sc_nrow;
89 1.5.2.2 rmind uint8_t *sc_okeystat;
90 1.5.2.2 rmind uint8_t *sc_keystat;
91 1.5.2.2 rmind
92 1.5.2.2 rmind void *sc_key_ih;
93 1.5.2.2 rmind void *sc_power_ih;
94 1.5.2.2 rmind void *sc_reset_ih;
95 1.5.2.2 rmind
96 1.5.2.2 rmind int sc_key_pin;
97 1.5.2.2 rmind int sc_power_pin;
98 1.5.2.2 rmind int sc_reset_pin;
99 1.5.2.2 rmind
100 1.5.2.2 rmind struct hpckbd_ic_if sc_if;
101 1.5.2.2 rmind struct hpckbd_if *sc_hpckbd;
102 1.5.2.2 rmind
103 1.5.2.2 rmind struct sysmon_pswitch sc_smpsw; /* for reset key */
104 1.5.2.2 rmind
105 1.5.2.2 rmind int sc_enabled;
106 1.5.2.2 rmind
107 1.5.2.2 rmind /* polling stuff */
108 1.5.2.2 rmind struct callout sc_keyscan_ch;
109 1.5.2.2 rmind int sc_interval;
110 1.5.2.2 rmind #define KEY_INTERVAL 50 /* ms */
111 1.5.2.2 rmind
112 1.5.2.2 rmind #if defined(KEYTEST) || defined(KEYTEST2) || defined(KEYTEST3) || defined(KEYTEST4) || defined(KEYTEST5)
113 1.5.2.2 rmind void *sc_test_ih;
114 1.5.2.2 rmind int sc_test_pin;
115 1.5.2.2 rmind int sc_nouse_pin;
116 1.5.2.2 rmind int sc_nouse_pin2;
117 1.5.2.2 rmind int sc_nouse_pin3;
118 1.5.2.2 rmind int sc_bit;
119 1.5.2.2 rmind #endif
120 1.5.2.2 rmind };
121 1.5.2.2 rmind
122 1.5.2.2 rmind static int wzero3kbd_match(device_t, cfdata_t, void *);
123 1.5.2.2 rmind static void wzero3kbd_attach(device_t, device_t, void *);
124 1.5.2.2 rmind
125 1.5.2.2 rmind CFATTACH_DECL_NEW(wzero3kbd, sizeof(struct wzero3kbd_softc),
126 1.5.2.2 rmind wzero3kbd_match, wzero3kbd_attach, NULL, NULL);
127 1.5.2.2 rmind
128 1.5.2.2 rmind static int wzero3kbd_intr(void *arg);
129 1.5.2.2 rmind #if defined(KEYTEST)
130 1.5.2.2 rmind static int wzero3kbd_intr2(void *arg);
131 1.5.2.2 rmind #endif
132 1.5.2.2 rmind #if defined(KEYTEST3)
133 1.5.2.2 rmind static int wzero3kbd_intr3(void *arg);
134 1.5.2.2 rmind #endif
135 1.5.2.2 rmind static void wzero3kbd_tick(void *arg);
136 1.5.2.2 rmind static int wzero3kbd_power_intr(void *arg);
137 1.5.2.2 rmind static int wzero3kbd_reset_intr(void *arg);
138 1.5.2.2 rmind static int wzero3kbd_input_establish(void *arg, struct hpckbd_if *kbdif);
139 1.5.2.2 rmind static void wzero3kbd_sysmon_reset_event(void *arg);
140 1.5.2.2 rmind static int wzero3kbd_poll(void *arg);
141 1.5.2.2 rmind static int wzero3kbd_poll1(void *arg);
142 1.5.2.2 rmind
143 1.5.2.2 rmind /*
144 1.5.2.2 rmind * WS003SH/WS004SH/WS007SH keyscan map
145 1.5.2.2 rmind col#0 col#1 col#2 col#3 col#4 col#5 col#6 col#7 col#8 col#9 col#10 col#11
146 1.5.2.2 rmind row#0: CTRL 1 3 5 6 7 9 0 BS (none) ROTATE CAMERA
147 1.5.2.2 rmind row#1: (none) 2 4 r y 8 i o p (none) VOL- VOL+
148 1.5.2.2 rmind row#2: TAB q e t g u j k (none) (none) (none) (none)
149 1.5.2.2 rmind row#3: (none) w s f v h m l (none) (none) SHIFT (none)
150 1.5.2.2 rmind row#4: CALL a d c b n . (none) ENTER (none) WIN (none)
151 1.5.2.2 rmind row#5: MAIL z x - SPACE / (none) UP (none) (none) LSOFT FN
152 1.5.2.2 rmind row#6: IE MOJI (none) OK ACTION , LEFT DOWN RIGHT (none) RSOFT (none)
153 1.5.2.2 rmind */
154 1.5.2.2 rmind
155 1.5.2.2 rmind /*
156 1.5.2.2 rmind * WS011SH keyscan map
157 1.5.2.2 rmind col#0 col#1 col#2 col#3 col#4 col#5 col#6 col#7 col#8 col#9 col#10 col#11
158 1.5.2.2 rmind row#0 Ctrl (none) (none) (none) (none) (none) (none) (none) Del (none) ROTATE (none)
159 1.5.2.2 rmind row#1 (none) (none) (none) R Y (none) I O P (none) (none) (none)
160 1.5.2.2 rmind row#2 Tab Q E T G U J K (none) (none) (none) (none)
161 1.5.2.2 rmind row#3 (none) W S F V H M L (none) (none) Shift (none)
162 1.5.2.2 rmind row#4 (none) A D C B N . (none) Enter (none) (none) (none)
163 1.5.2.2 rmind row#5 (none) Z X - Space / (none) UP (none) (none) (none) Fn
164 1.5.2.2 rmind row#6 (none) MOJI HAN/ZEN OK (none) , LEFT DOWN RIGHT (none) (none) (none)
165 1.5.2.2 rmind */
166 1.5.2.2 rmind
167 1.5.2.2 rmind /*
168 1.5.2.2 rmind * WS020SH keyscan map
169 1.5.2.2 rmind col#0 col#1 col#2 col#3 col#4 col#5 col#6 col#7 col#8 col#9 col#10 col#11
170 1.5.2.2 rmind row#0 Ctrl (none) (none) (none) (none) (none) (none) (none) Del (none) ROTATE (none)
171 1.5.2.2 rmind row#1 (none) (none) (none) R Y (none) I O P (none) MEDIA (none)
172 1.5.2.2 rmind row#2 Tab Q E T G U J K (none) (none) (none) (none)
173 1.5.2.2 rmind row#3 (none) W S F V H M L (none) (none) LShift (none)
174 1.5.2.2 rmind row#4 (none) A D C B N . (none) Enter (none) RShift (none)
175 1.5.2.2 rmind row#5 (none) Z X - Space / (none) UP (none) DOWN (none) Fn
176 1.5.2.2 rmind row#6 (none) MOJI HAN/ZEN OK (none) , LEFT (none) RIGHT (none) (none) (none)
177 1.5.2.2 rmind */
178 1.5.2.2 rmind
179 1.5.2.2 rmind static const struct wzero3kbd_model {
180 1.5.2.2 rmind platid_mask_t *platid;
181 1.5.2.2 rmind int key_pin;
182 1.5.2.2 rmind int power_pin;
183 1.5.2.2 rmind int reset_pin;
184 1.5.2.2 rmind int ncolumn;
185 1.5.2.2 rmind int nrow;
186 1.5.2.2 rmind } wzero3kbd_table[] = {
187 1.5.2.2 rmind /* WS003SH */
188 1.5.2.2 rmind {
189 1.5.2.2 rmind &platid_mask_MACH_SHARP_WZERO3_WS003SH,
190 1.5.2.2 rmind -1, /* XXX */
191 1.5.2.2 rmind GPIO_WS003SH_POWER_BUTTON,
192 1.5.2.2 rmind -1, /* None */
193 1.5.2.2 rmind WS003SH_NCOLUMN,
194 1.5.2.2 rmind WS003SH_NROW,
195 1.5.2.2 rmind },
196 1.5.2.2 rmind /* WS004SH */
197 1.5.2.2 rmind {
198 1.5.2.2 rmind &platid_mask_MACH_SHARP_WZERO3_WS004SH,
199 1.5.2.2 rmind -1, /* XXX */
200 1.5.2.2 rmind GPIO_WS003SH_POWER_BUTTON,
201 1.5.2.2 rmind -1, /* None */
202 1.5.2.2 rmind WS003SH_NCOLUMN,
203 1.5.2.2 rmind WS003SH_NROW,
204 1.5.2.2 rmind },
205 1.5.2.2 rmind /* WS007SH */
206 1.5.2.2 rmind {
207 1.5.2.2 rmind &platid_mask_MACH_SHARP_WZERO3_WS007SH,
208 1.5.2.2 rmind -1, /* XXX */
209 1.5.2.2 rmind GPIO_WS007SH_POWER_BUTTON,
210 1.5.2.2 rmind GPIO_WS007SH_RESET_BUTTON,
211 1.5.2.2 rmind WS003SH_NCOLUMN,
212 1.5.2.2 rmind WS003SH_NROW,
213 1.5.2.2 rmind },
214 1.5.2.2 rmind /* WS011SH */
215 1.5.2.2 rmind {
216 1.5.2.2 rmind &platid_mask_MACH_SHARP_WZERO3_WS011SH,
217 1.5.2.2 rmind -1, /* XXX */
218 1.5.2.2 rmind GPIO_WS011SH_POWER_BUTTON,
219 1.5.2.2 rmind GPIO_WS011SH_RESET_BUTTON,
220 1.5.2.2 rmind WS003SH_NCOLUMN,
221 1.5.2.2 rmind WS003SH_NROW,
222 1.5.2.2 rmind },
223 1.5.2.2 rmind /* WS020SH */
224 1.5.2.2 rmind {
225 1.5.2.2 rmind &platid_mask_MACH_SHARP_WZERO3_WS020SH,
226 1.5.2.2 rmind -1, /* XXX */
227 1.5.2.2 rmind GPIO_WS020SH_POWER_BUTTON,
228 1.5.2.2 rmind GPIO_WS020SH_RESET_BUTTON,
229 1.5.2.2 rmind WS003SH_NCOLUMN,
230 1.5.2.2 rmind WS003SH_NROW,
231 1.5.2.2 rmind },
232 1.5.2.2 rmind
233 1.5.2.2 rmind { NULL, -1, -1, -1, 0, 0, }
234 1.5.2.2 rmind };
235 1.5.2.2 rmind
236 1.5.2.2 rmind static const struct wzero3kbd_model *
237 1.5.2.2 rmind wzero3kbd_lookup(void)
238 1.5.2.2 rmind {
239 1.5.2.2 rmind const struct wzero3kbd_model *model;
240 1.5.2.2 rmind
241 1.5.2.2 rmind for (model = wzero3kbd_table; model->platid != NULL; model++) {
242 1.5.2.2 rmind if (platid_match(&platid, model->platid)) {
243 1.5.2.2 rmind return model;
244 1.5.2.2 rmind }
245 1.5.2.2 rmind }
246 1.5.2.2 rmind return NULL;
247 1.5.2.2 rmind }
248 1.5.2.2 rmind
249 1.5.2.2 rmind static int
250 1.5.2.2 rmind wzero3kbd_match(struct device *parent, struct cfdata *cf, void *aux)
251 1.5.2.2 rmind {
252 1.5.2.2 rmind
253 1.5.2.2 rmind if (strcmp(cf->cf_name, "wzero3kbd") != 0)
254 1.5.2.2 rmind return 0;
255 1.5.2.2 rmind if (wzero3kbd_lookup() == NULL)
256 1.5.2.2 rmind return 0;
257 1.5.2.2 rmind return 1;
258 1.5.2.2 rmind }
259 1.5.2.2 rmind
260 1.5.2.2 rmind static void
261 1.5.2.2 rmind wzero3kbd_attach(struct device *parent, struct device *self, void *aux)
262 1.5.2.2 rmind {
263 1.5.2.2 rmind struct wzero3kbd_softc *sc = device_private(self);
264 1.5.2.2 rmind struct pxaip_attach_args *pxa = (struct pxaip_attach_args *)aux;
265 1.5.2.2 rmind struct hpckbd_attach_args haa;
266 1.5.2.2 rmind const struct wzero3kbd_model *model;
267 1.5.2.2 rmind
268 1.5.2.2 rmind sc->sc_dev = self;
269 1.5.2.2 rmind
270 1.5.2.2 rmind model = wzero3kbd_lookup();
271 1.5.2.2 rmind if (model == NULL) {
272 1.5.2.2 rmind aprint_error(": unknown model\n");
273 1.5.2.2 rmind return;
274 1.5.2.2 rmind }
275 1.5.2.2 rmind
276 1.5.2.2 rmind aprint_normal(": keyboard\n");
277 1.5.2.2 rmind aprint_naive("\n");
278 1.5.2.2 rmind
279 1.5.2.2 rmind sc->sc_key_pin = model->key_pin;
280 1.5.2.2 rmind sc->sc_power_pin = model->power_pin;
281 1.5.2.2 rmind sc->sc_reset_pin = model->reset_pin;
282 1.5.2.2 rmind sc->sc_ncolumn = model->ncolumn;
283 1.5.2.2 rmind sc->sc_nrow = model->nrow;
284 1.5.2.2 rmind
285 1.5.2.2 rmind sc->sc_iot = pxa->pxa_iot;
286 1.5.2.2 rmind if (bus_space_map(sc->sc_iot, PXA2X0_CS2_START, REGMAPSIZE, 0,
287 1.5.2.2 rmind &sc->sc_ioh)) {
288 1.5.2.2 rmind aprint_error_dev(self, "couldn't map registers.\n");
289 1.5.2.2 rmind return;
290 1.5.2.2 rmind }
291 1.5.2.2 rmind
292 1.5.2.2 rmind sc->sc_okeystat = malloc(sc->sc_nrow * sc->sc_ncolumn, M_DEVBUF,
293 1.5.2.2 rmind M_NOWAIT | M_ZERO);
294 1.5.2.2 rmind sc->sc_keystat = malloc(sc->sc_nrow * sc->sc_ncolumn, M_DEVBUF,
295 1.5.2.2 rmind M_NOWAIT | M_ZERO);
296 1.5.2.2 rmind if (sc->sc_okeystat == NULL || sc->sc_keystat == NULL) {
297 1.5.2.2 rmind aprint_error_dev(self, "couldn't alloc memory.\n");
298 1.5.2.2 rmind if (sc->sc_okeystat)
299 1.5.2.2 rmind free(sc->sc_okeystat, M_DEVBUF);
300 1.5.2.2 rmind if (sc->sc_keystat)
301 1.5.2.2 rmind free(sc->sc_keystat, M_DEVBUF);
302 1.5.2.2 rmind return;
303 1.5.2.2 rmind }
304 1.5.2.2 rmind
305 1.5.2.2 rmind sc->sc_if.hii_ctx = sc;
306 1.5.2.2 rmind sc->sc_if.hii_establish = wzero3kbd_input_establish;
307 1.5.2.2 rmind sc->sc_if.hii_poll = wzero3kbd_poll;
308 1.5.2.2 rmind
309 1.5.2.2 rmind /* Attach console if not using serial. */
310 1.5.2.2 rmind if (!(bootinfo->bi_cnuse & BI_CNUSE_SERIAL))
311 1.5.2.2 rmind hpckbd_cnattach(&sc->sc_if);
312 1.5.2.2 rmind
313 1.5.2.2 rmind /* Install interrupt handler. */
314 1.5.2.2 rmind if (sc->sc_key_pin >= 0) {
315 1.5.2.2 rmind pxa2x0_gpio_set_function(sc->sc_key_pin, GPIO_IN);
316 1.5.2.2 rmind sc->sc_key_ih = pxa2x0_gpio_intr_establish(sc->sc_key_pin,
317 1.5.2.2 rmind IST_EDGE_BOTH, IPL_TTY, wzero3kbd_intr, sc);
318 1.5.2.2 rmind if (sc->sc_key_ih == NULL) {
319 1.5.2.2 rmind aprint_error_dev(sc->sc_dev,
320 1.5.2.2 rmind "couldn't establish key interrupt\n");
321 1.5.2.2 rmind }
322 1.5.2.2 rmind } else {
323 1.5.2.2 rmind sc->sc_interval = KEY_INTERVAL / (1000 / hz);
324 1.5.2.2 rmind if (sc->sc_interval < 1)
325 1.5.2.2 rmind sc->sc_interval = 1;
326 1.5.2.2 rmind callout_init(&sc->sc_keyscan_ch, 0);
327 1.5.2.2 rmind callout_reset(&sc->sc_keyscan_ch, sc->sc_interval,
328 1.5.2.2 rmind wzero3kbd_tick, sc);
329 1.5.2.2 rmind }
330 1.5.2.2 rmind
331 1.5.2.2 rmind /* power key */
332 1.5.2.2 rmind if (sc->sc_power_pin >= 0) {
333 1.5.2.2 rmind pxa2x0_gpio_set_function(sc->sc_power_pin, GPIO_IN);
334 1.5.2.2 rmind sc->sc_power_ih = pxa2x0_gpio_intr_establish(
335 1.5.2.2 rmind sc->sc_power_pin, IST_EDGE_BOTH, IPL_TTY,
336 1.5.2.2 rmind wzero3kbd_power_intr, sc);
337 1.5.2.2 rmind if (sc->sc_power_ih == NULL) {
338 1.5.2.2 rmind aprint_error_dev(sc->sc_dev,
339 1.5.2.2 rmind "couldn't establish power key interrupt\n");
340 1.5.2.2 rmind }
341 1.5.2.2 rmind }
342 1.5.2.2 rmind
343 1.5.2.2 rmind /* reset button */
344 1.5.2.2 rmind if (sc->sc_reset_pin >= 0) {
345 1.5.2.2 rmind pxa2x0_gpio_set_function(sc->sc_reset_pin, GPIO_IN);
346 1.5.2.2 rmind sc->sc_reset_ih = pxa2x0_gpio_intr_establish(
347 1.5.2.2 rmind sc->sc_reset_pin, IST_EDGE_BOTH, IPL_TTY,
348 1.5.2.2 rmind wzero3kbd_reset_intr, sc);
349 1.5.2.2 rmind if (sc->sc_reset_ih == NULL) {
350 1.5.2.2 rmind aprint_error_dev(sc->sc_dev,
351 1.5.2.2 rmind "couldn't establish reset key interrupt\n");
352 1.5.2.2 rmind }
353 1.5.2.2 rmind
354 1.5.2.2 rmind sc->sc_smpsw.smpsw_name = device_xname(self);
355 1.5.2.2 rmind sc->sc_smpsw.smpsw_type = PSWITCH_TYPE_RESET;
356 1.5.2.2 rmind if (sysmon_pswitch_register(&sc->sc_smpsw) != 0) {
357 1.5.2.2 rmind aprint_error_dev(sc->sc_dev,
358 1.5.2.2 rmind "unable to register reset event handler\n");
359 1.5.2.2 rmind }
360 1.5.2.2 rmind }
361 1.5.2.2 rmind
362 1.5.2.2 rmind /* Attach hpckbd. */
363 1.5.2.2 rmind haa.haa_ic = &sc->sc_if;
364 1.5.2.2 rmind config_found(self, &haa, hpckbd_print);
365 1.5.2.2 rmind
366 1.5.2.2 rmind #if defined(KEYTEST) || defined(KEYTEST2) || defined(KEYTEST3) || defined(KEYTEST4) || defined(KEYTEST5)
367 1.5.2.2 rmind sc->sc_test_ih = NULL;
368 1.5.2.2 rmind sc->sc_test_pin = -1;
369 1.5.2.2 rmind sc->sc_nouse_pin = -1;
370 1.5.2.2 rmind sc->sc_nouse_pin2 = -1;
371 1.5.2.2 rmind sc->sc_nouse_pin3 = -1;
372 1.5.2.2 rmind sc->sc_bit = 0x01;
373 1.5.2.2 rmind if (platid_match(&platid, &platid_mask_MACH_SHARP_WZERO3_WS003SH)
374 1.5.2.2 rmind || platid_match(&platid, &platid_mask_MACH_SHARP_WZERO3_WS004SH)) {
375 1.5.2.2 rmind sc->sc_nouse_pin = GPIO_WS003SH_SD_DETECT; /* SD_DETECT */
376 1.5.2.2 rmind sc->sc_nouse_pin2 = 86; /* Vsync? */
377 1.5.2.2 rmind sc->sc_nouse_pin3 = 89; /* RESET? */
378 1.5.2.2 rmind }
379 1.5.2.2 rmind if (platid_match(&platid, &platid_mask_MACH_SHARP_WZERO3_WS007SH)) {
380 1.5.2.2 rmind sc->sc_nouse_pin = GPIO_WS007SH_SD_DETECT; /* SD_DETECT */
381 1.5.2.2 rmind sc->sc_nouse_pin2 = 77; /* Vsync? */
382 1.5.2.2 rmind }
383 1.5.2.2 rmind if (platid_match(&platid, &platid_mask_MACH_SHARP_WZERO3_WS011SH)) {
384 1.5.2.2 rmind sc->sc_nouse_pin = GPIO_WS011SH_SD_DETECT; /* SD_DETECT */
385 1.5.2.2 rmind sc->sc_nouse_pin2 = 77; /* Vsync? */
386 1.5.2.2 rmind }
387 1.5.2.2 rmind if (platid_match(&platid, &platid_mask_MACH_SHARP_WZERO3_WS020SH)) {
388 1.5.2.2 rmind sc->sc_nouse_pin = GPIO_WS020SH_SD_DETECT; /* SD_DETECT */
389 1.5.2.2 rmind sc->sc_nouse_pin2 = 77; /* Vsync? */
390 1.5.2.2 rmind }
391 1.5.2.2 rmind
392 1.5.2.2 rmind #ifdef KEYTEST
393 1.5.2.2 rmind for (sc->sc_test_pin = 2; sc->sc_test_pin < PXA270_GPIO_NPINS; sc->sc_test_pin++) {
394 1.5.2.2 rmind if (sc->sc_test_pin != sc->sc_nouse_pin
395 1.5.2.2 rmind && sc->sc_test_pin != sc->sc_nouse_pin2
396 1.5.2.2 rmind && sc->sc_test_pin != sc->sc_nouse_pin3
397 1.5.2.2 rmind && sc->sc_test_pin != sc->sc_key_pin
398 1.5.2.2 rmind && sc->sc_test_pin != sc->sc_power_pin
399 1.5.2.2 rmind && sc->sc_test_pin != sc->sc_reset_pin
400 1.5.2.2 rmind && GPIO_IS_GPIO_IN(pxa2x0_gpio_get_function(sc->sc_test_pin)))
401 1.5.2.2 rmind break;
402 1.5.2.2 rmind }
403 1.5.2.2 rmind if (sc->sc_test_pin < PXA270_GPIO_NPINS) {
404 1.5.2.2 rmind printf("GPIO_IN: GPIO pin #%d\n", sc->sc_test_pin);
405 1.5.2.2 rmind sc->sc_test_ih = pxa2x0_gpio_intr_establish(sc->sc_test_pin,
406 1.5.2.2 rmind IST_EDGE_BOTH, IPL_TTY, wzero3kbd_intr2, sc);
407 1.5.2.2 rmind } else {
408 1.5.2.2 rmind sc->sc_test_pin = -1;
409 1.5.2.2 rmind }
410 1.5.2.2 rmind #endif
411 1.5.2.2 rmind
412 1.5.2.2 rmind #ifdef KEYTEST3
413 1.5.2.2 rmind {
414 1.5.2.2 rmind int i;
415 1.5.2.2 rmind printf("pin: ");
416 1.5.2.2 rmind for (i = 0; i < PXA270_GPIO_NPINS; i++) {
417 1.5.2.2 rmind if (i == sc->sc_nouse_pin
418 1.5.2.2 rmind || i == sc->sc_nouse_pin2
419 1.5.2.2 rmind || i == sc->sc_nouse_pin3
420 1.5.2.2 rmind || i == sc->sc_key_pin
421 1.5.2.2 rmind || i == sc->sc_power_pin
422 1.5.2.2 rmind || i == sc->sc_reset_pin)
423 1.5.2.2 rmind continue;
424 1.5.2.2 rmind
425 1.5.2.2 rmind printf("%d, ", i);
426 1.5.2.2 rmind if (GPIO_IS_GPIO_IN(pxa2x0_gpio_get_function(i))) {
427 1.5.2.2 rmind pxa2x0_gpio_intr_establish(i, IST_EDGE_BOTH,
428 1.5.2.2 rmind IPL_TTY, wzero3kbd_intr3, (void *)(long)i);
429 1.5.2.2 rmind }
430 1.5.2.2 rmind }
431 1.5.2.2 rmind }
432 1.5.2.2 rmind #endif
433 1.5.2.2 rmind
434 1.5.2.2 rmind #ifdef KEYTEST4
435 1.5.2.2 rmind for (sc->sc_test_pin = 2; sc->sc_test_pin < PXA270_GPIO_NPINS; sc->sc_test_pin++) {
436 1.5.2.2 rmind if (sc->sc_test_pin != sc->sc_nouse_pin
437 1.5.2.2 rmind && sc->sc_test_pin != sc->sc_nouse_pin2
438 1.5.2.2 rmind && sc->sc_test_pin != sc->sc_nouse_pin3
439 1.5.2.2 rmind && sc->sc_test_pin != sc->sc_key_pin
440 1.5.2.2 rmind && sc->sc_test_pin != sc->sc_power_pin
441 1.5.2.2 rmind && sc->sc_test_pin != sc->sc_reset_pin
442 1.5.2.2 rmind && GPIO_IS_GPIO_OUT(pxa2x0_gpio_get_function(sc->sc_test_pin)))
443 1.5.2.2 rmind break;
444 1.5.2.2 rmind }
445 1.5.2.2 rmind if (sc->sc_test_pin < PXA270_GPIO_NPINS) {
446 1.5.2.2 rmind printf("GPIO_OUT: GPIO pin #%d\n", sc->sc_test_pin);
447 1.5.2.2 rmind } else {
448 1.5.2.2 rmind sc->sc_test_pin = -1;
449 1.5.2.2 rmind }
450 1.5.2.2 rmind #endif
451 1.5.2.2 rmind #ifdef KEYTEST5
452 1.5.2.2 rmind sc->sc_test_pin = 0x00;
453 1.5.2.2 rmind sc->sc_bit = 0x01;
454 1.5.2.2 rmind #endif
455 1.5.2.2 rmind #endif
456 1.5.2.2 rmind }
457 1.5.2.2 rmind
458 1.5.2.2 rmind static int
459 1.5.2.2 rmind wzero3kbd_intr(void *arg)
460 1.5.2.2 rmind {
461 1.5.2.2 rmind struct wzero3kbd_softc *sc = (struct wzero3kbd_softc *)arg;
462 1.5.2.2 rmind
463 1.5.2.2 rmind #if defined(KEYTEST) || defined(KEYTEST2) || defined(KEYTEST3) || defined(KEYTEST4) || defined(KEYTEST5)
464 1.5.2.2 rmind printf("wzero3kbd_intr: GPIO pin #%d = %s\n", sc->sc_key_pin,
465 1.5.2.2 rmind pxa2x0_gpio_get_bit(sc->sc_key_pin) ? "on" : "off");
466 1.5.2.2 rmind #endif
467 1.5.2.2 rmind
468 1.5.2.2 rmind #if defined(KEYTEST4)
469 1.5.2.2 rmind if (sc->sc_test_pin >= 0) {
470 1.5.2.2 rmind if (pxa2x0_gpio_get_bit(sc->sc_test_pin)) {
471 1.5.2.2 rmind printf("GPIO_OUT: GPIO pin #%d: L\n",sc->sc_test_pin);
472 1.5.2.2 rmind pxa2x0_gpio_clear_bit(sc->sc_test_pin);
473 1.5.2.2 rmind } else {
474 1.5.2.2 rmind printf("GPIO_OUT: GPIO pin #%d: H\n", sc->sc_test_pin);
475 1.5.2.2 rmind pxa2x0_gpio_set_bit(sc->sc_test_pin);
476 1.5.2.2 rmind }
477 1.5.2.2 rmind }
478 1.5.2.2 rmind #endif
479 1.5.2.2 rmind #if defined(KEYTEST5)
480 1.5.2.2 rmind printf("CPLD(%#x): value=%#x, mask=%#x\n",
481 1.5.2.2 rmind sc->sc_test_pin, CSR_READ4(sc->sc_test_pin), sc->sc_bit);
482 1.5.2.2 rmind if (CSR_READ4(sc->sc_test_pin) & sc->sc_bit) {
483 1.5.2.2 rmind printf("CPLD_OUT: CPLD: L\n");
484 1.5.2.2 rmind CSR_WRITE4(sc->sc_test_pin,
485 1.5.2.2 rmind CSR_READ4(sc->sc_test_pin) & ~sc->sc_bit);
486 1.5.2.2 rmind } else {
487 1.5.2.2 rmind printf("CPLD_OUT: CPLD: H\n");
488 1.5.2.2 rmind CSR_WRITE4(sc->sc_test_pin,
489 1.5.2.2 rmind CSR_READ4(sc->sc_test_pin) | sc->sc_bit);
490 1.5.2.2 rmind }
491 1.5.2.2 rmind #endif
492 1.5.2.2 rmind
493 1.5.2.2 rmind (void) wzero3kbd_poll1(sc);
494 1.5.2.2 rmind
495 1.5.2.2 rmind pxa2x0_gpio_clear_intr(sc->sc_key_pin);
496 1.5.2.2 rmind
497 1.5.2.2 rmind return 1;
498 1.5.2.2 rmind }
499 1.5.2.2 rmind
500 1.5.2.2 rmind #if defined(KEYTEST)
501 1.5.2.2 rmind static int
502 1.5.2.2 rmind wzero3kbd_intr2(void *arg)
503 1.5.2.2 rmind {
504 1.5.2.2 rmind struct wzero3kbd_softc *sc = (struct wzero3kbd_softc *)arg;
505 1.5.2.2 rmind
506 1.5.2.2 rmind printf("wzero3kbd_intr2: GPIO_IN: GPIO pin #%d = %s\n", sc->sc_test_pin,
507 1.5.2.2 rmind pxa2x0_gpio_get_bit(sc->sc_test_pin) ? "on" : "off");
508 1.5.2.2 rmind
509 1.5.2.2 rmind return 1;
510 1.5.2.2 rmind }
511 1.5.2.2 rmind #endif
512 1.5.2.2 rmind
513 1.5.2.2 rmind #if defined(KEYTEST3)
514 1.5.2.2 rmind static int
515 1.5.2.2 rmind wzero3kbd_intr3(void *arg)
516 1.5.2.2 rmind {
517 1.5.2.2 rmind int pin = (int)arg;
518 1.5.2.2 rmind
519 1.5.2.2 rmind printf("wzero3kbd_intr3: GPIO pin #%d = %s\n", pin,
520 1.5.2.2 rmind pxa2x0_gpio_get_bit(pin) ? "on" : "off");
521 1.5.2.2 rmind
522 1.5.2.2 rmind return 1;
523 1.5.2.2 rmind }
524 1.5.2.2 rmind #endif
525 1.5.2.2 rmind
526 1.5.2.2 rmind
527 1.5.2.2 rmind static void
528 1.5.2.2 rmind wzero3kbd_tick(void *arg)
529 1.5.2.2 rmind {
530 1.5.2.2 rmind struct wzero3kbd_softc *sc = (struct wzero3kbd_softc *)arg;
531 1.5.2.2 rmind
532 1.5.2.2 rmind (void) wzero3kbd_poll1(sc);
533 1.5.2.2 rmind
534 1.5.2.2 rmind callout_reset(&sc->sc_keyscan_ch, sc->sc_interval, wzero3kbd_tick, sc);
535 1.5.2.2 rmind }
536 1.5.2.2 rmind
537 1.5.2.2 rmind static int
538 1.5.2.2 rmind wzero3kbd_power_intr(void *arg)
539 1.5.2.2 rmind {
540 1.5.2.2 rmind struct wzero3kbd_softc *sc = (struct wzero3kbd_softc *)arg;
541 1.5.2.2 rmind
542 1.5.2.2 rmind #if defined(KEYTEST) || defined(KEYTEST2) || defined(KEYTEST3) || defined(KEYTEST4)
543 1.5.2.2 rmind printf("wzero3kbd_power_intr: status = %s\n",
544 1.5.2.2 rmind pxa2x0_gpio_get_bit(sc->sc_power_pin) ? "on" : "off");
545 1.5.2.2 rmind #endif
546 1.5.2.2 rmind
547 1.5.2.2 rmind #if defined(KEYTEST)
548 1.5.2.2 rmind if (pxa2x0_gpio_get_bit(sc->sc_power_pin)) {
549 1.5.2.2 rmind if (sc->sc_test_pin >= 0) {
550 1.5.2.2 rmind int orig_pin = sc->sc_test_pin;
551 1.5.2.2 rmind pxa2x0_gpio_intr_disestablish(sc->sc_test_ih);
552 1.5.2.2 rmind sc->sc_test_ih = NULL;
553 1.5.2.2 rmind
554 1.5.2.2 rmind for (;;) {
555 1.5.2.2 rmind if (++sc->sc_test_pin >= PXA270_GPIO_NPINS)
556 1.5.2.2 rmind sc->sc_test_pin = 2;
557 1.5.2.2 rmind if (sc->sc_test_pin == orig_pin)
558 1.5.2.2 rmind break;
559 1.5.2.2 rmind if (sc->sc_test_pin != sc->sc_nouse_pin
560 1.5.2.2 rmind && sc->sc_test_pin != sc->sc_nouse_pin2
561 1.5.2.2 rmind && sc->sc_test_pin != sc->sc_nouse_pin3
562 1.5.2.2 rmind && sc->sc_test_pin != sc->sc_key_pin
563 1.5.2.2 rmind && sc->sc_test_pin != sc->sc_power_pin
564 1.5.2.2 rmind && sc->sc_test_pin != sc->sc_reset_pin
565 1.5.2.2 rmind && GPIO_IS_GPIO_IN(pxa2x0_gpio_get_function(sc->sc_test_pin)))
566 1.5.2.2 rmind break;
567 1.5.2.2 rmind }
568 1.5.2.2 rmind if (sc->sc_test_pin != orig_pin) {
569 1.5.2.2 rmind printf("GPIO_IN: GPIO pin #%d\n",
570 1.5.2.2 rmind sc->sc_test_pin);
571 1.5.2.2 rmind sc->sc_test_ih =
572 1.5.2.2 rmind pxa2x0_gpio_intr_establish(sc->sc_test_pin,
573 1.5.2.2 rmind IST_EDGE_BOTH, IPL_TTY, wzero3kbd_intr2,sc);
574 1.5.2.2 rmind } else {
575 1.5.2.2 rmind sc->sc_test_pin = -1;
576 1.5.2.2 rmind }
577 1.5.2.2 rmind }
578 1.5.2.2 rmind }
579 1.5.2.2 rmind #endif
580 1.5.2.2 rmind
581 1.5.2.2 rmind #if defined(KEYTEST2)
582 1.5.2.2 rmind if (pxa2x0_gpio_get_bit(sc->sc_power_pin)) {
583 1.5.2.2 rmind sc->sc_enabled ^= 2;
584 1.5.2.2 rmind if (sc->sc_enabled & 2) {
585 1.5.2.2 rmind printf("print col/row\n");
586 1.5.2.2 rmind } else {
587 1.5.2.2 rmind printf("keyscan\n");
588 1.5.2.2 rmind }
589 1.5.2.2 rmind }
590 1.5.2.2 rmind #endif
591 1.5.2.2 rmind #if defined(KEYTEST4)
592 1.5.2.2 rmind if (pxa2x0_gpio_get_bit(sc->sc_power_pin)) {
593 1.5.2.2 rmind if (sc->sc_test_pin >= 0) {
594 1.5.2.2 rmind int orig_pin = sc->sc_test_pin;
595 1.5.2.2 rmind for (;;) {
596 1.5.2.2 rmind if (++sc->sc_test_pin >= PXA270_GPIO_NPINS)
597 1.5.2.2 rmind sc->sc_test_pin = 2;
598 1.5.2.2 rmind if (sc->sc_test_pin == orig_pin)
599 1.5.2.2 rmind break;
600 1.5.2.2 rmind if (sc->sc_test_pin != sc->sc_nouse_pin
601 1.5.2.2 rmind && sc->sc_test_pin != sc->sc_nouse_pin2
602 1.5.2.2 rmind && sc->sc_test_pin != sc->sc_nouse_pin3
603 1.5.2.2 rmind && sc->sc_test_pin != sc->sc_key_pin
604 1.5.2.2 rmind && sc->sc_test_pin != sc->sc_power_pin
605 1.5.2.2 rmind && sc->sc_test_pin != sc->sc_reset_pin
606 1.5.2.2 rmind && GPIO_IS_GPIO_OUT(pxa2x0_gpio_get_function(sc->sc_test_pin)))
607 1.5.2.2 rmind break;
608 1.5.2.2 rmind }
609 1.5.2.2 rmind if (sc->sc_test_pin != orig_pin) {
610 1.5.2.2 rmind printf("GPIO_OUT: GPIO pin #%d\n", sc->sc_test_pin);
611 1.5.2.2 rmind } else {
612 1.5.2.2 rmind sc->sc_test_pin = -1;
613 1.5.2.2 rmind }
614 1.5.2.2 rmind }
615 1.5.2.2 rmind }
616 1.5.2.2 rmind #endif
617 1.5.2.2 rmind #if defined(KEYTEST5)
618 1.5.2.2 rmind if (pxa2x0_gpio_get_bit(sc->sc_power_pin)) {
619 1.5.2.2 rmind sc->sc_bit <<= 1;
620 1.5.2.2 rmind if (sc->sc_bit & ~0xff) {
621 1.5.2.2 rmind sc->sc_bit = 0x01;
622 1.5.2.2 rmind sc->sc_test_pin += 0x4;
623 1.5.2.2 rmind if (sc->sc_test_pin >= 0x20) {
624 1.5.2.2 rmind sc->sc_test_pin = 0x00;
625 1.5.2.2 rmind }
626 1.5.2.2 rmind }
627 1.5.2.2 rmind printf("CPLD(%#x), mask=%#x\n", sc->sc_test_pin, sc->sc_bit);
628 1.5.2.2 rmind }
629 1.5.2.2 rmind #endif
630 1.5.2.2 rmind
631 1.5.2.2 rmind pxa2x0_gpio_clear_intr(sc->sc_power_pin);
632 1.5.2.2 rmind
633 1.5.2.2 rmind return 1;
634 1.5.2.2 rmind }
635 1.5.2.2 rmind
636 1.5.2.2 rmind static int
637 1.5.2.2 rmind wzero3kbd_reset_intr(void *arg)
638 1.5.2.2 rmind {
639 1.5.2.2 rmind struct wzero3kbd_softc *sc = (struct wzero3kbd_softc *)arg;
640 1.5.2.2 rmind
641 1.5.2.2 rmind sysmon_task_queue_sched(0, wzero3kbd_sysmon_reset_event, sc);
642 1.5.2.2 rmind
643 1.5.2.2 rmind pxa2x0_gpio_clear_intr(sc->sc_reset_pin);
644 1.5.2.2 rmind
645 1.5.2.2 rmind return 1;
646 1.5.2.2 rmind }
647 1.5.2.2 rmind
648 1.5.2.2 rmind static int
649 1.5.2.2 rmind wzero3kbd_input_establish(void *arg, struct hpckbd_if *kbdif)
650 1.5.2.2 rmind {
651 1.5.2.2 rmind struct wzero3kbd_softc *sc = (struct wzero3kbd_softc *)arg;
652 1.5.2.2 rmind
653 1.5.2.2 rmind /* Save hpckbd interface. */
654 1.5.2.2 rmind sc->sc_hpckbd = kbdif;
655 1.5.2.2 rmind sc->sc_enabled = 1;
656 1.5.2.2 rmind
657 1.5.2.2 rmind return 0;
658 1.5.2.2 rmind }
659 1.5.2.2 rmind
660 1.5.2.2 rmind static void
661 1.5.2.2 rmind wzero3kbd_sysmon_reset_event(void *arg)
662 1.5.2.2 rmind {
663 1.5.2.2 rmind struct wzero3kbd_softc *sc = (struct wzero3kbd_softc *)arg;
664 1.5.2.2 rmind
665 1.5.2.2 rmind sysmon_pswitch_event(&sc->sc_smpsw, PSWITCH_EVENT_PRESSED);
666 1.5.2.2 rmind }
667 1.5.2.2 rmind
668 1.5.2.2 rmind static int
669 1.5.2.2 rmind wzero3kbd_poll(void *arg)
670 1.5.2.2 rmind {
671 1.5.2.2 rmind int keydown;
672 1.5.2.2 rmind
673 1.5.2.2 rmind keydown = wzero3kbd_poll1(arg);
674 1.5.2.2 rmind
675 1.5.2.2 rmind return keydown;
676 1.5.2.2 rmind }
677 1.5.2.2 rmind
678 1.5.2.2 rmind static int
679 1.5.2.2 rmind wzero3kbd_poll1(void *arg)
680 1.5.2.2 rmind {
681 1.5.2.2 rmind struct wzero3kbd_softc *sc = (struct wzero3kbd_softc *)arg;
682 1.5.2.2 rmind int row, col, data;
683 1.5.2.2 rmind int keycol;
684 1.5.2.2 rmind int keydown;
685 1.5.2.2 rmind int i;
686 1.5.2.2 rmind int s;
687 1.5.2.2 rmind
688 1.5.2.2 rmind if (!sc->sc_enabled) {
689 1.5.2.2 rmind DPRINTF(("wzero3kbd_poll: disabled\n"));
690 1.5.2.2 rmind return 0;
691 1.5.2.2 rmind }
692 1.5.2.2 rmind
693 1.5.2.2 rmind s = spltty();
694 1.5.2.2 rmind
695 1.5.2.2 rmind for (col = 0; col < sc->sc_ncolumn; col++) {
696 1.5.2.2 rmind /* deselect column# and charge */
697 1.5.2.2 rmind CSR_WRITE1(KBDCOL_L, 0);
698 1.5.2.2 rmind CSR_WRITE1(KBDCOL_U, 0);
699 1.5.2.2 rmind CSR_WRITE1(KBDCHARGE, 1);
700 1.5.2.2 rmind delay(KEYWAIT);
701 1.5.2.2 rmind CSR_WRITE1(KBDCHARGE, 0);
702 1.5.2.2 rmind
703 1.5.2.2 rmind /* select scan column# */
704 1.5.2.2 rmind keycol = 1 << col;
705 1.5.2.2 rmind CSR_WRITE1(KBDCOL_L, keycol & 0xff);
706 1.5.2.2 rmind CSR_WRITE1(KBDCOL_U, keycol >> 8);
707 1.5.2.2 rmind delay(KEYWAIT);
708 1.5.2.2 rmind CSR_WRITE1(KBDCHARGE, 0);
709 1.5.2.2 rmind
710 1.5.2.2 rmind /* read key data */
711 1.5.2.2 rmind data = CSR_READ1(KBDDATA);
712 1.5.2.2 rmind for (row = 0; row < sc->sc_nrow; row++) {
713 1.5.2.2 rmind #ifdef KEYTEST2
714 1.5.2.2 rmind if (!(sc->sc_enabled & 2)) {
715 1.5.2.2 rmind #endif
716 1.5.2.2 rmind sc->sc_keystat[row + col * sc->sc_nrow] =
717 1.5.2.2 rmind (data >> row) & 1;
718 1.5.2.2 rmind #ifdef KEYTEST2
719 1.5.2.2 rmind } else if (data & (1 << row)) {
720 1.5.2.2 rmind printf("col = %d, row = %d, idx = %d, data = 0x%02x\n", col, row, row + col * sc->sc_nrow, data);
721 1.5.2.2 rmind }
722 1.5.2.2 rmind #endif
723 1.5.2.2 rmind }
724 1.5.2.2 rmind }
725 1.5.2.2 rmind
726 1.5.2.2 rmind /* deselect column# and charge */
727 1.5.2.2 rmind CSR_WRITE1(KBDCOL_L, 0);
728 1.5.2.2 rmind CSR_WRITE1(KBDCOL_U, 0);
729 1.5.2.2 rmind CSR_WRITE1(KBDCHARGE, 1);
730 1.5.2.2 rmind delay(KEYWAIT);
731 1.5.2.2 rmind CSR_WRITE1(KBDCHARGE, 0);
732 1.5.2.2 rmind
733 1.5.2.2 rmind /* send key scan code */
734 1.5.2.2 rmind keydown = 0;
735 1.5.2.2 rmind for (i = 0; i < sc->sc_nrow * sc->sc_ncolumn; i++) {
736 1.5.2.2 rmind if (sc->sc_keystat[i] == sc->sc_okeystat[i])
737 1.5.2.2 rmind continue;
738 1.5.2.2 rmind
739 1.5.2.2 rmind keydown |= sc->sc_keystat[i];
740 1.5.2.2 rmind hpckbd_input(sc->sc_hpckbd, sc->sc_keystat[i], i);
741 1.5.2.2 rmind sc->sc_okeystat[i] = sc->sc_keystat[i];
742 1.5.2.2 rmind }
743 1.5.2.2 rmind
744 1.5.2.2 rmind splx(s);
745 1.5.2.2 rmind
746 1.5.2.2 rmind return keydown;
747 1.5.2.2 rmind }
748