wzero3_kbd.c revision 1.9
1 /* $NetBSD: wzero3_kbd.c,v 1.9 2019/11/10 21:16:27 chs Exp $ */ 2 3 /*- 4 * Copyright (C) 2008, 2009, 2010 NONAKA Kimihiro <nonaka (at) netbsd.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __KERNEL_RCSID(0, "$NetBSD: wzero3_kbd.c,v 1.9 2019/11/10 21:16:27 chs Exp $"); 30 31 #include <sys/param.h> 32 #include <sys/systm.h> 33 #include <sys/device.h> 34 #include <sys/kernel.h> 35 #include <sys/malloc.h> 36 #include <sys/callout.h> 37 #include <sys/bus.h> 38 39 #include <dev/sysmon/sysmonvar.h> 40 #include <dev/sysmon/sysmon_taskq.h> 41 42 #include <arm/xscale/pxa2x0cpu.h> 43 #include <arm/xscale/pxa2x0var.h> 44 #include <arm/xscale/pxa2x0_gpio.h> 45 46 #include <machine/bootinfo.h> 47 #include <machine/config_hook.h> 48 #include <machine/platid.h> 49 #include <machine/platid_mask.h> 50 51 #include <dev/hpc/hpckbdvar.h> 52 53 #include <arch/hpcarm/dev/wzero3_reg.h> 54 55 #ifdef DEBUG 56 #define DPRINTF(arg) printf arg 57 #else 58 #define DPRINTF(arg) /* nothing */ 59 #endif 60 61 #define CSR_READ1(r) bus_space_read_1(sc->sc_iot, sc->sc_ioh, (r)) 62 #define CSR_WRITE1(r,v) bus_space_write_1(sc->sc_iot, sc->sc_ioh, (r), (v)) 63 #define CSR_READ2(r) bus_space_read_2(sc->sc_iot, sc->sc_ioh, (r)) 64 #define CSR_WRITE2(r,v) bus_space_write_2(sc->sc_iot, sc->sc_ioh, (r), (v)) 65 #define CSR_READ4(r) bus_space_read_4(sc->sc_iot, sc->sc_ioh, (r)) 66 #define CSR_WRITE4(r,v) bus_space_write_4(sc->sc_iot, sc->sc_ioh, (r), (v)) 67 68 /* register */ 69 #define KBDCOL_L (0x00) /* Write */ 70 #define KBDCOL_U (0x04) /* Write */ 71 #define KBDCHARGE (0x08) /* Write */ 72 #define KBDDATA (0x08) /* Read */ 73 #define REGMAPSIZE 0x0c 74 75 #define KEYWAIT 20 /* us */ 76 77 #define WS003SH_NCOLUMN 12 78 #define WS003SH_NROW 7 79 80 struct wzero3kbd_softc { 81 device_t sc_dev; 82 83 bus_space_tag_t sc_iot; 84 bus_space_handle_t sc_ioh; 85 86 int sc_ncolumn; 87 int sc_nrow; 88 uint8_t *sc_okeystat; 89 uint8_t *sc_keystat; 90 91 void *sc_key_ih; 92 void *sc_power_ih; 93 void *sc_reset_ih; 94 95 int sc_key_pin; 96 int sc_power_pin; 97 int sc_reset_pin; 98 99 struct hpckbd_ic_if sc_if; 100 struct hpckbd_if *sc_hpckbd; 101 102 struct sysmon_pswitch sc_smpsw; /* for reset key */ 103 104 int sc_enabled; 105 106 /* polling stuff */ 107 struct callout sc_keyscan_ch; 108 int sc_interval; 109 #define KEY_INTERVAL 50 /* ms */ 110 111 #if defined(KEYTEST) || defined(KEYTEST2) || defined(KEYTEST3) || defined(KEYTEST4) || defined(KEYTEST5) 112 void *sc_test_ih; 113 int sc_test_pin; 114 int sc_nouse_pin; 115 int sc_nouse_pin2; 116 int sc_nouse_pin3; 117 int sc_bit; 118 #endif 119 }; 120 121 static int wzero3kbd_match(device_t, cfdata_t, void *); 122 static void wzero3kbd_attach(device_t, device_t, void *); 123 124 CFATTACH_DECL_NEW(wzero3kbd, sizeof(struct wzero3kbd_softc), 125 wzero3kbd_match, wzero3kbd_attach, NULL, NULL); 126 127 static int wzero3kbd_intr(void *arg); 128 #if defined(KEYTEST) 129 static int wzero3kbd_intr2(void *arg); 130 #endif 131 #if defined(KEYTEST3) 132 static int wzero3kbd_intr3(void *arg); 133 #endif 134 static void wzero3kbd_tick(void *arg); 135 static int wzero3kbd_power_intr(void *arg); 136 static int wzero3kbd_reset_intr(void *arg); 137 static int wzero3kbd_input_establish(void *arg, struct hpckbd_if *kbdif); 138 static void wzero3kbd_sysmon_reset_event(void *arg); 139 static int wzero3kbd_poll(void *arg); 140 static int wzero3kbd_poll1(void *arg); 141 142 /* 143 * WS003SH/WS004SH/WS007SH keyscan map 144 col#0 col#1 col#2 col#3 col#4 col#5 col#6 col#7 col#8 col#9 col#10 col#11 145 row#0: CTRL 1 3 5 6 7 9 0 BS (none) ROTATE CAMERA 146 row#1: (none) 2 4 r y 8 i o p (none) VOL- VOL+ 147 row#2: TAB q e t g u j k (none) (none) (none) (none) 148 row#3: (none) w s f v h m l (none) (none) SHIFT (none) 149 row#4: CALL a d c b n . (none) ENTER (none) WIN (none) 150 row#5: MAIL z x - SPACE / (none) UP (none) (none) LSOFT FN 151 row#6: IE MOJI (none) OK ACTION , LEFT DOWN RIGHT (none) RSOFT (none) 152 */ 153 154 /* 155 * WS011SH keyscan map 156 col#0 col#1 col#2 col#3 col#4 col#5 col#6 col#7 col#8 col#9 col#10 col#11 157 row#0 Ctrl (none) (none) (none) (none) (none) (none) (none) Del (none) ROTATE (none) 158 row#1 (none) (none) (none) R Y (none) I O P (none) (none) (none) 159 row#2 Tab Q E T G U J K (none) (none) (none) (none) 160 row#3 (none) W S F V H M L (none) (none) Shift (none) 161 row#4 (none) A D C B N . (none) Enter (none) (none) (none) 162 row#5 (none) Z X - Space / (none) UP (none) (none) (none) Fn 163 row#6 (none) MOJI HAN/ZEN OK (none) , LEFT DOWN RIGHT (none) (none) (none) 164 */ 165 166 /* 167 * WS020SH keyscan map 168 col#0 col#1 col#2 col#3 col#4 col#5 col#6 col#7 col#8 col#9 col#10 col#11 169 row#0 Ctrl (none) (none) (none) (none) (none) (none) (none) Del (none) ROTATE (none) 170 row#1 (none) (none) (none) R Y (none) I O P (none) MEDIA (none) 171 row#2 Tab Q E T G U J K (none) (none) (none) (none) 172 row#3 (none) W S F V H M L (none) (none) LShift (none) 173 row#4 (none) A D C B N . (none) Enter (none) RShift (none) 174 row#5 (none) Z X - Space / (none) UP (none) DOWN (none) Fn 175 row#6 (none) MOJI HAN/ZEN OK (none) , LEFT (none) RIGHT (none) (none) (none) 176 */ 177 178 static const struct wzero3kbd_model { 179 platid_mask_t *platid; 180 int key_pin; 181 int power_pin; 182 int reset_pin; 183 int ncolumn; 184 int nrow; 185 } wzero3kbd_table[] = { 186 /* WS003SH */ 187 { 188 &platid_mask_MACH_SHARP_WZERO3_WS003SH, 189 -1, /* XXX */ 190 GPIO_WS003SH_POWER_BUTTON, 191 -1, /* None */ 192 WS003SH_NCOLUMN, 193 WS003SH_NROW, 194 }, 195 /* WS004SH */ 196 { 197 &platid_mask_MACH_SHARP_WZERO3_WS004SH, 198 -1, /* XXX */ 199 GPIO_WS003SH_POWER_BUTTON, 200 -1, /* None */ 201 WS003SH_NCOLUMN, 202 WS003SH_NROW, 203 }, 204 /* WS007SH */ 205 { 206 &platid_mask_MACH_SHARP_WZERO3_WS007SH, 207 -1, /* XXX */ 208 GPIO_WS007SH_POWER_BUTTON, 209 GPIO_WS007SH_RESET_BUTTON, 210 WS003SH_NCOLUMN, 211 WS003SH_NROW, 212 }, 213 /* WS011SH */ 214 { 215 &platid_mask_MACH_SHARP_WZERO3_WS011SH, 216 -1, /* XXX */ 217 GPIO_WS011SH_POWER_BUTTON, 218 GPIO_WS011SH_RESET_BUTTON, 219 WS003SH_NCOLUMN, 220 WS003SH_NROW, 221 }, 222 /* WS020SH */ 223 { 224 &platid_mask_MACH_SHARP_WZERO3_WS020SH, 225 -1, /* XXX */ 226 GPIO_WS020SH_POWER_BUTTON, 227 GPIO_WS020SH_RESET_BUTTON, 228 WS003SH_NCOLUMN, 229 WS003SH_NROW, 230 }, 231 232 { NULL, -1, -1, -1, 0, 0, } 233 }; 234 235 static const struct wzero3kbd_model * 236 wzero3kbd_lookup(void) 237 { 238 const struct wzero3kbd_model *model; 239 240 for (model = wzero3kbd_table; model->platid != NULL; model++) { 241 if (platid_match(&platid, model->platid)) { 242 return model; 243 } 244 } 245 return NULL; 246 } 247 248 static int 249 wzero3kbd_match(device_t parent, cfdata_t cf, void *aux) 250 { 251 252 if (strcmp(cf->cf_name, "wzero3kbd") != 0) 253 return 0; 254 if (wzero3kbd_lookup() == NULL) 255 return 0; 256 return 1; 257 } 258 259 static void 260 wzero3kbd_attach(device_t parent, device_t self, void *aux) 261 { 262 struct wzero3kbd_softc *sc = device_private(self); 263 struct pxaip_attach_args *pxa = (struct pxaip_attach_args *)aux; 264 struct hpckbd_attach_args haa; 265 const struct wzero3kbd_model *model; 266 267 sc->sc_dev = self; 268 269 model = wzero3kbd_lookup(); 270 if (model == NULL) { 271 aprint_error(": unknown model\n"); 272 return; 273 } 274 275 aprint_normal(": keyboard\n"); 276 aprint_naive("\n"); 277 278 sc->sc_key_pin = model->key_pin; 279 sc->sc_power_pin = model->power_pin; 280 sc->sc_reset_pin = model->reset_pin; 281 sc->sc_ncolumn = model->ncolumn; 282 sc->sc_nrow = model->nrow; 283 284 sc->sc_iot = pxa->pxa_iot; 285 if (bus_space_map(sc->sc_iot, PXA2X0_CS2_START, REGMAPSIZE, 0, 286 &sc->sc_ioh)) { 287 aprint_error_dev(self, "couldn't map registers.\n"); 288 return; 289 } 290 291 sc->sc_okeystat = malloc(sc->sc_nrow * sc->sc_ncolumn, M_DEVBUF, 292 M_WAITOK | M_ZERO); 293 sc->sc_keystat = malloc(sc->sc_nrow * sc->sc_ncolumn, M_DEVBUF, 294 M_WAITOK | M_ZERO); 295 296 sc->sc_if.hii_ctx = sc; 297 sc->sc_if.hii_establish = wzero3kbd_input_establish; 298 sc->sc_if.hii_poll = wzero3kbd_poll; 299 300 /* Attach console if not using serial. */ 301 if (!(bootinfo->bi_cnuse & BI_CNUSE_SERIAL)) 302 hpckbd_cnattach(&sc->sc_if); 303 304 /* Install interrupt handler. */ 305 if (sc->sc_key_pin >= 0) { 306 pxa2x0_gpio_set_function(sc->sc_key_pin, GPIO_IN); 307 sc->sc_key_ih = pxa2x0_gpio_intr_establish(sc->sc_key_pin, 308 IST_EDGE_BOTH, IPL_TTY, wzero3kbd_intr, sc); 309 if (sc->sc_key_ih == NULL) { 310 aprint_error_dev(sc->sc_dev, 311 "couldn't establish key interrupt\n"); 312 } 313 } else { 314 sc->sc_interval = KEY_INTERVAL / (1000 / hz); 315 if (sc->sc_interval < 1) 316 sc->sc_interval = 1; 317 callout_init(&sc->sc_keyscan_ch, 0); 318 callout_reset(&sc->sc_keyscan_ch, sc->sc_interval, 319 wzero3kbd_tick, sc); 320 } 321 322 /* power key */ 323 if (sc->sc_power_pin >= 0) { 324 pxa2x0_gpio_set_function(sc->sc_power_pin, GPIO_IN); 325 sc->sc_power_ih = pxa2x0_gpio_intr_establish( 326 sc->sc_power_pin, IST_EDGE_BOTH, IPL_TTY, 327 wzero3kbd_power_intr, sc); 328 if (sc->sc_power_ih == NULL) { 329 aprint_error_dev(sc->sc_dev, 330 "couldn't establish power key interrupt\n"); 331 } 332 } 333 334 /* reset button */ 335 if (sc->sc_reset_pin >= 0) { 336 pxa2x0_gpio_set_function(sc->sc_reset_pin, GPIO_IN); 337 sc->sc_reset_ih = pxa2x0_gpio_intr_establish( 338 sc->sc_reset_pin, IST_EDGE_BOTH, IPL_TTY, 339 wzero3kbd_reset_intr, sc); 340 if (sc->sc_reset_ih == NULL) { 341 aprint_error_dev(sc->sc_dev, 342 "couldn't establish reset key interrupt\n"); 343 } 344 345 sc->sc_smpsw.smpsw_name = device_xname(self); 346 sc->sc_smpsw.smpsw_type = PSWITCH_TYPE_RESET; 347 if (sysmon_pswitch_register(&sc->sc_smpsw) != 0) { 348 aprint_error_dev(sc->sc_dev, 349 "unable to register reset event handler\n"); 350 } 351 } 352 353 /* Attach hpckbd. */ 354 haa.haa_ic = &sc->sc_if; 355 config_found(self, &haa, hpckbd_print); 356 357 #if defined(KEYTEST) || defined(KEYTEST2) || defined(KEYTEST3) || defined(KEYTEST4) || defined(KEYTEST5) 358 sc->sc_test_ih = NULL; 359 sc->sc_test_pin = -1; 360 sc->sc_nouse_pin = -1; 361 sc->sc_nouse_pin2 = -1; 362 sc->sc_nouse_pin3 = -1; 363 sc->sc_bit = 0x01; 364 if (platid_match(&platid, &platid_mask_MACH_SHARP_WZERO3_WS003SH) 365 || platid_match(&platid, &platid_mask_MACH_SHARP_WZERO3_WS004SH)) { 366 sc->sc_nouse_pin = GPIO_WS003SH_SD_DETECT; /* SD_DETECT */ 367 sc->sc_nouse_pin2 = 86; /* Vsync? */ 368 sc->sc_nouse_pin3 = 89; /* RESET? */ 369 } 370 if (platid_match(&platid, &platid_mask_MACH_SHARP_WZERO3_WS007SH)) { 371 sc->sc_nouse_pin = GPIO_WS007SH_SD_DETECT; /* SD_DETECT */ 372 sc->sc_nouse_pin2 = 77; /* Vsync? */ 373 } 374 if (platid_match(&platid, &platid_mask_MACH_SHARP_WZERO3_WS011SH)) { 375 sc->sc_nouse_pin = GPIO_WS011SH_SD_DETECT; /* SD_DETECT */ 376 sc->sc_nouse_pin2 = 77; /* Vsync? */ 377 } 378 if (platid_match(&platid, &platid_mask_MACH_SHARP_WZERO3_WS020SH)) { 379 sc->sc_nouse_pin = GPIO_WS020SH_SD_DETECT; /* SD_DETECT */ 380 sc->sc_nouse_pin2 = 77; /* Vsync? */ 381 } 382 383 #ifdef KEYTEST 384 for (sc->sc_test_pin = 2; sc->sc_test_pin < PXA270_GPIO_NPINS; sc->sc_test_pin++) { 385 if (sc->sc_test_pin != sc->sc_nouse_pin 386 && sc->sc_test_pin != sc->sc_nouse_pin2 387 && sc->sc_test_pin != sc->sc_nouse_pin3 388 && sc->sc_test_pin != sc->sc_key_pin 389 && sc->sc_test_pin != sc->sc_power_pin 390 && sc->sc_test_pin != sc->sc_reset_pin 391 && GPIO_IS_GPIO_IN(pxa2x0_gpio_get_function(sc->sc_test_pin))) 392 break; 393 } 394 if (sc->sc_test_pin < PXA270_GPIO_NPINS) { 395 printf("GPIO_IN: GPIO pin #%d\n", sc->sc_test_pin); 396 sc->sc_test_ih = pxa2x0_gpio_intr_establish(sc->sc_test_pin, 397 IST_EDGE_BOTH, IPL_TTY, wzero3kbd_intr2, sc); 398 } else { 399 sc->sc_test_pin = -1; 400 } 401 #endif 402 403 #ifdef KEYTEST3 404 { 405 int i; 406 printf("pin: "); 407 for (i = 0; i < PXA270_GPIO_NPINS; i++) { 408 if (i == sc->sc_nouse_pin 409 || i == sc->sc_nouse_pin2 410 || i == sc->sc_nouse_pin3 411 || i == sc->sc_key_pin 412 || i == sc->sc_power_pin 413 || i == sc->sc_reset_pin) 414 continue; 415 416 printf("%d, ", i); 417 if (GPIO_IS_GPIO_IN(pxa2x0_gpio_get_function(i))) { 418 pxa2x0_gpio_intr_establish(i, IST_EDGE_BOTH, 419 IPL_TTY, wzero3kbd_intr3, (void *)(long)i); 420 } 421 } 422 } 423 #endif 424 425 #ifdef KEYTEST4 426 for (sc->sc_test_pin = 2; sc->sc_test_pin < PXA270_GPIO_NPINS; sc->sc_test_pin++) { 427 if (sc->sc_test_pin != sc->sc_nouse_pin 428 && sc->sc_test_pin != sc->sc_nouse_pin2 429 && sc->sc_test_pin != sc->sc_nouse_pin3 430 && sc->sc_test_pin != sc->sc_key_pin 431 && sc->sc_test_pin != sc->sc_power_pin 432 && sc->sc_test_pin != sc->sc_reset_pin 433 && GPIO_IS_GPIO_OUT(pxa2x0_gpio_get_function(sc->sc_test_pin))) 434 break; 435 } 436 if (sc->sc_test_pin < PXA270_GPIO_NPINS) { 437 printf("GPIO_OUT: GPIO pin #%d\n", sc->sc_test_pin); 438 } else { 439 sc->sc_test_pin = -1; 440 } 441 #endif 442 #ifdef KEYTEST5 443 sc->sc_test_pin = 0x00; 444 sc->sc_bit = 0x01; 445 #endif 446 #endif 447 } 448 449 static int 450 wzero3kbd_intr(void *arg) 451 { 452 struct wzero3kbd_softc *sc = (struct wzero3kbd_softc *)arg; 453 454 #if defined(KEYTEST) || defined(KEYTEST2) || defined(KEYTEST3) || defined(KEYTEST4) || defined(KEYTEST5) 455 printf("wzero3kbd_intr: GPIO pin #%d = %s\n", sc->sc_key_pin, 456 pxa2x0_gpio_get_bit(sc->sc_key_pin) ? "on" : "off"); 457 #endif 458 459 #if defined(KEYTEST4) 460 if (sc->sc_test_pin >= 0) { 461 if (pxa2x0_gpio_get_bit(sc->sc_test_pin)) { 462 printf("GPIO_OUT: GPIO pin #%d: L\n",sc->sc_test_pin); 463 pxa2x0_gpio_clear_bit(sc->sc_test_pin); 464 } else { 465 printf("GPIO_OUT: GPIO pin #%d: H\n", sc->sc_test_pin); 466 pxa2x0_gpio_set_bit(sc->sc_test_pin); 467 } 468 } 469 #endif 470 #if defined(KEYTEST5) 471 printf("CPLD(%#x): value=%#x, mask=%#x\n", 472 sc->sc_test_pin, CSR_READ4(sc->sc_test_pin), sc->sc_bit); 473 if (CSR_READ4(sc->sc_test_pin) & sc->sc_bit) { 474 printf("CPLD_OUT: CPLD: L\n"); 475 CSR_WRITE4(sc->sc_test_pin, 476 CSR_READ4(sc->sc_test_pin) & ~sc->sc_bit); 477 } else { 478 printf("CPLD_OUT: CPLD: H\n"); 479 CSR_WRITE4(sc->sc_test_pin, 480 CSR_READ4(sc->sc_test_pin) | sc->sc_bit); 481 } 482 #endif 483 484 (void) wzero3kbd_poll1(sc); 485 486 pxa2x0_gpio_clear_intr(sc->sc_key_pin); 487 488 return 1; 489 } 490 491 #if defined(KEYTEST) 492 static int 493 wzero3kbd_intr2(void *arg) 494 { 495 struct wzero3kbd_softc *sc = (struct wzero3kbd_softc *)arg; 496 497 printf("wzero3kbd_intr2: GPIO_IN: GPIO pin #%d = %s\n", sc->sc_test_pin, 498 pxa2x0_gpio_get_bit(sc->sc_test_pin) ? "on" : "off"); 499 500 return 1; 501 } 502 #endif 503 504 #if defined(KEYTEST3) 505 static int 506 wzero3kbd_intr3(void *arg) 507 { 508 int pin = (int)arg; 509 510 printf("wzero3kbd_intr3: GPIO pin #%d = %s\n", pin, 511 pxa2x0_gpio_get_bit(pin) ? "on" : "off"); 512 513 return 1; 514 } 515 #endif 516 517 518 static void 519 wzero3kbd_tick(void *arg) 520 { 521 struct wzero3kbd_softc *sc = (struct wzero3kbd_softc *)arg; 522 523 (void) wzero3kbd_poll1(sc); 524 525 callout_schedule(&sc->sc_keyscan_ch, sc->sc_interval); 526 } 527 528 static int 529 wzero3kbd_power_intr(void *arg) 530 { 531 struct wzero3kbd_softc *sc = (struct wzero3kbd_softc *)arg; 532 533 #if defined(KEYTEST) || defined(KEYTEST2) || defined(KEYTEST3) || defined(KEYTEST4) 534 printf("wzero3kbd_power_intr: status = %s\n", 535 pxa2x0_gpio_get_bit(sc->sc_power_pin) ? "on" : "off"); 536 #endif 537 538 #if defined(KEYTEST) 539 if (pxa2x0_gpio_get_bit(sc->sc_power_pin)) { 540 if (sc->sc_test_pin >= 0) { 541 int orig_pin = sc->sc_test_pin; 542 pxa2x0_gpio_intr_disestablish(sc->sc_test_ih); 543 sc->sc_test_ih = NULL; 544 545 for (;;) { 546 if (++sc->sc_test_pin >= PXA270_GPIO_NPINS) 547 sc->sc_test_pin = 2; 548 if (sc->sc_test_pin == orig_pin) 549 break; 550 if (sc->sc_test_pin != sc->sc_nouse_pin 551 && sc->sc_test_pin != sc->sc_nouse_pin2 552 && sc->sc_test_pin != sc->sc_nouse_pin3 553 && sc->sc_test_pin != sc->sc_key_pin 554 && sc->sc_test_pin != sc->sc_power_pin 555 && sc->sc_test_pin != sc->sc_reset_pin 556 && GPIO_IS_GPIO_IN(pxa2x0_gpio_get_function(sc->sc_test_pin))) 557 break; 558 } 559 if (sc->sc_test_pin != orig_pin) { 560 printf("GPIO_IN: GPIO pin #%d\n", 561 sc->sc_test_pin); 562 sc->sc_test_ih = 563 pxa2x0_gpio_intr_establish(sc->sc_test_pin, 564 IST_EDGE_BOTH, IPL_TTY, wzero3kbd_intr2,sc); 565 } else { 566 sc->sc_test_pin = -1; 567 } 568 } 569 } 570 #endif 571 572 #if defined(KEYTEST2) 573 if (pxa2x0_gpio_get_bit(sc->sc_power_pin)) { 574 sc->sc_enabled ^= 2; 575 if (sc->sc_enabled & 2) { 576 printf("print col/row\n"); 577 } else { 578 printf("keyscan\n"); 579 } 580 } 581 #endif 582 #if defined(KEYTEST4) 583 if (pxa2x0_gpio_get_bit(sc->sc_power_pin)) { 584 if (sc->sc_test_pin >= 0) { 585 int orig_pin = sc->sc_test_pin; 586 for (;;) { 587 if (++sc->sc_test_pin >= PXA270_GPIO_NPINS) 588 sc->sc_test_pin = 2; 589 if (sc->sc_test_pin == orig_pin) 590 break; 591 if (sc->sc_test_pin != sc->sc_nouse_pin 592 && sc->sc_test_pin != sc->sc_nouse_pin2 593 && sc->sc_test_pin != sc->sc_nouse_pin3 594 && sc->sc_test_pin != sc->sc_key_pin 595 && sc->sc_test_pin != sc->sc_power_pin 596 && sc->sc_test_pin != sc->sc_reset_pin 597 && GPIO_IS_GPIO_OUT(pxa2x0_gpio_get_function(sc->sc_test_pin))) 598 break; 599 } 600 if (sc->sc_test_pin != orig_pin) { 601 printf("GPIO_OUT: GPIO pin #%d\n", sc->sc_test_pin); 602 } else { 603 sc->sc_test_pin = -1; 604 } 605 } 606 } 607 #endif 608 #if defined(KEYTEST5) 609 if (pxa2x0_gpio_get_bit(sc->sc_power_pin)) { 610 sc->sc_bit <<= 1; 611 if (sc->sc_bit & ~0xff) { 612 sc->sc_bit = 0x01; 613 sc->sc_test_pin += 0x4; 614 if (sc->sc_test_pin >= 0x20) { 615 sc->sc_test_pin = 0x00; 616 } 617 } 618 printf("CPLD(%#x), mask=%#x\n", sc->sc_test_pin, sc->sc_bit); 619 } 620 #endif 621 622 pxa2x0_gpio_clear_intr(sc->sc_power_pin); 623 624 return 1; 625 } 626 627 static int 628 wzero3kbd_reset_intr(void *arg) 629 { 630 struct wzero3kbd_softc *sc = (struct wzero3kbd_softc *)arg; 631 632 sysmon_task_queue_sched(0, wzero3kbd_sysmon_reset_event, sc); 633 634 pxa2x0_gpio_clear_intr(sc->sc_reset_pin); 635 636 return 1; 637 } 638 639 static int 640 wzero3kbd_input_establish(void *arg, struct hpckbd_if *kbdif) 641 { 642 struct wzero3kbd_softc *sc = (struct wzero3kbd_softc *)arg; 643 644 /* Save hpckbd interface. */ 645 sc->sc_hpckbd = kbdif; 646 sc->sc_enabled = 1; 647 648 return 0; 649 } 650 651 static void 652 wzero3kbd_sysmon_reset_event(void *arg) 653 { 654 struct wzero3kbd_softc *sc = (struct wzero3kbd_softc *)arg; 655 656 sysmon_pswitch_event(&sc->sc_smpsw, PSWITCH_EVENT_PRESSED); 657 } 658 659 static int 660 wzero3kbd_poll(void *arg) 661 { 662 int keydown; 663 664 keydown = wzero3kbd_poll1(arg); 665 666 return keydown; 667 } 668 669 static int 670 wzero3kbd_poll1(void *arg) 671 { 672 struct wzero3kbd_softc *sc = (struct wzero3kbd_softc *)arg; 673 int row, col, data; 674 int keycol; 675 int keydown; 676 int i; 677 int s; 678 679 if (!sc->sc_enabled) { 680 DPRINTF(("wzero3kbd_poll: disabled\n")); 681 return 0; 682 } 683 684 s = spltty(); 685 686 for (col = 0; col < sc->sc_ncolumn; col++) { 687 /* deselect column# and charge */ 688 CSR_WRITE1(KBDCOL_L, 0); 689 CSR_WRITE1(KBDCOL_U, 0); 690 CSR_WRITE1(KBDCHARGE, 1); 691 delay(KEYWAIT); 692 CSR_WRITE1(KBDCHARGE, 0); 693 694 /* select scan column# */ 695 keycol = 1 << col; 696 CSR_WRITE1(KBDCOL_L, keycol & 0xff); 697 CSR_WRITE1(KBDCOL_U, keycol >> 8); 698 delay(KEYWAIT); 699 CSR_WRITE1(KBDCHARGE, 0); 700 701 /* read key data */ 702 data = CSR_READ1(KBDDATA); 703 for (row = 0; row < sc->sc_nrow; row++) { 704 #ifdef KEYTEST2 705 if (!(sc->sc_enabled & 2)) { 706 #endif 707 sc->sc_keystat[row + col * sc->sc_nrow] = 708 (data >> row) & 1; 709 #ifdef KEYTEST2 710 } else if (data & (1 << row)) { 711 printf("col = %d, row = %d, idx = %d, data = 0x%02x\n", col, row, row + col * sc->sc_nrow, data); 712 } 713 #endif 714 } 715 } 716 717 /* deselect column# and charge */ 718 CSR_WRITE1(KBDCOL_L, 0); 719 CSR_WRITE1(KBDCOL_U, 0); 720 CSR_WRITE1(KBDCHARGE, 1); 721 delay(KEYWAIT); 722 CSR_WRITE1(KBDCHARGE, 0); 723 724 /* send key scan code */ 725 keydown = 0; 726 for (i = 0; i < sc->sc_nrow * sc->sc_ncolumn; i++) { 727 if (sc->sc_keystat[i] == sc->sc_okeystat[i]) 728 continue; 729 730 keydown |= sc->sc_keystat[i]; 731 hpckbd_input(sc->sc_hpckbd, sc->sc_keystat[i], i); 732 sc->sc_okeystat[i] = sc->sc_keystat[i]; 733 } 734 735 splx(s); 736 737 return keydown; 738 } 739
Indexes created Wed Oct 01 07:09:59 GMT 2025