wzero3_ssp.c revision 1.3.2.3
1 1.3.2.3 rmind /* $NetBSD: wzero3_ssp.c,v 1.3.2.3 2010/07/03 01:19:18 rmind Exp $ */ 2 1.3.2.2 rmind 3 1.3.2.2 rmind /* 4 1.3.2.2 rmind * Copyright (c) 2010 NONAKA Kimihiro <nonaka (at) netbsd.org> 5 1.3.2.2 rmind * All rights reserved. 6 1.3.2.2 rmind * 7 1.3.2.2 rmind * Redistribution and use in source and binary forms, with or without 8 1.3.2.2 rmind * modification, are permitted provided that the following conditions 9 1.3.2.2 rmind * are met: 10 1.3.2.2 rmind * 1. Redistributions of source code must retain the above copyright 11 1.3.2.2 rmind * notice, this list of conditions and the following disclaimer. 12 1.3.2.2 rmind * 2. Redistributions in binary form must reproduce the above copyright 13 1.3.2.2 rmind * notice, this list of conditions and the following disclaimer in the 14 1.3.2.2 rmind * documentation and/or other materials provided with the distribution. 15 1.3.2.2 rmind * 16 1.3.2.2 rmind * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 17 1.3.2.2 rmind * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 1.3.2.2 rmind * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 1.3.2.2 rmind * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 20 1.3.2.2 rmind * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 1.3.2.2 rmind * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 1.3.2.2 rmind * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 1.3.2.2 rmind * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 1.3.2.2 rmind * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 1.3.2.2 rmind * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 1.3.2.2 rmind * SUCH DAMAGE. 27 1.3.2.2 rmind */ 28 1.3.2.2 rmind 29 1.3.2.2 rmind #include <sys/cdefs.h> 30 1.3.2.3 rmind __KERNEL_RCSID(0, "$NetBSD: wzero3_ssp.c,v 1.3.2.3 2010/07/03 01:19:18 rmind Exp $"); 31 1.3.2.2 rmind 32 1.3.2.2 rmind #include <sys/param.h> 33 1.3.2.2 rmind #include <sys/systm.h> 34 1.3.2.2 rmind #include <sys/device.h> 35 1.3.2.2 rmind #include <sys/mutex.h> 36 1.3.2.2 rmind #include <sys/pmf.h> 37 1.3.2.2 rmind #include <sys/bus.h> 38 1.3.2.2 rmind 39 1.3.2.2 rmind #include <machine/bootinfo.h> 40 1.3.2.2 rmind #include <machine/platid.h> 41 1.3.2.2 rmind #include <machine/platid_mask.h> 42 1.3.2.2 rmind 43 1.3.2.2 rmind #include <arm/xscale/pxa2x0reg.h> 44 1.3.2.2 rmind #include <arm/xscale/pxa2x0var.h> 45 1.3.2.2 rmind #include <arm/xscale/pxa2x0_gpio.h> 46 1.3.2.2 rmind 47 1.3.2.2 rmind #include <hpcarm/dev/wzero3_reg.h> 48 1.3.2.2 rmind #include <hpcarm/dev/wzero3_sspvar.h> 49 1.3.2.2 rmind 50 1.3.2.2 rmind #define WS003SH_SSCR0_MAX1233 0x0000048f /* 16bit/SPI/div by 5 */ 51 1.3.2.2 rmind #define WS007SH_SSCR0_ADS7846 0x000006ab /* 12bit/Microwire/div by 7 */ 52 1.3.2.2 rmind #define WS011SH_SSCR0_AK4184_TP 0x0010068f /* 32bit/SPI/div by 7 */ 53 1.3.2.3 rmind #define WS011SH_SSCR0_AK4184_KEYPAD 0x0000068f /* 16bit/SPI/div by 7 */ 54 1.3.2.2 rmind 55 1.3.2.2 rmind struct wzero3ssp_model; 56 1.3.2.2 rmind struct wzero3ssp_softc { 57 1.3.2.2 rmind device_t sc_dev; 58 1.3.2.2 rmind bus_space_tag_t sc_iot; 59 1.3.2.2 rmind bus_space_handle_t sc_ioh; 60 1.3.2.2 rmind kmutex_t sc_mtx; 61 1.3.2.2 rmind const struct wzero3ssp_model *sc_model; 62 1.3.2.2 rmind }; 63 1.3.2.2 rmind 64 1.3.2.2 rmind static int wzero3ssp_match(device_t, cfdata_t, void *); 65 1.3.2.2 rmind static void wzero3ssp_attach(device_t, device_t, void *); 66 1.3.2.2 rmind 67 1.3.2.2 rmind CFATTACH_DECL_NEW(wzero3ssp, sizeof(struct wzero3ssp_softc), 68 1.3.2.2 rmind wzero3ssp_match, wzero3ssp_attach, NULL, NULL); 69 1.3.2.2 rmind 70 1.3.2.2 rmind static void wzero3ssp_init(struct wzero3ssp_softc *); 71 1.3.2.2 rmind static bool wzero3ssp_resume(device_t dv, const pmf_qual_t *); 72 1.3.2.2 rmind static uint32_t wzero3ssp_read_ads7846(struct wzero3ssp_softc *, uint32_t); 73 1.3.2.2 rmind static uint32_t wzero3ssp_read_max1233(struct wzero3ssp_softc *, uint32_t, 74 1.3.2.2 rmind uint32_t); 75 1.3.2.3 rmind static uint32_t wzero3ssp_read_ak4184_tp(struct wzero3ssp_softc *, uint32_t); 76 1.3.2.3 rmind static uint16_t wzero3ssp_read_ak4184_keypad(struct wzero3ssp_softc *, uint32_t, 77 1.3.2.3 rmind uint32_t); 78 1.3.2.2 rmind 79 1.3.2.2 rmind static struct wzero3ssp_softc *wzero3ssp_sc; 80 1.3.2.2 rmind 81 1.3.2.2 rmind static const struct wzero3ssp_model { 82 1.3.2.2 rmind platid_mask_t *platid; 83 1.3.2.2 rmind u_long sspaddr; 84 1.3.2.2 rmind } wzero3ssp_table[] = { 85 1.3.2.2 rmind /* WS003SH */ 86 1.3.2.2 rmind { 87 1.3.2.2 rmind &platid_mask_MACH_SHARP_WZERO3_WS003SH, 88 1.3.2.2 rmind PXA2X0_SSP2_BASE, 89 1.3.2.2 rmind }, 90 1.3.2.2 rmind /* WS004SH */ 91 1.3.2.2 rmind { 92 1.3.2.2 rmind &platid_mask_MACH_SHARP_WZERO3_WS004SH, 93 1.3.2.2 rmind PXA2X0_SSP2_BASE, 94 1.3.2.2 rmind }, 95 1.3.2.2 rmind /* WS007SH */ 96 1.3.2.2 rmind { 97 1.3.2.2 rmind &platid_mask_MACH_SHARP_WZERO3_WS007SH, 98 1.3.2.2 rmind PXA2X0_SSP1_BASE, 99 1.3.2.2 rmind }, 100 1.3.2.2 rmind /* WS011SH */ 101 1.3.2.2 rmind { 102 1.3.2.2 rmind &platid_mask_MACH_SHARP_WZERO3_WS011SH, 103 1.3.2.2 rmind PXA2X0_SSP1_BASE, 104 1.3.2.2 rmind }, 105 1.3.2.2 rmind #if 0 106 1.3.2.2 rmind /* WS0020H */ 107 1.3.2.2 rmind { 108 1.3.2.2 rmind &platid_mask_MACH_SHARP_WZERO3_WS020SH, 109 1.3.2.2 rmind PXA2X0_SSP1_BASE, 110 1.3.2.2 rmind }, 111 1.3.2.2 rmind #endif 112 1.3.2.2 rmind { 113 1.3.2.2 rmind NULL, 0, 114 1.3.2.2 rmind }, 115 1.3.2.2 rmind }; 116 1.3.2.2 rmind 117 1.3.2.2 rmind static const struct wzero3ssp_model * 118 1.3.2.2 rmind wzero3ssp_lookup(void) 119 1.3.2.2 rmind { 120 1.3.2.2 rmind const struct wzero3ssp_model *model; 121 1.3.2.2 rmind 122 1.3.2.2 rmind for (model = wzero3ssp_table; model->platid != NULL; model++) { 123 1.3.2.2 rmind if (platid_match(&platid, model->platid)) { 124 1.3.2.2 rmind return model; 125 1.3.2.2 rmind } 126 1.3.2.2 rmind } 127 1.3.2.2 rmind return NULL; 128 1.3.2.2 rmind } 129 1.3.2.2 rmind 130 1.3.2.2 rmind static int 131 1.3.2.2 rmind wzero3ssp_match(device_t parent, cfdata_t cf, void *aux) 132 1.3.2.2 rmind { 133 1.3.2.2 rmind 134 1.3.2.2 rmind if (strcmp(cf->cf_name, "wzero3ssp") != 0) 135 1.3.2.2 rmind return 0; 136 1.3.2.2 rmind if (wzero3ssp_lookup() == NULL) 137 1.3.2.2 rmind return 0; 138 1.3.2.2 rmind if (wzero3ssp_sc != NULL) 139 1.3.2.2 rmind return 0; 140 1.3.2.2 rmind return 1; 141 1.3.2.2 rmind } 142 1.3.2.2 rmind 143 1.3.2.2 rmind static void 144 1.3.2.2 rmind wzero3ssp_attach(device_t parent, device_t self, void *aux) 145 1.3.2.2 rmind { 146 1.3.2.2 rmind struct wzero3ssp_softc *sc = device_private(self); 147 1.3.2.2 rmind 148 1.3.2.2 rmind sc->sc_dev = self; 149 1.3.2.2 rmind wzero3ssp_sc = sc; 150 1.3.2.2 rmind 151 1.3.2.2 rmind aprint_normal("\n"); 152 1.3.2.2 rmind aprint_naive("\n"); 153 1.3.2.2 rmind 154 1.3.2.2 rmind sc->sc_model = wzero3ssp_lookup(); 155 1.3.2.2 rmind if (sc->sc_model == NULL) { 156 1.3.2.2 rmind aprint_error_dev(self, "unknown model\n"); 157 1.3.2.2 rmind return; 158 1.3.2.2 rmind } 159 1.3.2.2 rmind 160 1.3.2.2 rmind mutex_init(&sc->sc_mtx, MUTEX_DEFAULT, IPL_TTY); 161 1.3.2.2 rmind 162 1.3.2.2 rmind sc->sc_iot = &pxa2x0_bs_tag; 163 1.3.2.2 rmind if (bus_space_map(sc->sc_iot, sc->sc_model->sspaddr, PXA2X0_SSP_SIZE, 0, 164 1.3.2.2 rmind &sc->sc_ioh)) { 165 1.3.2.2 rmind aprint_error_dev(sc->sc_dev, "can't map bus space\n"); 166 1.3.2.2 rmind return; 167 1.3.2.2 rmind } 168 1.3.2.2 rmind 169 1.3.2.2 rmind if (!pmf_device_register(sc->sc_dev, NULL, wzero3ssp_resume)) 170 1.3.2.2 rmind aprint_error_dev(sc->sc_dev, 171 1.3.2.2 rmind "couldn't establish power handler\n"); 172 1.3.2.2 rmind 173 1.3.2.2 rmind wzero3ssp_init(sc); 174 1.3.2.2 rmind } 175 1.3.2.2 rmind 176 1.3.2.2 rmind /* 177 1.3.2.2 rmind * Initialize the dedicated SSP unit and disable all chip selects. 178 1.3.2.2 rmind * This function is called with interrupts disabled. 179 1.3.2.2 rmind */ 180 1.3.2.2 rmind static void 181 1.3.2.2 rmind wzero3ssp_init(struct wzero3ssp_softc *sc) 182 1.3.2.2 rmind { 183 1.3.2.2 rmind 184 1.3.2.2 rmind if (sc->sc_model->sspaddr == PXA2X0_SSP1_BASE) 185 1.3.2.2 rmind pxa2x0_clkman_config(CKEN_SSP2, 1); 186 1.3.2.2 rmind else if (sc->sc_model->sspaddr == PXA2X0_SSP2_BASE) 187 1.3.2.2 rmind pxa2x0_clkman_config(CKEN_SSP3, 1); 188 1.3.2.2 rmind 189 1.3.2.2 rmind bus_space_write_4(sc->sc_iot, sc->sc_ioh, SSP_SSCR0, 0); 190 1.3.2.2 rmind bus_space_write_4(sc->sc_iot, sc->sc_ioh, SSP_SSCR1, 0); 191 1.3.2.2 rmind 192 1.3.2.2 rmind /* XXX */ 193 1.3.2.2 rmind if (platid_match(&platid, &platid_mask_MACH_SHARP_WZERO3_WS003SH) 194 1.3.2.2 rmind || platid_match(&platid, &platid_mask_MACH_SHARP_WZERO3_WS004SH)) { 195 1.3.2.2 rmind pxa2x0_gpio_set_function(39/*GPIO_WS003SH_XXX*/, 196 1.3.2.2 rmind GPIO_OUT|GPIO_SET); 197 1.3.2.2 rmind pxa2x0_gpio_set_function(GPIO_WS003SH_MAX1233_CS, 198 1.3.2.2 rmind GPIO_OUT|GPIO_SET); 199 1.3.2.2 rmind } 200 1.3.2.2 rmind if (platid_match(&platid, &platid_mask_MACH_SHARP_WZERO3_WS007SH)) { 201 1.3.2.2 rmind pxa2x0_gpio_set_function(GPIO_WS007SH_ADS7846_CS, 202 1.3.2.2 rmind GPIO_OUT|GPIO_SET); 203 1.3.2.2 rmind } 204 1.3.2.2 rmind if (platid_match(&platid, &platid_mask_MACH_SHARP_WZERO3_WS011SH)) { 205 1.3.2.2 rmind pxa2x0_gpio_set_function(GPIO_WS011SH_AK4184_CS, 206 1.3.2.2 rmind GPIO_OUT|GPIO_SET); 207 1.3.2.2 rmind } 208 1.3.2.2 rmind } 209 1.3.2.2 rmind 210 1.3.2.2 rmind static bool 211 1.3.2.2 rmind wzero3ssp_resume(device_t dv, const pmf_qual_t *qual) 212 1.3.2.2 rmind { 213 1.3.2.2 rmind struct wzero3ssp_softc *sc = device_private(dv); 214 1.3.2.2 rmind 215 1.3.2.2 rmind mutex_enter(&sc->sc_mtx); 216 1.3.2.2 rmind wzero3ssp_init(sc); 217 1.3.2.2 rmind mutex_exit(&sc->sc_mtx); 218 1.3.2.2 rmind 219 1.3.2.2 rmind return true; 220 1.3.2.2 rmind } 221 1.3.2.2 rmind 222 1.3.2.2 rmind /* 223 1.3.2.2 rmind * Transmit a single data word to one of the ICs, keep the chip selected 224 1.3.2.2 rmind * afterwards, and don't wait for data to be returned in SSDR. Interrupts 225 1.3.2.2 rmind * must be held off until wzero3ssp_ic_stop() gets called. 226 1.3.2.2 rmind */ 227 1.3.2.2 rmind void 228 1.3.2.2 rmind wzero3ssp_ic_start(int ic, uint32_t cmd) 229 1.3.2.2 rmind { 230 1.3.2.2 rmind struct wzero3ssp_softc *sc; 231 1.3.2.2 rmind 232 1.3.2.2 rmind KASSERT(wzero3ssp_sc != NULL); 233 1.3.2.2 rmind sc = wzero3ssp_sc; 234 1.3.2.2 rmind 235 1.3.2.2 rmind mutex_enter(&sc->sc_mtx); 236 1.3.2.2 rmind 237 1.3.2.2 rmind /* disable other ICs */ 238 1.3.2.2 rmind bus_space_write_4(sc->sc_iot, sc->sc_ioh, SSP_SSCR0, 0); 239 1.3.2.2 rmind if (platid_match(&platid, &platid_mask_MACH_SHARP_WZERO3_WS007SH)) { 240 1.3.2.2 rmind if (ic != WZERO3_SSP_IC_ADS7846) 241 1.3.2.2 rmind pxa2x0_gpio_set_bit(GPIO_WS007SH_ADS7846_CS); 242 1.3.2.2 rmind } 243 1.3.2.2 rmind if (platid_match(&platid, &platid_mask_MACH_SHARP_WZERO3_WS011SH)) { 244 1.3.2.3 rmind if (ic != WZERO3_SSP_IC_AK4184_TP 245 1.3.2.3 rmind && ic != WZERO3_SSP_IC_AK4184_KEYPAD) 246 1.3.2.2 rmind pxa2x0_gpio_set_bit(GPIO_WS011SH_AK4184_CS); 247 1.3.2.2 rmind } 248 1.3.2.2 rmind 249 1.3.2.2 rmind /* activate the chosen one */ 250 1.3.2.2 rmind switch (ic) { 251 1.3.2.2 rmind case WZERO3_SSP_IC_ADS7846: 252 1.3.2.2 rmind bus_space_write_4(sc->sc_iot, sc->sc_ioh, SSP_SSCR0, 0); 253 1.3.2.2 rmind bus_space_write_4(sc->sc_iot, sc->sc_ioh, SSP_SSCR0, 254 1.3.2.2 rmind WS007SH_SSCR0_ADS7846); 255 1.3.2.2 rmind pxa2x0_gpio_clear_bit(GPIO_WS007SH_ADS7846_CS); 256 1.3.2.2 rmind bus_space_write_1(sc->sc_iot, sc->sc_ioh, SSP_SSDR, cmd); 257 1.3.2.2 rmind while ((bus_space_read_4(sc->sc_iot, sc->sc_ioh, SSP_SSSR) 258 1.3.2.2 rmind & SSSR_TNF) != SSSR_TNF) 259 1.3.2.2 rmind continue; /* poll */ 260 1.3.2.2 rmind break; 261 1.3.2.3 rmind case WZERO3_SSP_IC_AK4184_TP: 262 1.3.2.2 rmind bus_space_write_4(sc->sc_iot, sc->sc_ioh, SSP_SSCR0, 0); 263 1.3.2.2 rmind bus_space_write_4(sc->sc_iot, sc->sc_ioh, SSP_SSCR0, 264 1.3.2.2 rmind WS011SH_SSCR0_AK4184_TP); 265 1.3.2.2 rmind pxa2x0_gpio_clear_bit(GPIO_WS011SH_AK4184_CS); 266 1.3.2.2 rmind (void) bus_space_read_4(sc->sc_iot, sc->sc_ioh, SSP_SSDR); 267 1.3.2.2 rmind while (!(bus_space_read_4(sc->sc_iot, sc->sc_ioh, SSP_SSSR) 268 1.3.2.2 rmind & SSSR_TNF)) 269 1.3.2.2 rmind continue; /* poll */ 270 1.3.2.2 rmind bus_space_write_4(sc->sc_iot, sc->sc_ioh, SSP_SSDR, cmd << 16); 271 1.3.2.2 rmind while (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SSP_SSSR) 272 1.3.2.2 rmind & SSSR_BUSY) 273 1.3.2.2 rmind continue; /* poll */ 274 1.3.2.2 rmind break; 275 1.3.2.2 rmind case WZERO3_SSP_IC_MAX1233: 276 1.3.2.3 rmind case WZERO3_SSP_IC_AK4184_KEYPAD: 277 1.3.2.2 rmind case WZERO3_SSP_IC_NUM: 278 1.3.2.2 rmind default: 279 1.3.2.2 rmind break; 280 1.3.2.2 rmind } 281 1.3.2.2 rmind } 282 1.3.2.2 rmind 283 1.3.2.2 rmind /* 284 1.3.2.2 rmind * Read the last value from SSDR and deactivate all chip-selects. 285 1.3.2.2 rmind */ 286 1.3.2.2 rmind uint32_t 287 1.3.2.2 rmind wzero3ssp_ic_stop(int ic) 288 1.3.2.2 rmind { 289 1.3.2.2 rmind struct wzero3ssp_softc *sc; 290 1.3.2.2 rmind uint32_t rv; 291 1.3.2.2 rmind 292 1.3.2.2 rmind KASSERT(wzero3ssp_sc != NULL); 293 1.3.2.2 rmind sc = wzero3ssp_sc; 294 1.3.2.2 rmind 295 1.3.2.2 rmind switch (ic) { 296 1.3.2.2 rmind case WZERO3_SSP_IC_ADS7846: 297 1.3.2.2 rmind /* read result of last command */ 298 1.3.2.2 rmind while ((bus_space_read_4(sc->sc_iot, sc->sc_ioh, SSP_SSSR) 299 1.3.2.2 rmind & SSSR_RNE) != SSSR_RNE) 300 1.3.2.2 rmind continue; /* poll */ 301 1.3.2.2 rmind rv = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SSP_SSDR); 302 1.3.2.2 rmind pxa2x0_gpio_set_bit(GPIO_WS007SH_ADS7846_CS); 303 1.3.2.2 rmind break; 304 1.3.2.3 rmind case WZERO3_SSP_IC_AK4184_TP: 305 1.3.2.2 rmind /* read result of last command */ 306 1.3.2.2 rmind while ((bus_space_read_4(sc->sc_iot, sc->sc_ioh, SSP_SSSR) 307 1.3.2.2 rmind & SSSR_RNE) != SSSR_RNE) 308 1.3.2.2 rmind continue; /* poll */ 309 1.3.2.2 rmind rv = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SSP_SSDR); 310 1.3.2.2 rmind pxa2x0_gpio_set_bit(GPIO_WS011SH_AK4184_CS); 311 1.3.2.2 rmind break; 312 1.3.2.2 rmind case WZERO3_SSP_IC_MAX1233: 313 1.3.2.3 rmind case WZERO3_SSP_IC_AK4184_KEYPAD: 314 1.3.2.2 rmind case WZERO3_SSP_IC_NUM: 315 1.3.2.2 rmind default: 316 1.3.2.2 rmind rv = 0; 317 1.3.2.2 rmind break; 318 1.3.2.2 rmind } 319 1.3.2.2 rmind 320 1.3.2.2 rmind mutex_exit(&sc->sc_mtx); 321 1.3.2.2 rmind 322 1.3.2.2 rmind return rv; 323 1.3.2.2 rmind } 324 1.3.2.2 rmind 325 1.3.2.2 rmind /* 326 1.3.2.2 rmind * Activate one of the chip-select lines, transmit one word value in 327 1.3.2.2 rmind * each direction, and deactivate the chip-select again. 328 1.3.2.2 rmind */ 329 1.3.2.2 rmind uint32_t 330 1.3.2.2 rmind wzero3ssp_ic_send(int ic, uint32_t data, uint32_t data2) 331 1.3.2.2 rmind { 332 1.3.2.2 rmind struct wzero3ssp_softc *sc; 333 1.3.2.2 rmind 334 1.3.2.2 rmind if (wzero3ssp_sc == NULL) { 335 1.3.2.2 rmind aprint_error("%s: not configured\n", __func__); 336 1.3.2.2 rmind return 0; 337 1.3.2.2 rmind } 338 1.3.2.2 rmind sc = wzero3ssp_sc; 339 1.3.2.2 rmind 340 1.3.2.2 rmind switch (ic) { 341 1.3.2.2 rmind case WZERO3_SSP_IC_ADS7846: 342 1.3.2.2 rmind return wzero3ssp_read_ads7846(sc, data); 343 1.3.2.2 rmind case WZERO3_SSP_IC_MAX1233: 344 1.3.2.2 rmind return wzero3ssp_read_max1233(sc, data, data2); 345 1.3.2.3 rmind case WZERO3_SSP_IC_AK4184_TP: 346 1.3.2.3 rmind return wzero3ssp_read_ak4184_tp(sc, data); 347 1.3.2.3 rmind case WZERO3_SSP_IC_AK4184_KEYPAD: 348 1.3.2.3 rmind return wzero3ssp_read_ak4184_keypad(sc, data, data2); 349 1.3.2.2 rmind case WZERO3_SSP_IC_NUM: 350 1.3.2.2 rmind default: 351 1.3.2.2 rmind aprint_error("%s: invalid IC %d\n", __func__, ic); 352 1.3.2.2 rmind return 0; 353 1.3.2.2 rmind } 354 1.3.2.2 rmind } 355 1.3.2.2 rmind 356 1.3.2.2 rmind static uint32_t 357 1.3.2.2 rmind wzero3ssp_read_ads7846(struct wzero3ssp_softc *sc, uint32_t cmd) 358 1.3.2.2 rmind { 359 1.3.2.2 rmind uint32_t rv; 360 1.3.2.2 rmind 361 1.3.2.2 rmind mutex_enter(&sc->sc_mtx); 362 1.3.2.2 rmind 363 1.3.2.2 rmind bus_space_write_4(sc->sc_iot, sc->sc_ioh, SSP_SSCR0, 0); 364 1.3.2.2 rmind bus_space_write_4(sc->sc_iot, sc->sc_ioh, SSP_SSCR0, 365 1.3.2.2 rmind WS007SH_SSCR0_ADS7846); 366 1.3.2.2 rmind 367 1.3.2.2 rmind pxa2x0_gpio_clear_bit(GPIO_WS007SH_ADS7846_CS); 368 1.3.2.2 rmind 369 1.3.2.2 rmind /* send cmd */ 370 1.3.2.2 rmind while (!(bus_space_read_4(sc->sc_iot, sc->sc_ioh, SSP_SSSR) & SSSR_TNF)) 371 1.3.2.2 rmind continue; /* poll */ 372 1.3.2.2 rmind bus_space_write_4(sc->sc_iot, sc->sc_ioh, SSP_SSDR, cmd); 373 1.3.2.2 rmind while (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SSP_SSSR) & SSSR_BUSY) 374 1.3.2.2 rmind continue; /* poll */ 375 1.3.2.2 rmind 376 1.3.2.2 rmind while (!(bus_space_read_4(sc->sc_iot, sc->sc_ioh, SSP_SSSR) & SSSR_RNE)) 377 1.3.2.2 rmind continue; /* poll */ 378 1.3.2.2 rmind rv = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SSP_SSDR); 379 1.3.2.2 rmind 380 1.3.2.2 rmind pxa2x0_gpio_set_bit(GPIO_WS007SH_ADS7846_CS); 381 1.3.2.2 rmind 382 1.3.2.2 rmind mutex_exit(&sc->sc_mtx); 383 1.3.2.2 rmind 384 1.3.2.2 rmind return rv; 385 1.3.2.2 rmind } 386 1.3.2.2 rmind 387 1.3.2.2 rmind static uint32_t 388 1.3.2.2 rmind wzero3ssp_read_max1233(struct wzero3ssp_softc *sc, uint32_t cmd, uint32_t data) 389 1.3.2.2 rmind { 390 1.3.2.2 rmind uint32_t rv; 391 1.3.2.2 rmind 392 1.3.2.2 rmind mutex_enter(&sc->sc_mtx); 393 1.3.2.2 rmind 394 1.3.2.2 rmind bus_space_write_4(sc->sc_iot, sc->sc_ioh, SSP_SSCR0, 0); 395 1.3.2.2 rmind bus_space_write_4(sc->sc_iot, sc->sc_ioh, SSP_SSCR0, 396 1.3.2.2 rmind WS003SH_SSCR0_MAX1233); 397 1.3.2.2 rmind 398 1.3.2.2 rmind pxa2x0_gpio_set_bit(39/*GPIO_WS003SH_XXX*/); 399 1.3.2.2 rmind pxa2x0_gpio_clear_bit(GPIO_WS003SH_MAX1233_CS); 400 1.3.2.2 rmind 401 1.3.2.2 rmind /* send cmd */ 402 1.3.2.2 rmind while (!(bus_space_read_4(sc->sc_iot, sc->sc_ioh, SSP_SSSR) & SSSR_TNF)) 403 1.3.2.2 rmind continue; /* poll */ 404 1.3.2.2 rmind bus_space_write_4(sc->sc_iot, sc->sc_ioh, SSP_SSDR, cmd); 405 1.3.2.2 rmind while (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SSP_SSSR) & SSSR_BUSY) 406 1.3.2.2 rmind continue; /* poll */ 407 1.3.2.2 rmind while (!(bus_space_read_4(sc->sc_iot, sc->sc_ioh, SSP_SSSR) & SSSR_RNE)) 408 1.3.2.2 rmind continue; /* poll */ 409 1.3.2.2 rmind (void)bus_space_read_4(sc->sc_iot, sc->sc_ioh, SSP_SSDR); 410 1.3.2.2 rmind 411 1.3.2.2 rmind while (!(bus_space_read_4(sc->sc_iot, sc->sc_ioh, SSP_SSSR) & SSSR_TNF)) 412 1.3.2.2 rmind continue; /* poll */ 413 1.3.2.2 rmind bus_space_write_4(sc->sc_iot, sc->sc_ioh, SSP_SSDR, data); 414 1.3.2.2 rmind while (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SSP_SSSR) & SSSR_BUSY) 415 1.3.2.2 rmind continue; /* poll */ 416 1.3.2.2 rmind while (!(bus_space_read_4(sc->sc_iot, sc->sc_ioh, SSP_SSSR) & SSSR_RNE)) 417 1.3.2.2 rmind continue; /* poll */ 418 1.3.2.2 rmind rv = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SSP_SSDR); 419 1.3.2.2 rmind 420 1.3.2.2 rmind pxa2x0_gpio_set_bit(GPIO_WS003SH_MAX1233_CS); 421 1.3.2.2 rmind 422 1.3.2.2 rmind mutex_exit(&sc->sc_mtx); 423 1.3.2.2 rmind 424 1.3.2.2 rmind return rv; 425 1.3.2.2 rmind } 426 1.3.2.2 rmind 427 1.3.2.2 rmind static uint32_t 428 1.3.2.3 rmind wzero3ssp_read_ak4184_tp(struct wzero3ssp_softc *sc, uint32_t cmd) 429 1.3.2.2 rmind { 430 1.3.2.2 rmind uint32_t rv; 431 1.3.2.2 rmind 432 1.3.2.2 rmind mutex_enter(&sc->sc_mtx); 433 1.3.2.2 rmind 434 1.3.2.2 rmind bus_space_write_4(sc->sc_iot, sc->sc_ioh, SSP_SSCR0, 0); 435 1.3.2.2 rmind bus_space_write_4(sc->sc_iot, sc->sc_ioh, SSP_SSCR0, 436 1.3.2.2 rmind WS011SH_SSCR0_AK4184_TP); 437 1.3.2.2 rmind 438 1.3.2.2 rmind pxa2x0_gpio_clear_bit(GPIO_WS011SH_AK4184_CS); 439 1.3.2.2 rmind 440 1.3.2.3 rmind /* clear rx fifo */ 441 1.3.2.2 rmind (void) bus_space_read_4(sc->sc_iot, sc->sc_ioh, SSP_SSDR); 442 1.3.2.2 rmind 443 1.3.2.2 rmind /* send cmd */ 444 1.3.2.2 rmind while (!(bus_space_read_4(sc->sc_iot, sc->sc_ioh, SSP_SSSR) & SSSR_TNF)) 445 1.3.2.2 rmind continue; /* poll */ 446 1.3.2.2 rmind bus_space_write_4(sc->sc_iot, sc->sc_ioh, SSP_SSDR, cmd << 16); 447 1.3.2.2 rmind while (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SSP_SSSR) & SSSR_BUSY) 448 1.3.2.2 rmind continue; /* poll */ 449 1.3.2.2 rmind 450 1.3.2.2 rmind while (!(bus_space_read_4(sc->sc_iot, sc->sc_ioh, SSP_SSSR) & SSSR_RNE)) 451 1.3.2.2 rmind continue; /* poll */ 452 1.3.2.2 rmind rv = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SSP_SSDR); 453 1.3.2.2 rmind 454 1.3.2.2 rmind pxa2x0_gpio_set_bit(GPIO_WS011SH_AK4184_CS); 455 1.3.2.2 rmind 456 1.3.2.2 rmind mutex_exit(&sc->sc_mtx); 457 1.3.2.2 rmind 458 1.3.2.2 rmind return rv; 459 1.3.2.2 rmind } 460 1.3.2.3 rmind 461 1.3.2.3 rmind static uint16_t 462 1.3.2.3 rmind wzero3ssp_read_ak4184_keypad(struct wzero3ssp_softc *sc, uint32_t cmd, 463 1.3.2.3 rmind uint32_t data) 464 1.3.2.3 rmind { 465 1.3.2.3 rmind uint16_t rv; 466 1.3.2.3 rmind 467 1.3.2.3 rmind mutex_enter(&sc->sc_mtx); 468 1.3.2.3 rmind 469 1.3.2.3 rmind bus_space_write_4(sc->sc_iot, sc->sc_ioh, SSP_SSCR0, 0); 470 1.3.2.3 rmind bus_space_write_4(sc->sc_iot, sc->sc_ioh, SSP_SSCR0, 471 1.3.2.3 rmind WS011SH_SSCR0_AK4184_KEYPAD); 472 1.3.2.3 rmind 473 1.3.2.3 rmind pxa2x0_gpio_clear_bit(GPIO_WS011SH_AK4184_CS); 474 1.3.2.3 rmind 475 1.3.2.3 rmind /* clear rx fifo */ 476 1.3.2.3 rmind (void) bus_space_read_4(sc->sc_iot, sc->sc_ioh, SSP_SSDR); 477 1.3.2.3 rmind 478 1.3.2.3 rmind /* send cmd */ 479 1.3.2.3 rmind while (!(bus_space_read_4(sc->sc_iot, sc->sc_ioh, SSP_SSSR) & SSSR_TNF)) 480 1.3.2.3 rmind continue; /* poll */ 481 1.3.2.3 rmind bus_space_write_2(sc->sc_iot, sc->sc_ioh, SSP_SSDR, (uint16_t)cmd); 482 1.3.2.3 rmind while (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SSP_SSSR) & SSSR_BUSY) 483 1.3.2.3 rmind continue; /* poll */ 484 1.3.2.3 rmind while (!(bus_space_read_4(sc->sc_iot, sc->sc_ioh, SSP_SSSR) & SSSR_RNE)) 485 1.3.2.3 rmind continue; /* poll */ 486 1.3.2.3 rmind (void) bus_space_read_2(sc->sc_iot, sc->sc_ioh, SSP_SSDR); 487 1.3.2.3 rmind 488 1.3.2.3 rmind while (!(bus_space_read_4(sc->sc_iot, sc->sc_ioh, SSP_SSSR) & SSSR_TNF)) 489 1.3.2.3 rmind continue; /* poll */ 490 1.3.2.3 rmind bus_space_write_2(sc->sc_iot, sc->sc_ioh, SSP_SSDR, (uint16_t)data); 491 1.3.2.3 rmind while (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SSP_SSSR) & SSSR_BUSY) 492 1.3.2.3 rmind continue; /* poll */ 493 1.3.2.3 rmind while (!(bus_space_read_4(sc->sc_iot, sc->sc_ioh, SSP_SSSR) & SSSR_RNE)) 494 1.3.2.3 rmind continue; /* poll */ 495 1.3.2.3 rmind rv = bus_space_read_2(sc->sc_iot, sc->sc_ioh, SSP_SSDR); 496 1.3.2.3 rmind 497 1.3.2.3 rmind pxa2x0_gpio_set_bit(GPIO_WS011SH_AK4184_CS); 498 1.3.2.3 rmind 499 1.3.2.3 rmind mutex_exit(&sc->sc_mtx); 500 1.3.2.3 rmind 501 1.3.2.3 rmind return rv; 502 1.3.2.3 rmind } 503
Indexes created Thu Oct 02 01:09:59 GMT 2025