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frame.h revision 1.1
      1  1.1  ichiro /*	$NetBSD: frame.h,v 1.1 2001/02/23 03:48:16 ichiro Exp $	*/
      2  1.1  ichiro 
      3  1.1  ichiro /*
      4  1.1  ichiro  * Copyright (c) 1994-1997 Mark Brinicombe.
      5  1.1  ichiro  * Copyright (c) 1994 Brini.
      6  1.1  ichiro  * All rights reserved.
      7  1.1  ichiro  *
      8  1.1  ichiro  * This code is derived from software written for Brini by Mark Brinicombe
      9  1.1  ichiro  *
     10  1.1  ichiro  * Redistribution and use in source and binary forms, with or without
     11  1.1  ichiro  * modification, are permitted provided that the following conditions
     12  1.1  ichiro  * are met:
     13  1.1  ichiro  * 1. Redistributions of source code must retain the above copyright
     14  1.1  ichiro  *    notice, this list of conditions and the following disclaimer.
     15  1.1  ichiro  * 2. Redistributions in binary form must reproduce the above copyright
     16  1.1  ichiro  *    notice, this list of conditions and the following disclaimer in the
     17  1.1  ichiro  *    documentation and/or other materials provided with the distribution.
     18  1.1  ichiro  * 3. All advertising materials mentioning features or use of this software
     19  1.1  ichiro  *    must display the following acknowledgement:
     20  1.1  ichiro  *	This product includes software developed by Brini.
     21  1.1  ichiro  * 4. The name of the company nor the name of the author may be used to
     22  1.1  ichiro  *    endorse or promote products derived from this software without specific
     23  1.1  ichiro  *    prior written permission.
     24  1.1  ichiro  *
     25  1.1  ichiro  * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
     26  1.1  ichiro  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
     27  1.1  ichiro  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     28  1.1  ichiro  * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
     29  1.1  ichiro  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     30  1.1  ichiro  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     31  1.1  ichiro  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     32  1.1  ichiro  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     33  1.1  ichiro  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     34  1.1  ichiro  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     35  1.1  ichiro  * SUCH DAMAGE.
     36  1.1  ichiro  *
     37  1.1  ichiro  * RiscBSD kernel project
     38  1.1  ichiro  *
     39  1.1  ichiro  * frame.h
     40  1.1  ichiro  *
     41  1.1  ichiro  * Stack frames structures
     42  1.1  ichiro  *
     43  1.1  ichiro  * Created      : 30/09/94
     44  1.1  ichiro  */
     45  1.1  ichiro 
     46  1.1  ichiro #ifndef _ARM32_FRAME_H_
     47  1.1  ichiro #define _ARM32_FRAME_H_
     48  1.1  ichiro 
     49  1.1  ichiro #include <arm/frame.h>		/* Common ARM stack frames */
     50  1.1  ichiro 
     51  1.1  ichiro #ifndef _LOCORE
     52  1.1  ichiro 
     53  1.1  ichiro /*
     54  1.1  ichiro  * System stack frames.
     55  1.1  ichiro  */
     56  1.1  ichiro 
     57  1.1  ichiro typedef struct irqframe {
     58  1.1  ichiro 	unsigned int if_spsr;
     59  1.1  ichiro 	unsigned int if_r0;
     60  1.1  ichiro 	unsigned int if_r1;
     61  1.1  ichiro 	unsigned int if_r2;
     62  1.1  ichiro 	unsigned int if_r3;
     63  1.1  ichiro 	unsigned int if_r4;
     64  1.1  ichiro 	unsigned int if_r5;
     65  1.1  ichiro 	unsigned int if_r6;
     66  1.1  ichiro 	unsigned int if_r7;
     67  1.1  ichiro 	unsigned int if_r8;
     68  1.1  ichiro 	unsigned int if_r9;
     69  1.1  ichiro 	unsigned int if_r10;
     70  1.1  ichiro 	unsigned int if_r11;
     71  1.1  ichiro 	unsigned int if_r12;
     72  1.1  ichiro 	unsigned int if_usr_sp;
     73  1.1  ichiro 	unsigned int if_usr_lr;
     74  1.1  ichiro 	unsigned int if_svc_sp;
     75  1.1  ichiro 	unsigned int if_svc_lr;
     76  1.1  ichiro 	unsigned int if_pc;
     77  1.1  ichiro } irqframe_t;
     78  1.1  ichiro 
     79  1.1  ichiro #define clockframe irqframe
     80  1.1  ichiro 
     81  1.1  ichiro /*
     82  1.1  ichiro  * Switch frame
     83  1.1  ichiro  */
     84  1.1  ichiro 
     85  1.1  ichiro struct switchframe {
     86  1.1  ichiro 	int	sf_spl;
     87  1.1  ichiro 	u_int	sf_r4;
     88  1.1  ichiro 	u_int	sf_r5;
     89  1.1  ichiro 	u_int	sf_r6;
     90  1.1  ichiro 	u_int	sf_r7;
     91  1.1  ichiro 	u_int	sf_pc;
     92  1.1  ichiro };
     93  1.1  ichiro 
     94  1.1  ichiro /*
     95  1.1  ichiro  * Stack frame. Used during stack traces (db_trace.c)
     96  1.1  ichiro  */
     97  1.1  ichiro struct frame {
     98  1.1  ichiro 	u_int	fr_fp;
     99  1.1  ichiro 	u_int	fr_sp;
    100  1.1  ichiro 	u_int	fr_lr;
    101  1.1  ichiro 	u_int	fr_pc;
    102  1.1  ichiro };
    103  1.1  ichiro 
    104  1.1  ichiro #ifdef _KERNEL
    105  1.1  ichiro void validate_trapframe __P((trapframe_t *, int));
    106  1.1  ichiro #endif /* _KERNEL */
    107  1.1  ichiro 
    108  1.1  ichiro #else /* _LOCORE */
    109  1.1  ichiro 
    110  1.1  ichiro /*
    111  1.1  ichiro  * ASM macros for pushing and pulling trapframes from the stack
    112  1.1  ichiro  *
    113  1.1  ichiro  * These macros are used to handle the irqframe and trapframe structures
    114  1.1  ichiro  * defined above.
    115  1.1  ichiro  */
    116  1.1  ichiro 
    117  1.1  ichiro /*
    118  1.1  ichiro  * PUSHFRAME - macro to push a trap frame on the stack in the current mode
    119  1.1  ichiro  * Since the current mode is used, the SVC lr field is not defined.
    120  1.1  ichiro  *
    121  1.1  ichiro  * NOTE: r13 and r14 are stored separately as a work around for the
    122  1.1  ichiro  * SA110 rev 2 STM^ bug
    123  1.1  ichiro  */
    124  1.1  ichiro 
    125  1.1  ichiro #define PUSHFRAME							   \
    126  1.1  ichiro 	str	lr, [sp, #-4]!;		/* Push the return address */	   \
    127  1.1  ichiro 	sub	sp, sp, #(4*17);	/* Adjust the stack pointer */	   \
    128  1.1  ichiro 	stmia	sp, {r0-r12};		/* Push the user mode registers */ \
    129  1.1  ichiro 	add	r0, sp, #(4*13);	/* Adjust the stack pointer */	   \
    130  1.1  ichiro 	stmia	r0, {r13-r14}^;		/* Push the user mode registers */ \
    131  1.1  ichiro         mov     r0, r0;                 /* NOP for previous instruction */ \
    132  1.1  ichiro 	mrs	r0, spsr;		/* Put the SPSR on the stack */	   \
    133  1.1  ichiro 	str	r0, [sp, #-4]!;
    134  1.1  ichiro 
    135  1.1  ichiro /*
    136  1.1  ichiro  * PULLFRAME - macro to pull a trap frame from the stack in the current mode
    137  1.1  ichiro  * Since the current mode is used, the SVC lr field is ignored.
    138  1.1  ichiro  */
    139  1.1  ichiro 
    140  1.1  ichiro #define PULLFRAME							   \
    141  1.1  ichiro         ldr     r0, [sp], #0x0004;      /* Get the SPSR from stack */	   \
    142  1.1  ichiro         msr     spsr, r0;						   \
    143  1.1  ichiro         ldmia   sp, {r0-r14}^;		/* Restore registers (usr mode) */ \
    144  1.1  ichiro         mov     r0, r0;                 /* NOP for previous instruction */ \
    145  1.1  ichiro 	add	sp, sp, #(4*17);	/* Adjust the stack pointer */	   \
    146  1.1  ichiro  	ldr	lr, [sp], #0x0004;	/* Pull the return address */
    147  1.1  ichiro 
    148  1.1  ichiro /*
    149  1.1  ichiro  * PUSHFRAMEINSVC - macro to push a trap frame on the stack in SVC32 mode
    150  1.1  ichiro  * This should only be used if the processor is not currently in SVC32
    151  1.1  ichiro  * mode. The processor mode is switched to SVC mode and the trap frame is
    152  1.1  ichiro  * stored. The SVC lr field is used to store the previous value of
    153  1.1  ichiro  * lr in SVC mode.
    154  1.1  ichiro  *
    155  1.1  ichiro  * NOTE: r13 and r14 are stored separately as a work around for the
    156  1.1  ichiro  * SA110 rev 2 STM^ bug
    157  1.1  ichiro  */
    158  1.1  ichiro 
    159  1.1  ichiro #define PUSHFRAMEINSVC							   \
    160  1.1  ichiro 	stmdb	sp, {r0-r3};		/* Save 4 registers */		   \
    161  1.1  ichiro 	mov	r0, lr;			/* Save xxx32 r14 */		   \
    162  1.1  ichiro 	mov	r1, sp;			/* Save xxx32 sp */		   \
    163  1.1  ichiro 	mrs	r3, spsr;		/* Save xxx32 spsr */		   \
    164  1.1  ichiro 	mrs     r2, cpsr; 		/* Get the CPSR */		   \
    165  1.1  ichiro 	bic     r2, r2, #(PSR_MODE);	/* Fix for SVC mode */		   \
    166  1.1  ichiro 	orr     r2, r2, #(PSR_SVC32_MODE);				   \
    167  1.1  ichiro 	msr     cpsr, r2;		/* Punch into SVC mode */	   \
    168  1.1  ichiro 	mov	r2, sp;			/* Save	SVC sp */		   \
    169  1.1  ichiro 	str	r0, [sp, #-4]!;		/* Push return address */	   \
    170  1.1  ichiro 	str	lr, [sp, #-4]!;		/* Push SVC lr */		   \
    171  1.1  ichiro 	str	r2, [sp, #-4]!;		/* Push SVC sp */		   \
    172  1.1  ichiro 	msr     spsr, r3;		/* Restore correct spsr */	   \
    173  1.1  ichiro 	ldmdb	r1, {r0-r3};		/* Restore 4 regs from xxx mode */ \
    174  1.1  ichiro 	sub	sp, sp, #(4*15);	/* Adjust the stack pointer */	   \
    175  1.1  ichiro 	stmia	sp, {r0-r12};		/* Push the user mode registers */ \
    176  1.1  ichiro 	add	r0, sp, #(4*13);	/* Adjust the stack pointer */	   \
    177  1.1  ichiro 	stmia	r0, {r13-r14}^;		/* Push the user mode registers */ \
    178  1.1  ichiro         mov     r0, r0;                 /* NOP for previous instruction */ \
    179  1.1  ichiro 	mrs	r0, spsr;		/* Put the SPSR on the stack */	   \
    180  1.1  ichiro 	str	r0, [sp, #-4]!
    181  1.1  ichiro 
    182  1.1  ichiro /*
    183  1.1  ichiro  * PULLFRAMEFROMSVCANDEXIT - macro to pull a trap frame from the stack
    184  1.1  ichiro  * in SVC32 mode and restore the saved processor mode and PC.
    185  1.1  ichiro  * This should be used when the SVC lr register needs to be restored on
    186  1.1  ichiro  * exit.
    187  1.1  ichiro  */
    188  1.1  ichiro 
    189  1.1  ichiro #define PULLFRAMEFROMSVCANDEXIT						   \
    190  1.1  ichiro         ldr     r0, [sp], #0x0004;	/* Get the SPSR from stack */	   \
    191  1.1  ichiro         msr     spsr, r0;		/* restore SPSR */		   \
    192  1.1  ichiro         ldmia   sp, {r0-r14}^;		/* Restore registers (usr mode) */ \
    193  1.1  ichiro         mov     r0, r0;	  		/* NOP for previous instruction */ \
    194  1.1  ichiro 	add	sp, sp, #(4*15);	/* Adjust the stack pointer */	   \
    195  1.1  ichiro 	ldmia	sp, {sp, lr, pc}^	/* Restore lr and exit */
    196  1.1  ichiro 
    197  1.1  ichiro #endif _LOCORE
    198  1.1  ichiro 
    199  1.1  ichiro #endif /* _ARM32_FRAME_H_ */
    200  1.1  ichiro 
    201  1.1  ichiro /* End of frame.h */
    202