ite8181.c revision 1.1
1 /* $NetBSD: ite8181.c,v 1.1 2000/10/02 03:57:54 sato Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 SATO Kazumi 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 */ 29 30 #include <sys/param.h> 31 #include <sys/kernel.h> 32 #include <sys/device.h> 33 #include <sys/systm.h> 34 #include <sys/boot_flag.h> 35 36 #include <uvm/uvm_extern.h> 37 38 #include <dev/wscons/wsconsio.h> 39 40 #include <machine/bootinfo.h> 41 #include <machine/bus.h> 42 #include <machine/autoconf.h> 43 #include <machine/config_hook.h> 44 #include <machine/platid.h> 45 #include <machine/platid_mask.h> 46 47 #include <hpcmips/dev/ite8181reg.h> 48 #include <hpcmips/dev/ite8181var.h> 49 #include "bivideo.h" 50 #if NBIVIDEO > 0 51 #include <hpcmips/dev/bivideovar.h> 52 #endif 53 54 55 #define ITE8181DEBUG 56 #ifdef ITE8181DEBUG 57 #ifndef ITE8181DEBUG_CONF 58 #define ITE8181DEBUG_CONF 0 59 #endif 60 int ite8181_debug = ITE8181DEBUG_CONF; 61 #define DPRINTF(arg) if (ite8181_debug) printf arg 62 #define DPRINTFN(n, arg) if (ite8181_debug > (n)) printf arg 63 #define VPRINTF(arg) if (bootverbose || ite8181_debug) printf arg 64 #define VPRINTFN(n, arg) if (bootverbose || ite8181_debug > (n)) printf arg 65 #else 66 #define DPRINTF(arg) 67 #define DPRINTFN(n, arg) 68 #define VPRINTF(arg) if (bootverbose) printf arg 69 #define VPRINTFN(n, arg) if (bootverbose) printf arg 70 #endif 71 72 #ifndef ITE8181_LCD_CONTROL_ENABLE 73 int ite8181_lcd_control_disable = 1; 74 #else /* ITE8181_LCD_CONTROL_ENABLE */ 75 int ite8181_lcd_control_disable = 0; 76 #endif /* ITE8181_LCD_CONTROL_ENABLE */ 77 78 #define MSEC 1000 79 #define SEC (MSEC*1000) 80 /* 81 * function prototypes 82 */ 83 static void ite8181_config_write_4 __P((bus_space_tag_t, bus_space_handle_t, int, int)); 84 static int ite8181_config_read_4 __P((bus_space_tag_t, bus_space_handle_t, int)); 85 86 static void ite8181_gui_write_4 __P((struct ite8181_softc *, int, int)); 87 static int ite8181_gui_read_4 __P((struct ite8181_softc *, int)); 88 89 static void ite8181_gui_write_1 __P((struct ite8181_softc *, int, int)); 90 static int ite8181_gui_read_1 __P((struct ite8181_softc *, int)); 91 92 static void ite8181_graphics_write_1 __P((struct ite8181_softc *, int, int)); 93 static int ite8181_graphics_read_1 __P((struct ite8181_softc *, int)); 94 95 static void ite8181_ema_write_1 __P((struct ite8181_softc *, int, int)); 96 static int ite8181_ema_read_1 __P((struct ite8181_softc *, int)); 97 98 static void ite8181_power __P((int, void *)); 99 static int ite8181_hardpower __P((void *, int, long, void *)); 100 static int ite8181_fbinit __P((struct hpcfb_fbconf *)); 101 static int ite8181_ioctl __P((void *, u_long, caddr_t, int, struct proc *)); 102 static paddr_t ite8181_mmap __P((void *, off_t offset, int)); 103 static void ite8181_erase_cursor __P((struct ite8181_softc *)); 104 static int ite8181_lcd_power __P((struct ite8181_softc *, int)); 105 /* 106 * static variables 107 */ 108 struct hpcfb_accessops ite8181_ha = { 109 ite8181_ioctl, ite8181_mmap 110 }; 111 112 inline int 113 ite8181_config_read_4(iot, ioh, byteoffset) 114 bus_space_tag_t iot; 115 bus_space_handle_t ioh; 116 int byteoffset; 117 { 118 return bus_space_read_4(iot, ioh, ITE8181_CONF_OFFSET + byteoffset); 119 } 120 121 inline void 122 ite8181_config_write_4(iot, ioh, byteoffset, data) 123 bus_space_tag_t iot; 124 bus_space_handle_t ioh; 125 int byteoffset; 126 int data; 127 { 128 bus_space_write_4(iot, ioh, ITE8181_CONF_OFFSET + byteoffset, data); 129 } 130 131 inline int 132 ite8181_gui_read_4(sc, byteoffset) 133 struct ite8181_softc *sc; 134 int byteoffset; 135 { 136 return bus_space_read_4(sc->sc_iot, sc->sc_ioh, 137 sc->sc_gba + byteoffset); 138 } 139 140 inline void 141 ite8181_gui_write_4(sc, byteoffset, data) 142 struct ite8181_softc *sc; 143 int byteoffset; 144 int data; 145 { 146 bus_space_write_4(sc->sc_iot, sc->sc_ioh, sc->sc_gba + byteoffset, data); 147 } 148 149 inline int 150 ite8181_gui_read_1(sc, byteoffset) 151 struct ite8181_softc *sc; 152 int byteoffset; 153 { 154 return bus_space_read_1(sc->sc_iot, sc->sc_ioh, 155 sc->sc_gba + byteoffset); 156 } 157 158 inline void 159 ite8181_gui_write_1(sc, byteoffset, data) 160 struct ite8181_softc *sc; 161 int byteoffset; 162 int data; 163 { 164 bus_space_write_1(sc->sc_iot, sc->sc_ioh, sc->sc_gba + byteoffset, data); 165 } 166 167 inline int 168 ite8181_graphics_read_1(sc, byteoffset) 169 struct ite8181_softc *sc; 170 int byteoffset; 171 { 172 return bus_space_read_1(sc->sc_iot, sc->sc_ioh, 173 sc->sc_sba + byteoffset); 174 } 175 176 inline void 177 ite8181_graphics_write_1(sc, byteoffset, data) 178 struct ite8181_softc *sc; 179 int byteoffset; 180 int data; 181 { 182 bus_space_write_1(sc->sc_iot, sc->sc_ioh, sc->sc_sba + byteoffset, data); 183 } 184 185 inline int 186 ite8181_ema_read_1(sc, byteoffset) 187 struct ite8181_softc *sc; 188 int byteoffset; 189 { 190 ite8181_graphics_write_1(sc, ITE8181_EMA_EXAX, byteoffset); 191 return ite8181_graphics_read_1(sc, ITE8181_EMA_EXADATA); 192 } 193 194 inline void 195 ite8181_ema_write_1(sc, byteoffset, data) 196 struct ite8181_softc *sc; 197 int byteoffset; 198 int data; 199 { 200 ite8181_graphics_write_1(sc, ITE8181_EMA_EXAX, byteoffset); 201 ite8181_graphics_write_1(sc, ITE8181_EMA_EXADATA, data); 202 } 203 204 int 205 ite8181_probe(iot, ioh) 206 bus_space_tag_t iot; 207 bus_space_handle_t ioh; 208 { 209 unsigned long regval; 210 211 #if NBIVIDEO > 0 212 if (bivideo_dont_attach) /* some video driver already attached */ 213 return (0); 214 #endif /* NBIVIDEO > 0 */ 215 216 regval = ite8181_config_read_4(iot, ioh, ITE8181_ID); 217 VPRINTF(("ite8181_probe: vendor id=%04lx product id=%04lx\n", 218 regval & 0xffff, (regval >> 16) & 0xffff)); 219 if (regval != ((ITE8181_PRODUCT_ID << 16) | ITE8181_VENDER_ID)) 220 return (0); 221 222 return (1); 223 } 224 225 void 226 ite8181_attach(sc) 227 struct ite8181_softc *sc; 228 { 229 unsigned long regval; 230 struct hpcfb_attach_args ha; 231 int console = (bootinfo->bi_cnuse & BI_CNUSE_SERIAL) ? 0 : 1; 232 233 regval = ite8181_config_read_4(sc->sc_iot, sc->sc_ioh, ITE8181_CLASS); 234 printf(": ITE8181 Rev.%02lx\n", regval & ITE8181_REV_MASK); 235 236 /* set base offsets */ 237 sc->sc_mba = ite8181_config_read_4(sc->sc_iot, sc->sc_ioh, ITE8181_MBA); 238 DPRINTFN(1, ("ite8181: Memory base offset %08x\n", sc->sc_mba)); 239 sc->sc_gba = ite8181_config_read_4(sc->sc_iot, sc->sc_ioh, ITE8181_GBA); 240 DPRINTFN(1, ("ite8181: GUI base offset %08x\n", sc->sc_gba)); 241 sc->sc_sba = ite8181_config_read_4(sc->sc_iot, sc->sc_ioh, ITE8181_SBA); 242 DPRINTFN(1, ("ite8181: Graphics base offset %08x\n", sc->sc_sba)); 243 244 /* assume lcd is on */ 245 sc->sc_lcd = 1; 246 247 /* Add a power hook to power saving */ 248 sc->sc_powerstate = ITE8181_POWERSTATE_D0; 249 sc->sc_powerhook = powerhook_establish(ite8181_power, sc); 250 if (sc->sc_powerhook == NULL) 251 printf("%s: WARNING: unable to establish power hook\n", 252 sc->sc_dev.dv_xname); 253 254 /* Add a hard power hook to power saving */ 255 sc->sc_hardpowerhook = config_hook(CONFIG_HOOK_PMEVENT, 256 CONFIG_HOOK_PMEVENT_HARDPOWER, 257 CONFIG_HOOK_SHARE, 258 ite8181_hardpower, sc); 259 if (sc->sc_hardpowerhook == NULL) 260 printf("%s: WARNING: unable to establish hard power hook\n", 261 sc->sc_dev.dv_xname); 262 263 ite8181_fbinit(&sc->sc_fbconf); 264 265 ite8181_erase_cursor(sc); 266 267 if (console && hpcfb_cnattach(&sc->sc_fbconf) != 0) { 268 panic("ite8181_attach: can't init fb console"); 269 } 270 271 ha.ha_console = console; 272 ha.ha_accessops = &ite8181_ha; 273 ha.ha_accessctx = sc; 274 ha.ha_curfbconf = 0; 275 ha.ha_nfbconf = 1; 276 ha.ha_fbconflist = &sc->sc_fbconf; 277 ha.ha_curdspconf = 0; 278 ha.ha_ndspconf = 1; 279 ha.ha_dspconflist = &sc->sc_dspconf; 280 281 config_found(&sc->sc_dev, &ha, hpcfbprint); 282 283 #if NBIVIDEO > 0 284 /* 285 * bivideo is no longer need 286 */ 287 bivideo_dont_attach = 1; 288 #endif /* NBIVIDEO > 0 */ 289 } 290 291 int ite8181_lcd_power(sc, on) 292 struct ite8181_softc *sc; 293 int on; 294 { 295 int lcd_p; 296 int lcd_s; 297 int lcd_seq; 298 int loop = 10; 299 300 if (ite8181_lcd_control_disable) { 301 VPRINTF(("ite8171_lcd_control_disable!: %s\n", on?"on":"off")); 302 return 0; 303 } 304 305 if (sc->sc_lcd != on) { 306 ite8181_ema_write_1(sc, ITE8181_EMA_ENABLEEMA, 307 ITE8181_EMA_ENABLEPASS); 308 lcd_p = ite8181_ema_read_1(sc, ITE8181_EMA_LCDPOWER); 309 lcd_s = ite8181_ema_read_1(sc, ITE8181_EMA_LCDPOWERSTAT); 310 lcd_seq = ite8181_ema_read_1(sc, ITE8181_EMA_LCDPOWERSEQ); 311 DPRINTFN(1,("ite8181_lcd_power(%d)< p=%x, s=%x, seq=%x\n", 312 on, 313 lcd_p, lcd_s, lcd_seq)); 314 if (on) { 315 sc->sc_lcd = 1; 316 lcd_seq |= (ITE8181_PUP0|ITE8181_PUP1|ITE8181_PUP2); 317 ite8181_ema_write_1(sc, ITE8181_EMA_LCDPOWERSEQ, lcd_seq); 318 lcd_p &= ~ITE8181_LCDSTANDBY; 319 ite8181_ema_write_1(sc, ITE8181_EMA_LCDPOWER, lcd_p); 320 /* 321 * XXX: 322 * IBM WorkPad z50 power unit has too weak power. 323 * So we must wait too many times to access self device 324 * after LCD panel and BackLight on. 325 * Currently delay is not enough ??? FIXME 326 */ 327 delay(5*MSEC); 328 while (loop--) { 329 lcd_p = ite8181_ema_read_1(sc, ITE8181_EMA_LCDPOWER); 330 lcd_s = ite8181_ema_read_1(sc, ITE8181_EMA_LCDPOWERSTAT); 331 lcd_seq = ite8181_ema_read_1(sc, ITE8181_EMA_LCDPOWERSEQ); 332 DPRINTFN(1,("ite8181_lcd_power(%d)%d| p=%x, s=%x, seq=%x\n", 333 on, loop, 334 lcd_p, lcd_s, lcd_seq)); 335 /* XXX the states which are not described in manual.*/ 336 if (!(lcd_s&ITE8181_LCDPSTANDBY) && 337 !(lcd_s&ITE8181_LCDPUP) && 338 (lcd_s&ITE8181_LCDPON)) 339 break; 340 delay(100); 341 } 342 lcd_s |= ITE8181_PPTOBEON; 343 ite8181_ema_write_1(sc, ITE8181_EMA_LCDPOWERSTAT, lcd_s); 344 } else { 345 sc->sc_lcd = 0; 346 lcd_p |= ITE8181_LCDSTANDBY; 347 ite8181_ema_write_1(sc, ITE8181_EMA_LCDPOWER, lcd_p); 348 while (loop--) { 349 lcd_p = ite8181_ema_read_1(sc, ITE8181_EMA_LCDPOWER); 350 lcd_s = ite8181_ema_read_1(sc, ITE8181_EMA_LCDPOWERSTAT); 351 lcd_seq = ite8181_ema_read_1(sc, ITE8181_EMA_LCDPOWERSEQ); 352 DPRINTFN(1,("ite8181_lcd_power(%d)%d| p=%x, s=%x, seq=%x\n", 353 on, loop, 354 lcd_p, lcd_s, lcd_seq)); 355 /* XXX the states which are not described in manual.*/ 356 if ((lcd_s&ITE8181_LCDPSTANDBY) && 357 !(lcd_s&ITE8181_LCDPDOWN) && 358 !(lcd_s&ITE8181_LCDPON)) 359 break; 360 delay(100); 361 } 362 lcd_s &= ~ITE8181_PPTOBEON; 363 ite8181_ema_write_1(sc, ITE8181_EMA_LCDPOWERSTAT, lcd_s); 364 } 365 DPRINTFN(1,("ite8181_lcd_power(%d)> p=%x, s=%x, seq=%x\n", 366 on, 367 ite8181_ema_read_1(sc, ITE8181_EMA_LCDPOWER), 368 ite8181_ema_read_1(sc, ITE8181_EMA_LCDPOWERSTAT), 369 ite8181_ema_read_1(sc, ITE8181_EMA_LCDPOWERSEQ))); 370 ite8181_ema_write_1(sc, ITE8181_EMA_ENABLEEMA, 371 ITE8181_EMA_DISABLEPASS); 372 } 373 return 0; 374 } 375 376 static void 377 ite8181_erase_cursor(sc) 378 struct ite8181_softc *sc; 379 { 380 ite8181_gui_write_1(sc, ITE8181_GUI_C1C, 0); /* Cursor 1 Control Reg. */ 381 /* other ? */ 382 } 383 384 static void 385 ite8181_power(why, arg) 386 int why; 387 void *arg; 388 { 389 } 390 391 static int 392 ite8181_hardpower(ctx, type, id, msg) 393 void *ctx; 394 int type; 395 long id; 396 void *msg; 397 { 398 struct ite8181_softc *sc = ctx; 399 int why = (int)msg; 400 401 switch (why) { 402 case PWR_STANDBY: 403 sc->sc_powerstate = ITE8181_POWERSTATE_D3; 404 /* ite8181_lcd_power(sc, 0); */ 405 delay(MSEC); 406 break; 407 case PWR_SUSPEND: 408 sc->sc_powerstate = ITE8181_POWERSTATE_D2; 409 ite8181_lcd_power(sc, 0); 410 delay(MSEC); 411 break; 412 case PWR_RESUME: 413 delay(MSEC); 414 sc->sc_powerstate = ITE8181_POWERSTATE_D0; 415 ite8181_lcd_power(sc, 1); 416 /* 417 * XXX: 418 * IBM WorkPad z50 power unit has too weak power. 419 * So we must wait too many times to access other devices 420 * after LCD panel and BackLight on. 421 */ 422 delay(2*SEC); 423 break; 424 } 425 426 /* 427 * you should wait until the 428 * power state transit sequence will end. 429 */ 430 431 return (0); 432 } 433 434 435 static int 436 ite8181_fbinit(fb) 437 struct hpcfb_fbconf *fb; 438 { 439 440 /* 441 * get fb settings from bootinfo 442 */ 443 if (bootinfo == NULL || 444 bootinfo->fb_addr == 0 || 445 bootinfo->fb_line_bytes == 0 || 446 bootinfo->fb_width == 0 || 447 bootinfo->fb_height == 0) { 448 printf("no frame buffer infomation.\n"); 449 return (-1); 450 } 451 452 /* zero fill */ 453 bzero(fb, sizeof(*fb)); 454 455 fb->hf_conf_index = 0; /* configuration index */ 456 fb->hf_nconfs = 1; /* how many configurations */ 457 strcpy(fb->hf_name, "built-in video"); 458 /* frame buffer name */ 459 strcpy(fb->hf_conf_name, "default"); 460 /* configuration name */ 461 fb->hf_height = bootinfo->fb_height; 462 fb->hf_width = bootinfo->fb_width; 463 fb->hf_baseaddr = mips_ptob(mips_btop(bootinfo->fb_addr)); 464 fb->hf_offset = (u_long)bootinfo->fb_addr - fb->hf_baseaddr; 465 /* frame buffer start offset */ 466 fb->hf_bytes_per_line = bootinfo->fb_line_bytes; 467 fb->hf_nplanes = 1; 468 fb->hf_bytes_per_plane = bootinfo->fb_height * 469 bootinfo->fb_line_bytes; 470 471 fb->hf_access_flags |= HPCFB_ACCESS_BYTE; 472 fb->hf_access_flags |= HPCFB_ACCESS_WORD; 473 fb->hf_access_flags |= HPCFB_ACCESS_DWORD; 474 475 switch (bootinfo->fb_type) { 476 /* 477 * gray scale 478 */ 479 case BIFB_D2_M2L_3: 480 case BIFB_D2_M2L_3x2: 481 fb->hf_access_flags |= HPCFB_ACCESS_REVERSE; 482 /* fall through */ 483 case BIFB_D2_M2L_0: 484 case BIFB_D2_M2L_0x2: 485 fb->hf_class = HPCFB_CLASS_GRAYSCALE; 486 fb->hf_access_flags |= HPCFB_ACCESS_STATIC; 487 fb->hf_pack_width = 8; 488 fb->hf_pixels_per_pack = 4; 489 fb->hf_pixel_width = 2; 490 fb->hf_class_data_length = sizeof(struct hf_gray_tag); 491 fb->hf_u.hf_gray.hf_flags = 0; /* reserved for future use */ 492 break; 493 494 /* 495 * indexed color 496 */ 497 case BIFB_D8_FF: 498 fb->hf_access_flags |= HPCFB_ACCESS_REVERSE; 499 /* fall through */ 500 case BIFB_D8_00: 501 fb->hf_class = HPCFB_CLASS_INDEXCOLOR; 502 fb->hf_access_flags |= HPCFB_ACCESS_STATIC; 503 fb->hf_pack_width = 8; 504 fb->hf_pixels_per_pack = 1; 505 fb->hf_pixel_width = 8; 506 fb->hf_class_data_length = sizeof(struct hf_indexed_tag); 507 fb->hf_u.hf_indexed.hf_flags = 0; /* reserved for future use */ 508 break; 509 510 /* 511 * RGB color 512 */ 513 case BIFB_D16_FFFF: 514 fb->hf_access_flags |= HPCFB_ACCESS_REVERSE; 515 /* fall through */ 516 case BIFB_D16_0000: 517 fb->hf_class = HPCFB_CLASS_RGBCOLOR; 518 fb->hf_access_flags |= HPCFB_ACCESS_STATIC; 519 #if BYTE_ORDER == LITTLE_ENDIAN 520 fb->hf_swap_flags = HPCFB_SWAP_BYTE; 521 #endif 522 fb->hf_pack_width = 16; 523 fb->hf_pixels_per_pack = 1; 524 fb->hf_pixel_width = 16; 525 526 fb->hf_class_data_length = sizeof(struct hf_rgb_tag); 527 fb->hf_u.hf_rgb.hf_flags = 0; /* reserved for future use */ 528 529 fb->hf_u.hf_rgb.hf_red_width = 5; 530 fb->hf_u.hf_rgb.hf_red_shift = 11; 531 fb->hf_u.hf_rgb.hf_green_width = 6; 532 fb->hf_u.hf_rgb.hf_green_shift = 5; 533 fb->hf_u.hf_rgb.hf_blue_width = 5; 534 fb->hf_u.hf_rgb.hf_blue_shift = 0; 535 fb->hf_u.hf_rgb.hf_alpha_width = 0; 536 fb->hf_u.hf_rgb.hf_alpha_shift = 0; 537 break; 538 539 default: 540 printf("unknown type (=%d).\n", bootinfo->fb_type); 541 return (-1); 542 break; 543 } 544 545 return (0); /* no error */ 546 } 547 548 int 549 ite8181_ioctl(v, cmd, data, flag, p) 550 void *v; 551 u_long cmd; 552 caddr_t data; 553 int flag; 554 struct proc *p; 555 { 556 struct ite8181_softc *sc = (struct ite8181_softc *)v; 557 struct hpcfb_fbconf *fbconf; 558 struct hpcfb_dspconf *dspconf; 559 struct wsdisplay_cmap *cmap; 560 561 switch (cmd) { 562 case WSDISPLAYIO_GETCMAP: 563 cmap = (struct wsdisplay_cmap*)data; 564 565 if (sc->sc_fbconf.hf_class != HPCFB_CLASS_INDEXCOLOR || 566 sc->sc_fbconf.hf_pack_width != 8 || 567 256 <= cmap->index || 568 256 < (cmap->index + cmap->count)) 569 return (EINVAL); 570 571 #if 0 572 if (!uvm_useracc(cmap->red, cmap->count, B_WRITE) || 573 !uvm_useracc(cmap->green, cmap->count, B_WRITE) || 574 !uvm_useracc(cmap->blue, cmap->count, B_WRITE)) 575 return (EFAULT); 576 577 copyout(&bivideo_cmap_r[cmap->index], cmap->red, cmap->count); 578 copyout(&bivideo_cmap_g[cmap->index], cmap->green,cmap->count); 579 copyout(&bivideo_cmap_b[cmap->index], cmap->blue, cmap->count); 580 #endif 581 582 return (0); 583 584 case WSDISPLAYIO_PUTCMAP: 585 /* 586 * This driver can't set color map. 587 */ 588 return (EINVAL); 589 590 case HPCFBIO_GCONF: 591 fbconf = (struct hpcfb_fbconf *)data; 592 if (fbconf->hf_conf_index != 0 && 593 fbconf->hf_conf_index != HPCFB_CURRENT_CONFIG) { 594 return (EINVAL); 595 } 596 *fbconf = sc->sc_fbconf; /* structure assignment */ 597 return (0); 598 case HPCFBIO_SCONF: 599 fbconf = (struct hpcfb_fbconf *)data; 600 if (fbconf->hf_conf_index != 0 && 601 fbconf->hf_conf_index != HPCFB_CURRENT_CONFIG) { 602 return (EINVAL); 603 } 604 /* 605 * nothing to do because we have only one configration 606 */ 607 return (0); 608 case HPCFBIO_GDSPCONF: 609 dspconf = (struct hpcfb_dspconf *)data; 610 if ((dspconf->hd_unit_index != 0 && 611 dspconf->hd_unit_index != HPCFB_CURRENT_UNIT) || 612 (dspconf->hd_conf_index != 0 && 613 dspconf->hd_conf_index != HPCFB_CURRENT_CONFIG)) { 614 return (EINVAL); 615 } 616 *dspconf = sc->sc_dspconf; /* structure assignment */ 617 return (0); 618 case HPCFBIO_SDSPCONF: 619 dspconf = (struct hpcfb_dspconf *)data; 620 if ((dspconf->hd_unit_index != 0 && 621 dspconf->hd_unit_index != HPCFB_CURRENT_UNIT) || 622 (dspconf->hd_conf_index != 0 && 623 dspconf->hd_conf_index != HPCFB_CURRENT_CONFIG)) { 624 return (EINVAL); 625 } 626 /* 627 * nothing to do 628 * because we have only one unit and one configration 629 */ 630 return (0); 631 case HPCFBIO_GOP: 632 case HPCFBIO_SOP: 633 /* 634 * curently not implemented... 635 */ 636 return (EINVAL); 637 } 638 639 return (ENOTTY); 640 } 641 642 paddr_t 643 ite8181_mmap(ctx, offset, prot) 644 void *ctx; 645 off_t offset; 646 int prot; 647 { 648 struct ite8181_softc *sc = (struct ite8181_softc *)ctx; 649 650 if (offset < 0 || 651 (sc->sc_fbconf.hf_bytes_per_plane + 652 sc->sc_fbconf.hf_offset) < offset) 653 return -1; 654 655 return mips_btop(sc->sc_fbconf.hf_baseaddr + offset); 656 } 657
Indexes created Tue Sep 23 22:09:46 GMT 2025