ite8181.c revision 1.3.2.5
1 /* $NetBSD: ite8181.c,v 1.3.2.5 2001/02/11 19:10:28 bouyer Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 SATO Kazumi 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 */ 29 30 #include <sys/param.h> 31 #include <sys/kernel.h> 32 #include <sys/device.h> 33 #include <sys/systm.h> 34 #include <sys/boot_flag.h> 35 #include <sys/buf.h> 36 37 #include <uvm/uvm_extern.h> 38 39 #include <dev/wscons/wsconsio.h> 40 41 #include <machine/bootinfo.h> 42 #include <machine/bus.h> 43 #include <machine/autoconf.h> 44 #include <machine/config_hook.h> 45 #include <machine/platid.h> 46 #include <machine/platid_mask.h> 47 48 #include <hpcmips/dev/ite8181reg.h> 49 #include <hpcmips/dev/ite8181var.h> 50 #include "bivideo.h" 51 #if NBIVIDEO > 0 52 #include <hpcmips/dev/bivideovar.h> 53 #endif 54 #include <hpcmips/dev/hpccmapvar.h> 55 56 57 #define ITE8181DEBUG 58 #ifdef ITE8181DEBUG 59 #ifndef ITE8181DEBUG_CONF 60 #define ITE8181DEBUG_CONF 0 61 #endif 62 int ite8181_debug = ITE8181DEBUG_CONF; 63 #define DPRINTF(arg) if (ite8181_debug) printf arg 64 #define DPRINTFN(n, arg) if (ite8181_debug > (n)) printf arg 65 #define VPRINTF(arg) if (bootverbose || ite8181_debug) printf arg 66 #define VPRINTFN(n, arg) if (bootverbose || ite8181_debug > (n)) printf arg 67 #else 68 #define DPRINTF(arg) 69 #define DPRINTFN(n, arg) 70 #define VPRINTF(arg) if (bootverbose) printf arg 71 #define VPRINTFN(n, arg) if (bootverbose) printf arg 72 #endif 73 74 #ifndef ITE8181_LCD_CONTROL_ENABLE 75 int ite8181_lcd_control_disable = 1; 76 #else /* ITE8181_LCD_CONTROL_ENABLE */ 77 int ite8181_lcd_control_disable = 0; 78 #endif /* ITE8181_LCD_CONTROL_ENABLE */ 79 80 #define ITE8181_WINCE_CMAP 81 82 /* 83 * XXX: 84 * IBM WorkPad z50 power unit has too weak power. 85 * So we must wait too many times to access some device 86 * after LCD panel and BackLight on. 87 * Currently delay is not enough ??? FIXME 88 */ 89 #ifndef ITE8181_LCD_ON_SELF_DELAY 90 #define ITE8181_LCD_ON_SELF_DELAY 1000 91 #endif /* ITE8181_LCD_ON__SELF_DELAY */ 92 #ifndef ITE8181_LCD_ON_DELAY 93 #define ITE8181_LCD_ON_DELAY 2000 94 #endif /* ITE8181_LCD_ON_DELAY */ 95 int ite8181_lcd_on_self_delay = ITE8181_LCD_ON_SELF_DELAY; /* msec */ 96 int ite8181_lcd_on_delay = ITE8181_LCD_ON_DELAY; /* msec */ 97 98 #define MSEC 1000 99 /* 100 * function prototypes 101 */ 102 static void ite8181_config_write_4 __P((bus_space_tag_t, bus_space_handle_t, int, int)); 103 static int ite8181_config_read_4 __P((bus_space_tag_t, bus_space_handle_t, int)); 104 105 static void ite8181_gui_write_4 __P((struct ite8181_softc *, int, int)); 106 static int ite8181_gui_read_4 __P((struct ite8181_softc *, int)); 107 108 static void ite8181_gui_write_1 __P((struct ite8181_softc *, int, int)); 109 static int ite8181_gui_read_1 __P((struct ite8181_softc *, int)); 110 111 static void ite8181_graphics_write_1 __P((struct ite8181_softc *, int, int)); 112 static int ite8181_graphics_read_1 __P((struct ite8181_softc *, int)); 113 114 static void ite8181_ema_write_1 __P((struct ite8181_softc *, int, int)); 115 static int ite8181_ema_read_1 __P((struct ite8181_softc *, int)); 116 117 static void ite8181_power __P((int, void *)); 118 static int ite8181_hardpower __P((void *, int, long, void *)); 119 static int ite8181_fbinit __P((struct hpcfb_fbconf *)); 120 static int ite8181_ioctl __P((void *, u_long, caddr_t, int, struct proc *)); 121 static paddr_t ite8181_mmap __P((void *, off_t offset, int)); 122 static void ite8181_erase_cursor __P((struct ite8181_softc *)); 123 static int ite8181_lcd_power __P((struct ite8181_softc *, int)); 124 /* 125 * static variables 126 */ 127 struct hpcfb_accessops ite8181_ha = { 128 ite8181_ioctl, ite8181_mmap 129 }; 130 131 inline int 132 ite8181_config_read_4(iot, ioh, byteoffset) 133 bus_space_tag_t iot; 134 bus_space_handle_t ioh; 135 int byteoffset; 136 { 137 return bus_space_read_4(iot, ioh, ITE8181_CONF_OFFSET + byteoffset); 138 } 139 140 inline void 141 ite8181_config_write_4(iot, ioh, byteoffset, data) 142 bus_space_tag_t iot; 143 bus_space_handle_t ioh; 144 int byteoffset; 145 int data; 146 { 147 bus_space_write_4(iot, ioh, ITE8181_CONF_OFFSET + byteoffset, data); 148 } 149 150 inline int 151 ite8181_gui_read_4(sc, byteoffset) 152 struct ite8181_softc *sc; 153 int byteoffset; 154 { 155 return bus_space_read_4(sc->sc_iot, sc->sc_ioh, 156 sc->sc_gba + byteoffset); 157 } 158 159 inline void 160 ite8181_gui_write_4(sc, byteoffset, data) 161 struct ite8181_softc *sc; 162 int byteoffset; 163 int data; 164 { 165 bus_space_write_4(sc->sc_iot, sc->sc_ioh, sc->sc_gba + byteoffset, data); 166 } 167 168 inline int 169 ite8181_gui_read_1(sc, byteoffset) 170 struct ite8181_softc *sc; 171 int byteoffset; 172 { 173 return bus_space_read_1(sc->sc_iot, sc->sc_ioh, 174 sc->sc_gba + byteoffset); 175 } 176 177 inline void 178 ite8181_gui_write_1(sc, byteoffset, data) 179 struct ite8181_softc *sc; 180 int byteoffset; 181 int data; 182 { 183 bus_space_write_1(sc->sc_iot, sc->sc_ioh, sc->sc_gba + byteoffset, data); 184 } 185 186 inline int 187 ite8181_graphics_read_1(sc, byteoffset) 188 struct ite8181_softc *sc; 189 int byteoffset; 190 { 191 return bus_space_read_1(sc->sc_iot, sc->sc_ioh, 192 sc->sc_sba + byteoffset); 193 } 194 195 inline void 196 ite8181_graphics_write_1(sc, byteoffset, data) 197 struct ite8181_softc *sc; 198 int byteoffset; 199 int data; 200 { 201 bus_space_write_1(sc->sc_iot, sc->sc_ioh, sc->sc_sba + byteoffset, data); 202 } 203 204 inline int 205 ite8181_ema_read_1(sc, byteoffset) 206 struct ite8181_softc *sc; 207 int byteoffset; 208 { 209 ite8181_graphics_write_1(sc, ITE8181_EMA_EXAX, byteoffset); 210 return ite8181_graphics_read_1(sc, ITE8181_EMA_EXADATA); 211 } 212 213 inline void 214 ite8181_ema_write_1(sc, byteoffset, data) 215 struct ite8181_softc *sc; 216 int byteoffset; 217 int data; 218 { 219 ite8181_graphics_write_1(sc, ITE8181_EMA_EXAX, byteoffset); 220 ite8181_graphics_write_1(sc, ITE8181_EMA_EXADATA, data); 221 } 222 223 int 224 ite8181_probe(iot, ioh) 225 bus_space_tag_t iot; 226 bus_space_handle_t ioh; 227 { 228 unsigned long regval; 229 230 #if NBIVIDEO > 0 231 if (bivideo_dont_attach) /* some video driver already attached */ 232 return (0); 233 #endif /* NBIVIDEO > 0 */ 234 235 regval = ite8181_config_read_4(iot, ioh, ITE8181_ID); 236 VPRINTF(("ite8181_probe: vendor id=%04lx product id=%04lx\n", 237 regval & 0xffff, (regval >> 16) & 0xffff)); 238 if (regval != ((ITE8181_PRODUCT_ID << 16) | ITE8181_VENDER_ID)) 239 return (0); 240 241 return (1); 242 } 243 244 void 245 ite8181_attach(sc) 246 struct ite8181_softc *sc; 247 { 248 unsigned long regval; 249 struct hpcfb_attach_args ha; 250 int console = (bootinfo->bi_cnuse & BI_CNUSE_SERIAL) ? 0 : 1; 251 252 regval = ite8181_config_read_4(sc->sc_iot, sc->sc_ioh, ITE8181_CLASS); 253 printf(": ITE8181 Rev.%02lx\n", regval & ITE8181_REV_MASK); 254 255 /* set base offsets */ 256 sc->sc_mba = ite8181_config_read_4(sc->sc_iot, sc->sc_ioh, ITE8181_MBA); 257 DPRINTFN(1, ("ite8181: Memory base offset %08x\n", sc->sc_mba)); 258 sc->sc_gba = ite8181_config_read_4(sc->sc_iot, sc->sc_ioh, ITE8181_GBA); 259 DPRINTFN(1, ("ite8181: GUI base offset %08x\n", sc->sc_gba)); 260 sc->sc_sba = ite8181_config_read_4(sc->sc_iot, sc->sc_ioh, ITE8181_SBA); 261 DPRINTFN(1, ("ite8181: Graphics base offset %08x\n", sc->sc_sba)); 262 263 /* assume lcd is on */ 264 sc->sc_lcd = 1; 265 266 /* Add a power hook to power saving */ 267 sc->sc_powerstate = ITE8181_POWERSTATE_D0; 268 sc->sc_powerhook = powerhook_establish(ite8181_power, sc); 269 if (sc->sc_powerhook == NULL) 270 printf("%s: WARNING: unable to establish power hook\n", 271 sc->sc_dev.dv_xname); 272 273 /* Add a hard power hook to power saving */ 274 sc->sc_hardpowerhook = config_hook(CONFIG_HOOK_PMEVENT, 275 CONFIG_HOOK_PMEVENT_HARDPOWER, 276 CONFIG_HOOK_SHARE, 277 ite8181_hardpower, sc); 278 if (sc->sc_hardpowerhook == NULL) 279 printf("%s: WARNING: unable to establish hard power hook\n", 280 sc->sc_dev.dv_xname); 281 282 if (ite8181_fbinit(&sc->sc_fbconf) != 0) { 283 /* just return so that hpcfb will not be attached */ 284 return; 285 } 286 287 ite8181_erase_cursor(sc); 288 289 if (console && hpcfb_cnattach(&sc->sc_fbconf) != 0) { 290 panic("ite8181_attach: can't init fb console"); 291 } 292 293 ha.ha_console = console; 294 ha.ha_accessops = &ite8181_ha; 295 ha.ha_accessctx = sc; 296 ha.ha_curfbconf = 0; 297 ha.ha_nfbconf = 1; 298 ha.ha_fbconflist = &sc->sc_fbconf; 299 ha.ha_curdspconf = 0; 300 ha.ha_ndspconf = 1; 301 ha.ha_dspconflist = &sc->sc_dspconf; 302 303 config_found(&sc->sc_dev, &ha, hpcfbprint); 304 305 #if NBIVIDEO > 0 306 /* 307 * bivideo is no longer need 308 */ 309 bivideo_dont_attach = 1; 310 #endif /* NBIVIDEO > 0 */ 311 } 312 313 int ite8181_lcd_power(sc, on) 314 struct ite8181_softc *sc; 315 int on; 316 { 317 int lcd_p; 318 int lcd_s; 319 int lcd_seq; 320 int loop = 10; 321 322 if (ite8181_lcd_control_disable) { 323 VPRINTF(("ite8171_lcd_control_disable!: %s\n", on?"on":"off")); 324 return 0; 325 } 326 327 if (sc->sc_lcd != on) { 328 ite8181_ema_write_1(sc, ITE8181_EMA_ENABLEEMA, 329 ITE8181_EMA_ENABLEPASS); 330 lcd_p = ite8181_ema_read_1(sc, ITE8181_EMA_LCDPOWER); 331 lcd_s = ite8181_ema_read_1(sc, ITE8181_EMA_LCDPOWERSTAT); 332 lcd_seq = ite8181_ema_read_1(sc, ITE8181_EMA_LCDPOWERSEQ); 333 DPRINTFN(1,("ite8181_lcd_power(%d)< p=%x, s=%x, seq=%x\n", 334 on, 335 lcd_p, lcd_s, lcd_seq)); 336 if (on) { 337 sc->sc_lcd = 1; 338 lcd_seq |= (ITE8181_PUP0|ITE8181_PUP1|ITE8181_PUP2); 339 ite8181_ema_write_1(sc, ITE8181_EMA_LCDPOWERSEQ, lcd_seq); 340 lcd_p &= ~ITE8181_LCDSTANDBY; 341 ite8181_ema_write_1(sc, ITE8181_EMA_LCDPOWER, lcd_p); 342 /* 343 * XXX: 344 * IBM WorkPad z50 power unit has too weak power. 345 * So we must wait too many times to access self device 346 * after LCD panel and BackLight on. 347 * Currently delay is not enough ??? FIXME 348 */ 349 delay(ite8181_lcd_on_self_delay*MSEC); 350 while (loop--) { 351 lcd_p = ite8181_ema_read_1(sc, ITE8181_EMA_LCDPOWER); 352 lcd_s = ite8181_ema_read_1(sc, ITE8181_EMA_LCDPOWERSTAT); 353 lcd_seq = ite8181_ema_read_1(sc, ITE8181_EMA_LCDPOWERSEQ); 354 DPRINTFN(1,("ite8181_lcd_power(%d)%d| p=%x, s=%x, seq=%x\n", 355 on, loop, 356 lcd_p, lcd_s, lcd_seq)); 357 /* XXX the states which are not described in manual.*/ 358 if (!(lcd_s&ITE8181_LCDPSTANDBY) && 359 !(lcd_s&ITE8181_LCDPUP) && 360 (lcd_s&ITE8181_LCDPON)) 361 break; 362 delay(100); 363 } 364 lcd_s |= ITE8181_PPTOBEON; 365 ite8181_ema_write_1(sc, ITE8181_EMA_LCDPOWERSTAT, lcd_s); 366 } else { 367 sc->sc_lcd = 0; 368 lcd_p |= ITE8181_LCDSTANDBY; 369 ite8181_ema_write_1(sc, ITE8181_EMA_LCDPOWER, lcd_p); 370 while (loop--) { 371 lcd_p = ite8181_ema_read_1(sc, ITE8181_EMA_LCDPOWER); 372 lcd_s = ite8181_ema_read_1(sc, ITE8181_EMA_LCDPOWERSTAT); 373 lcd_seq = ite8181_ema_read_1(sc, ITE8181_EMA_LCDPOWERSEQ); 374 DPRINTFN(1,("ite8181_lcd_power(%d)%d| p=%x, s=%x, seq=%x\n", 375 on, loop, 376 lcd_p, lcd_s, lcd_seq)); 377 /* XXX the states which are not described in manual.*/ 378 if ((lcd_s&ITE8181_LCDPSTANDBY) && 379 !(lcd_s&ITE8181_LCDPDOWN) && 380 !(lcd_s&ITE8181_LCDPON)) 381 break; 382 delay(100); 383 } 384 lcd_s &= ~ITE8181_PPTOBEON; 385 ite8181_ema_write_1(sc, ITE8181_EMA_LCDPOWERSTAT, lcd_s); 386 } 387 DPRINTFN(1,("ite8181_lcd_power(%d)> p=%x, s=%x, seq=%x\n", 388 on, 389 ite8181_ema_read_1(sc, ITE8181_EMA_LCDPOWER), 390 ite8181_ema_read_1(sc, ITE8181_EMA_LCDPOWERSTAT), 391 ite8181_ema_read_1(sc, ITE8181_EMA_LCDPOWERSEQ))); 392 ite8181_ema_write_1(sc, ITE8181_EMA_ENABLEEMA, 393 ITE8181_EMA_DISABLEPASS); 394 } 395 return 0; 396 } 397 398 static void 399 ite8181_erase_cursor(sc) 400 struct ite8181_softc *sc; 401 { 402 ite8181_gui_write_1(sc, ITE8181_GUI_C1C, 0); /* Cursor 1 Control Reg. */ 403 /* other ? */ 404 } 405 406 static void 407 ite8181_power(why, arg) 408 int why; 409 void *arg; 410 { 411 } 412 413 static int 414 ite8181_hardpower(ctx, type, id, msg) 415 void *ctx; 416 int type; 417 long id; 418 void *msg; 419 { 420 struct ite8181_softc *sc = ctx; 421 int why = (int)msg; 422 423 switch (why) { 424 case PWR_STANDBY: 425 sc->sc_powerstate = ITE8181_POWERSTATE_D3; 426 /* ite8181_lcd_power(sc, 0); */ 427 delay(MSEC); 428 break; 429 case PWR_SUSPEND: 430 sc->sc_powerstate = ITE8181_POWERSTATE_D2; 431 ite8181_lcd_power(sc, 0); 432 delay(MSEC); 433 break; 434 case PWR_RESUME: 435 delay(MSEC); 436 sc->sc_powerstate = ITE8181_POWERSTATE_D0; 437 ite8181_lcd_power(sc, 1); 438 /* 439 * XXX: 440 * IBM WorkPad z50 power unit has too weak power. 441 * So we must wait too many times to access other devices 442 * after LCD panel and BackLight on. 443 */ 444 delay(ite8181_lcd_on_delay*MSEC); 445 break; 446 } 447 448 /* 449 * you should wait until the 450 * power state transit sequence will end. 451 */ 452 453 return (0); 454 } 455 456 457 static int 458 ite8181_fbinit(fb) 459 struct hpcfb_fbconf *fb; 460 { 461 462 /* 463 * get fb settings from bootinfo 464 */ 465 if (bootinfo == NULL || 466 bootinfo->fb_addr == 0 || 467 bootinfo->fb_line_bytes == 0 || 468 bootinfo->fb_width == 0 || 469 bootinfo->fb_height == 0) { 470 printf("no frame buffer infomation.\n"); 471 return (-1); 472 } 473 474 /* zero fill */ 475 bzero(fb, sizeof(*fb)); 476 477 fb->hf_conf_index = 0; /* configuration index */ 478 fb->hf_nconfs = 1; /* how many configurations */ 479 strcpy(fb->hf_name, "built-in video"); 480 /* frame buffer name */ 481 strcpy(fb->hf_conf_name, "default"); 482 /* configuration name */ 483 fb->hf_height = bootinfo->fb_height; 484 fb->hf_width = bootinfo->fb_width; 485 fb->hf_baseaddr = (u_long)bootinfo->fb_addr; 486 fb->hf_offset = (u_long)bootinfo->fb_addr - 487 mips_ptob(mips_btop(bootinfo->fb_addr)); 488 /* frame buffer start offset */ 489 fb->hf_bytes_per_line = bootinfo->fb_line_bytes; 490 fb->hf_nplanes = 1; 491 fb->hf_bytes_per_plane = bootinfo->fb_height * 492 bootinfo->fb_line_bytes; 493 494 fb->hf_access_flags |= HPCFB_ACCESS_BYTE; 495 fb->hf_access_flags |= HPCFB_ACCESS_WORD; 496 fb->hf_access_flags |= HPCFB_ACCESS_DWORD; 497 498 switch (bootinfo->fb_type) { 499 /* 500 * gray scale 501 */ 502 case BIFB_D2_M2L_3: 503 case BIFB_D2_M2L_3x2: 504 fb->hf_access_flags |= HPCFB_ACCESS_REVERSE; 505 /* fall through */ 506 case BIFB_D2_M2L_0: 507 case BIFB_D2_M2L_0x2: 508 fb->hf_class = HPCFB_CLASS_GRAYSCALE; 509 fb->hf_access_flags |= HPCFB_ACCESS_STATIC; 510 fb->hf_pack_width = 8; 511 fb->hf_pixels_per_pack = 4; 512 fb->hf_pixel_width = 2; 513 fb->hf_class_data_length = sizeof(struct hf_gray_tag); 514 fb->hf_u.hf_gray.hf_flags = 0; /* reserved for future use */ 515 break; 516 517 case BIFB_D4_M2L_F: 518 case BIFB_D4_M2L_Fx2: 519 fb->hf_access_flags |= HPCFB_ACCESS_REVERSE; 520 /* fall through */ 521 case BIFB_D4_M2L_0: 522 case BIFB_D4_M2L_0x2: 523 fb->hf_class = HPCFB_CLASS_GRAYSCALE; 524 fb->hf_access_flags |= HPCFB_ACCESS_STATIC; 525 fb->hf_pack_width = 8; 526 fb->hf_pixels_per_pack = 2; 527 fb->hf_pixel_width = 4; 528 fb->hf_class_data_length = sizeof(struct hf_gray_tag); 529 fb->hf_u.hf_gray.hf_flags = 0; /* reserved for future use */ 530 break; 531 532 /* 533 * indexed color 534 */ 535 case BIFB_D8_FF: 536 fb->hf_access_flags |= HPCFB_ACCESS_REVERSE; 537 /* fall through */ 538 case BIFB_D8_00: 539 fb->hf_class = HPCFB_CLASS_INDEXCOLOR; 540 fb->hf_access_flags |= HPCFB_ACCESS_STATIC; 541 fb->hf_pack_width = 8; 542 fb->hf_pixels_per_pack = 1; 543 fb->hf_pixel_width = 8; 544 fb->hf_class_data_length = sizeof(struct hf_indexed_tag); 545 fb->hf_u.hf_indexed.hf_flags = 0; /* reserved for future use */ 546 break; 547 548 /* 549 * RGB color 550 */ 551 case BIFB_D16_FFFF: 552 fb->hf_access_flags |= HPCFB_ACCESS_REVERSE; 553 /* fall through */ 554 case BIFB_D16_0000: 555 fb->hf_class = HPCFB_CLASS_RGBCOLOR; 556 fb->hf_access_flags |= HPCFB_ACCESS_STATIC; 557 #if BYTE_ORDER == LITTLE_ENDIAN 558 fb->hf_swap_flags = HPCFB_SWAP_BYTE; 559 #endif 560 fb->hf_pack_width = 16; 561 fb->hf_pixels_per_pack = 1; 562 fb->hf_pixel_width = 16; 563 564 fb->hf_class_data_length = sizeof(struct hf_rgb_tag); 565 fb->hf_u.hf_rgb.hf_flags = 0; /* reserved for future use */ 566 567 fb->hf_u.hf_rgb.hf_red_width = 5; 568 fb->hf_u.hf_rgb.hf_red_shift = 11; 569 fb->hf_u.hf_rgb.hf_green_width = 6; 570 fb->hf_u.hf_rgb.hf_green_shift = 5; 571 fb->hf_u.hf_rgb.hf_blue_width = 5; 572 fb->hf_u.hf_rgb.hf_blue_shift = 0; 573 fb->hf_u.hf_rgb.hf_alpha_width = 0; 574 fb->hf_u.hf_rgb.hf_alpha_shift = 0; 575 break; 576 577 default: 578 printf("unknown type (=%d).\n", bootinfo->fb_type); 579 return (-1); 580 break; 581 } 582 583 return (0); /* no error */ 584 } 585 586 int 587 ite8181_ioctl(v, cmd, data, flag, p) 588 void *v; 589 u_long cmd; 590 caddr_t data; 591 int flag; 592 struct proc *p; 593 { 594 struct ite8181_softc *sc = (struct ite8181_softc *)v; 595 struct hpcfb_fbconf *fbconf; 596 struct hpcfb_dspconf *dspconf; 597 struct wsdisplay_cmap *cmap; 598 599 switch (cmd) { 600 case WSDISPLAYIO_GETCMAP: 601 cmap = (struct wsdisplay_cmap*)data; 602 603 if (sc->sc_fbconf.hf_class != HPCFB_CLASS_INDEXCOLOR || 604 sc->sc_fbconf.hf_pack_width != 8 || 605 256 <= cmap->index || 606 256 < (cmap->index + cmap->count)) 607 return (EINVAL); 608 609 if (!uvm_useracc(cmap->red, cmap->count, B_WRITE) || 610 !uvm_useracc(cmap->green, cmap->count, B_WRITE) || 611 !uvm_useracc(cmap->blue, cmap->count, B_WRITE)) 612 return (EFAULT); 613 614 #ifdef ITE8181_WINCE_CMAP 615 copyout(&bivideo_cmap_r[cmap->index], cmap->red, cmap->count); 616 copyout(&bivideo_cmap_g[cmap->index], cmap->green,cmap->count); 617 copyout(&bivideo_cmap_b[cmap->index], cmap->blue, cmap->count); 618 return (0); 619 #else /* ITE8181_WINCE_CMAP */ 620 return EINVAL; 621 #endif /* ITE8181_WINCE_CMAP */ 622 623 case WSDISPLAYIO_PUTCMAP: 624 /* 625 * This driver can't set color map. 626 */ 627 return (EINVAL); 628 629 case HPCFBIO_GCONF: 630 fbconf = (struct hpcfb_fbconf *)data; 631 if (fbconf->hf_conf_index != 0 && 632 fbconf->hf_conf_index != HPCFB_CURRENT_CONFIG) { 633 return (EINVAL); 634 } 635 *fbconf = sc->sc_fbconf; /* structure assignment */ 636 return (0); 637 case HPCFBIO_SCONF: 638 fbconf = (struct hpcfb_fbconf *)data; 639 if (fbconf->hf_conf_index != 0 && 640 fbconf->hf_conf_index != HPCFB_CURRENT_CONFIG) { 641 return (EINVAL); 642 } 643 /* 644 * nothing to do because we have only one configration 645 */ 646 return (0); 647 case HPCFBIO_GDSPCONF: 648 dspconf = (struct hpcfb_dspconf *)data; 649 if ((dspconf->hd_unit_index != 0 && 650 dspconf->hd_unit_index != HPCFB_CURRENT_UNIT) || 651 (dspconf->hd_conf_index != 0 && 652 dspconf->hd_conf_index != HPCFB_CURRENT_CONFIG)) { 653 return (EINVAL); 654 } 655 *dspconf = sc->sc_dspconf; /* structure assignment */ 656 return (0); 657 case HPCFBIO_SDSPCONF: 658 dspconf = (struct hpcfb_dspconf *)data; 659 if ((dspconf->hd_unit_index != 0 && 660 dspconf->hd_unit_index != HPCFB_CURRENT_UNIT) || 661 (dspconf->hd_conf_index != 0 && 662 dspconf->hd_conf_index != HPCFB_CURRENT_CONFIG)) { 663 return (EINVAL); 664 } 665 /* 666 * nothing to do 667 * because we have only one unit and one configration 668 */ 669 return (0); 670 case HPCFBIO_GOP: 671 case HPCFBIO_SOP: 672 /* 673 * curently not implemented... 674 */ 675 return (EINVAL); 676 } 677 678 return (ENOTTY); 679 } 680 681 paddr_t 682 ite8181_mmap(ctx, offset, prot) 683 void *ctx; 684 off_t offset; 685 int prot; 686 { 687 struct ite8181_softc *sc = (struct ite8181_softc *)ctx; 688 689 if (offset < 0 || 690 (sc->sc_fbconf.hf_bytes_per_plane + 691 sc->sc_fbconf.hf_offset) < offset) 692 return -1; 693 694 return mips_btop((u_long)bootinfo->fb_addr + offset); 695 } 696
Indexes created Fri Oct 03 02:09:57 GMT 2025